npe_misc.c revision eae2e508a8e70b1ec407b10bd068c080651bbe5c
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* Library file that has miscellaneous support for npe(7d)
*/
#include <sys/pcie_impl.h>
/*
* Prototype declaration
*/
/*
* Default ecfga base address
*/
extern uint32_t npe_aer_uce_mask;
extern boolean_t pcie_full_scan;
/*
* Query the MCFG table using ACPI. If MCFG is found, setup the
* 'ecfga-base-address' (Enhanced Configuration Access base address)
* property accordingly. Otherwise, set the value of the property
* to the default value.
*/
void
{
char *cfg_baa_endp;
/* Query the MCFG table using ACPI */
while ((char *)cfg_baap < cfg_baa_endp) {
if (ecfga_base != (uint64_t)0) {
/*
* Setup the 'ecfga-base-address' property to
* the base_addr found in the MCFG and return.
*/
(void) ndi_prop_update_int64(DDI_DEV_T_NONE,
return;
}
cfg_baap++;
}
}
/*
* If MCFG is not found or ecfga_base is not found in MCFG table,
* set the 'ecfga-base-address' property to the default value.
*/
"ecfga-base-address", npe_default_ecfga_base);
}
/*
* Enable reporting of AER capability next pointer.
* This needs to be done only for CK8-04 devices
* by setting NV_XVR_VEND_CYA1 (offset 0xf40) bit 13
* NOTE: BIOS is disabling this, it needs to be enabled temporarily
*/
void
{
if (!(cya1 & ~NVIDIA_CK804_VEND_CYA1_ERPT_MASK))
(void) pci_config_put16(cfg_hdl,
}
}
/*
* If the bridge is empty, disable it
*/
int
{
/*
* Do not bind drivers to empty bridges.
* Fail above, if the bridge is found to be hotplug capable
*/
return (1);
return (0);
}
void
/* Disable ECRC for all devices */
/*
* Turn full scan on since the Error Source ID register may not
* have the correct ID.
*/
}
}