npe_misc.c revision eae2e508a8e70b1ec407b10bd068c080651bbe5c
70025d765b044c6d8594bb965a2247a61e991a99johnny/*
70025d765b044c6d8594bb965a2247a61e991a99johnny * CDDL HEADER START
70025d765b044c6d8594bb965a2247a61e991a99johnny *
70025d765b044c6d8594bb965a2247a61e991a99johnny * The contents of this file are subject to the terms of the
7a23d1009aa28ea040052630547929b9c5eb6ab4anish * Common Development and Distribution License (the "License").
7a23d1009aa28ea040052630547929b9c5eb6ab4anish * You may not use this file except in compliance with the License.
70025d765b044c6d8594bb965a2247a61e991a99johnny *
70025d765b044c6d8594bb965a2247a61e991a99johnny * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
70025d765b044c6d8594bb965a2247a61e991a99johnny * or http://www.opensolaris.org/os/licensing.
70025d765b044c6d8594bb965a2247a61e991a99johnny * See the License for the specific language governing permissions
70025d765b044c6d8594bb965a2247a61e991a99johnny * and limitations under the License.
70025d765b044c6d8594bb965a2247a61e991a99johnny *
70025d765b044c6d8594bb965a2247a61e991a99johnny * When distributing Covered Code, include this CDDL HEADER in each
70025d765b044c6d8594bb965a2247a61e991a99johnny * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
70025d765b044c6d8594bb965a2247a61e991a99johnny * If applicable, add the following below this CDDL HEADER, with the
70025d765b044c6d8594bb965a2247a61e991a99johnny * fields enclosed by brackets "[]" replaced with your own identifying
70025d765b044c6d8594bb965a2247a61e991a99johnny * information: Portions Copyright [yyyy] [name of copyright owner]
70025d765b044c6d8594bb965a2247a61e991a99johnny *
70025d765b044c6d8594bb965a2247a61e991a99johnny * CDDL HEADER END
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny/*
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
70025d765b044c6d8594bb965a2247a61e991a99johnny * Use is subject to license terms.
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny#pragma ident "%Z%%M% %I% %E% SMI"
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny/*
70025d765b044c6d8594bb965a2247a61e991a99johnny * Library file that has miscellaneous support for npe(7d)
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny#include <sys/conf.h>
70025d765b044c6d8594bb965a2247a61e991a99johnny#include <sys/pci.h>
70025d765b044c6d8594bb965a2247a61e991a99johnny#include <sys/sunndi.h>
70025d765b044c6d8594bb965a2247a61e991a99johnny#include <sys/acpi/acpi.h>
70025d765b044c6d8594bb965a2247a61e991a99johnny#include <sys/acpi/acpi_pci.h>
70025d765b044c6d8594bb965a2247a61e991a99johnny#include <sys/acpica.h>
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae#include <sys/pci_cap.h>
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae#include <sys/pcie_impl.h>
8a5a0d1e4394737d73b1496b2cd844056e26c1b4anish#include <io/pciex/pcie_nvidia.h>
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny/*
70025d765b044c6d8594bb965a2247a61e991a99johnny * Prototype declaration
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnnyvoid npe_query_acpi_mcfg(dev_info_t *dip);
337fc9e235877b459e389f54daf9833bbc645439anishvoid npe_ck804_fix_aer_ptr(ddi_acc_handle_t cfg_hdl);
7a23d1009aa28ea040052630547929b9c5eb6ab4anishint npe_disable_empty_bridges_workaround(dev_info_t *child);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnaevoid npe_nvidia_error_mask(ddi_acc_handle_t cfg_hdl);
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny/*
70025d765b044c6d8594bb965a2247a61e991a99johnny * Default ecfga base address
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnnyint64_t npe_default_ecfga_base = 0xE0000000;
70025d765b044c6d8594bb965a2247a61e991a99johnny
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnaeextern uint32_t npe_aer_uce_mask;
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnaeextern boolean_t pcie_full_scan;
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae
70025d765b044c6d8594bb965a2247a61e991a99johnny/*
70025d765b044c6d8594bb965a2247a61e991a99johnny * Query the MCFG table using ACPI. If MCFG is found, setup the
70025d765b044c6d8594bb965a2247a61e991a99johnny * 'ecfga-base-address' (Enhanced Configuration Access base address)
70025d765b044c6d8594bb965a2247a61e991a99johnny * property accordingly. Otherwise, set the value of the property
70025d765b044c6d8594bb965a2247a61e991a99johnny * to the default value.
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnnyvoid
70025d765b044c6d8594bb965a2247a61e991a99johnnynpe_query_acpi_mcfg(dev_info_t *dip)
70025d765b044c6d8594bb965a2247a61e991a99johnny{
70025d765b044c6d8594bb965a2247a61e991a99johnny MCFG_TABLE *mcfgp;
70025d765b044c6d8594bb965a2247a61e991a99johnny CFG_BASE_ADDR_ALLOC *cfg_baap;
70025d765b044c6d8594bb965a2247a61e991a99johnny char *cfg_baa_endp;
70025d765b044c6d8594bb965a2247a61e991a99johnny uint64_t ecfga_base;
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny /* Query the MCFG table using ACPI */
70025d765b044c6d8594bb965a2247a61e991a99johnny if (AcpiGetFirmwareTable(MCFG_SIG, 1, ACPI_LOGICAL_ADDRESSING,
70025d765b044c6d8594bb965a2247a61e991a99johnny (ACPI_TABLE_HEADER **)&mcfgp) == AE_OK) {
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny cfg_baap = (CFG_BASE_ADDR_ALLOC *)mcfgp->CfgBaseAddrAllocList;
70025d765b044c6d8594bb965a2247a61e991a99johnny cfg_baa_endp = ((char *)mcfgp) + mcfgp->Length;
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny while ((char *)cfg_baap < cfg_baa_endp) {
70025d765b044c6d8594bb965a2247a61e991a99johnny ecfga_base = ACPI_GET_ADDRESS(cfg_baap->base_addr);
70025d765b044c6d8594bb965a2247a61e991a99johnny if (ecfga_base != (uint64_t)0) {
70025d765b044c6d8594bb965a2247a61e991a99johnny /*
70025d765b044c6d8594bb965a2247a61e991a99johnny * Setup the 'ecfga-base-address' property to
70025d765b044c6d8594bb965a2247a61e991a99johnny * the base_addr found in the MCFG and return.
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnny (void) ndi_prop_update_int64(DDI_DEV_T_NONE,
70025d765b044c6d8594bb965a2247a61e991a99johnny dip, "ecfga-base-address", ecfga_base);
70025d765b044c6d8594bb965a2247a61e991a99johnny return;
70025d765b044c6d8594bb965a2247a61e991a99johnny }
70025d765b044c6d8594bb965a2247a61e991a99johnny cfg_baap++;
70025d765b044c6d8594bb965a2247a61e991a99johnny }
70025d765b044c6d8594bb965a2247a61e991a99johnny }
70025d765b044c6d8594bb965a2247a61e991a99johnny /*
70025d765b044c6d8594bb965a2247a61e991a99johnny * If MCFG is not found or ecfga_base is not found in MCFG table,
70025d765b044c6d8594bb965a2247a61e991a99johnny * set the 'ecfga-base-address' property to the default value.
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnny (void) ndi_prop_update_int64(DDI_DEV_T_NONE, dip,
70025d765b044c6d8594bb965a2247a61e991a99johnny "ecfga-base-address", npe_default_ecfga_base);
70025d765b044c6d8594bb965a2247a61e991a99johnny}
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny
70025d765b044c6d8594bb965a2247a61e991a99johnny/*
70025d765b044c6d8594bb965a2247a61e991a99johnny * Enable reporting of AER capability next pointer.
70025d765b044c6d8594bb965a2247a61e991a99johnny * This needs to be done only for CK8-04 devices
70025d765b044c6d8594bb965a2247a61e991a99johnny * by setting NV_XVR_VEND_CYA1 (offset 0xf40) bit 13
70025d765b044c6d8594bb965a2247a61e991a99johnny * NOTE: BIOS is disabling this, it needs to be enabled temporarily
70025d765b044c6d8594bb965a2247a61e991a99johnny */
70025d765b044c6d8594bb965a2247a61e991a99johnnyvoid
337fc9e235877b459e389f54daf9833bbc645439anishnpe_ck804_fix_aer_ptr(ddi_acc_handle_t cfg_hdl)
70025d765b044c6d8594bb965a2247a61e991a99johnny{
337fc9e235877b459e389f54daf9833bbc645439anish ushort_t cya1;
70025d765b044c6d8594bb965a2247a61e991a99johnny
2f15eac90d333799a61f99c8b0f11a8524a716b9anish if ((pci_config_get16(cfg_hdl, PCI_CONF_VENID) == NVIDIA_VENDOR_ID) &&
2f15eac90d333799a61f99c8b0f11a8524a716b9anish (pci_config_get16(cfg_hdl, PCI_CONF_DEVID) ==
2f15eac90d333799a61f99c8b0f11a8524a716b9anish NVIDIA_CK804_DEVICE_ID) &&
2f15eac90d333799a61f99c8b0f11a8524a716b9anish (pci_config_get8(cfg_hdl, PCI_CONF_REVID) >=
2f15eac90d333799a61f99c8b0f11a8524a716b9anish NVIDIA_CK804_AER_VALID_REVID)) {
2f15eac90d333799a61f99c8b0f11a8524a716b9anish cya1 = pci_config_get16(cfg_hdl, NVIDIA_CK804_VEND_CYA1_OFF);
2f15eac90d333799a61f99c8b0f11a8524a716b9anish if (!(cya1 & ~NVIDIA_CK804_VEND_CYA1_ERPT_MASK))
2f15eac90d333799a61f99c8b0f11a8524a716b9anish (void) pci_config_put16(cfg_hdl,
2f15eac90d333799a61f99c8b0f11a8524a716b9anish NVIDIA_CK804_VEND_CYA1_OFF,
2f15eac90d333799a61f99c8b0f11a8524a716b9anish cya1 | NVIDIA_CK804_VEND_CYA1_ERPT_VAL);
2f15eac90d333799a61f99c8b0f11a8524a716b9anish }
70025d765b044c6d8594bb965a2247a61e991a99johnny}
7a23d1009aa28ea040052630547929b9c5eb6ab4anish
7a23d1009aa28ea040052630547929b9c5eb6ab4anish/*
7a23d1009aa28ea040052630547929b9c5eb6ab4anish * If the bridge is empty, disable it
7a23d1009aa28ea040052630547929b9c5eb6ab4anish */
7a23d1009aa28ea040052630547929b9c5eb6ab4anishint
7a23d1009aa28ea040052630547929b9c5eb6ab4anishnpe_disable_empty_bridges_workaround(dev_info_t *child)
7a23d1009aa28ea040052630547929b9c5eb6ab4anish{
7a23d1009aa28ea040052630547929b9c5eb6ab4anish /*
7a23d1009aa28ea040052630547929b9c5eb6ab4anish * Do not bind drivers to empty bridges.
7a23d1009aa28ea040052630547929b9c5eb6ab4anish * Fail above, if the bridge is found to be hotplug capable
7a23d1009aa28ea040052630547929b9c5eb6ab4anish */
7a23d1009aa28ea040052630547929b9c5eb6ab4anish if (ddi_driver_major(child) == ddi_name_to_major("pcie_pci") &&
7a23d1009aa28ea040052630547929b9c5eb6ab4anish ddi_get_child(child) == NULL &&
7a23d1009aa28ea040052630547929b9c5eb6ab4anish ddi_prop_get_int(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS,
7a23d1009aa28ea040052630547929b9c5eb6ab4anish "pci-hotplug-type", INBAND_HPC_NONE) == INBAND_HPC_NONE)
7a23d1009aa28ea040052630547929b9c5eb6ab4anish return (1);
7a23d1009aa28ea040052630547929b9c5eb6ab4anish
7a23d1009aa28ea040052630547929b9c5eb6ab4anish return (0);
7a23d1009aa28ea040052630547929b9c5eb6ab4anish}
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnaevoid
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnaenpe_nvidia_error_mask(ddi_acc_handle_t cfg_hdl) {
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae uint32_t regs;
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae uint16_t vendor_id = pci_config_get16(cfg_hdl, PCI_CONF_VENID);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae uint16_t dev_id = pci_config_get16(cfg_hdl, PCI_CONF_DEVID);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae if ((vendor_id == NVIDIA_VENDOR_ID) && NVIDIA_PCIE_RC_DEV_ID(dev_id)) {
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae /* Disable ECRC for all devices */
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae regs = pcie_get_aer_uce_mask() | npe_aer_uce_mask |
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae PCIE_AER_UCE_ECRC;
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae pcie_set_aer_uce_mask(regs);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae /*
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * Turn full scan on since the Error Source ID register may not
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * have the correct ID.
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae */
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae pcie_full_scan = B_TRUE;
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae }
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae}