npe.c revision 5c59319b8761ccd4b952eec8d5caecf298024607
70025d765b044c6d8594bb965a2247a61e991a99johnny * CDDL HEADER START
70025d765b044c6d8594bb965a2247a61e991a99johnny * The contents of this file are subject to the terms of the
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * Common Development and Distribution License (the "License").
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * You may not use this file except in compliance with the License.
70025d765b044c6d8594bb965a2247a61e991a99johnny * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
70025d765b044c6d8594bb965a2247a61e991a99johnny * See the License for the specific language governing permissions
70025d765b044c6d8594bb965a2247a61e991a99johnny * and limitations under the License.
70025d765b044c6d8594bb965a2247a61e991a99johnny * When distributing Covered Code, include this CDDL HEADER in each
70025d765b044c6d8594bb965a2247a61e991a99johnny * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
70025d765b044c6d8594bb965a2247a61e991a99johnny * If applicable, add the following below this CDDL HEADER, with the
70025d765b044c6d8594bb965a2247a61e991a99johnny * fields enclosed by brackets "[]" replaced with your own identifying
70025d765b044c6d8594bb965a2247a61e991a99johnny * information: Portions Copyright [yyyy] [name of copyright owner]
70025d765b044c6d8594bb965a2247a61e991a99johnny * CDDL HEADER END
5c59319b8761ccd4b952eec8d5caecf298024607Dan Mick * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
70025d765b044c6d8594bb965a2247a61e991a99johnny * Use is subject to license terms.
70025d765b044c6d8594bb965a2247a61e991a99johnny * Host to PCI-Express local bus driver
70025d765b044c6d8594bb965a2247a61e991a99johnny * Bus Operation functions
70025d765b044c6d8594bb965a2247a61e991a99johnnystatic int npe_bus_map(dev_info_t *, dev_info_t *, ddi_map_req_t *,
70025d765b044c6d8594bb965a2247a61e991a99johnnystatic int npe_ctlops(dev_info_t *, dev_info_t *, ddi_ctl_enum_t,
70025d765b044c6d8594bb965a2247a61e991a99johnny void *, void *);
70025d765b044c6d8594bb965a2247a61e991a99johnnystatic int npe_intr_ops(dev_info_t *, dev_info_t *, ddi_intr_op_t,
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreetstatic int npe_fm_init(dev_info_t *, dev_info_t *, int,
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreetstatic int npe_fm_callback(dev_info_t *, ddi_fm_error_t *, const void *);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * Disable URs and Received MA for all PCIe devices. Until x86 SW is changed so
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * that random drivers do not do PIO accesses on devices that it does not own,
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * these error bits must be disabled. SERR must also be disabled if URs have
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * been masked.
70025d765b044c6d8594bb965a2247a61e991a99johnny 0, /* (*bus_get_eventcookie)(); */
70025d765b044c6d8594bb965a2247a61e991a99johnny 0, /* (*bus_add_eventcall)(); */
70025d765b044c6d8594bb965a2247a61e991a99johnny 0, /* (*bus_remove_eventcall)(); */
70025d765b044c6d8594bb965a2247a61e991a99johnny 0, /* (*bus_post_event)(); */
70025d765b044c6d8594bb965a2247a61e991a99johnny 0, /* (*bus_intr_ctl)(); */
70025d765b044c6d8594bb965a2247a61e991a99johnny 0, /* (*bus_config)(); */
70025d765b044c6d8594bb965a2247a61e991a99johnny 0, /* (*bus_unconfig)(); */
70025d765b044c6d8594bb965a2247a61e991a99johnny * One goal here is to leverage off of the pcihp.c source without making
70025d765b044c6d8594bb965a2247a61e991a99johnny * changes to it. Call into it's cb_ops directly if needed, piggybacking
70025d765b044c6d8594bb965a2247a61e991a99johnny * anything else needed by the pci_tools.c module. Only pci_tools and pcihp
70025d765b044c6d8594bb965a2247a61e991a99johnny * will be using the PCI devctl node.
70025d765b044c6d8594bb965a2247a61e991a99johnnystatic int npe_ioctl(dev_t, int, intptr_t, int, cred_t *, int *);
70025d765b044c6d8594bb965a2247a61e991a99johnnystatic int npe_prop_op(dev_t, dev_info_t *, ddi_prop_op_t, int, char *,
70025d765b044c6d8594bb965a2247a61e991a99johnnystatic int npe_info(dev_info_t *, ddi_info_cmd_t, void *, void **);
70025d765b044c6d8594bb965a2247a61e991a99johnny D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */
70025d765b044c6d8594bb965a2247a61e991a99johnny * Device Node Operation functions
70025d765b044c6d8594bb965a2247a61e991a99johnnystatic int npe_attach(dev_info_t *devi, ddi_attach_cmd_t cmd);
70025d765b044c6d8594bb965a2247a61e991a99johnnystatic int npe_detach(dev_info_t *devi, ddi_detach_cmd_t cmd);
70025d765b044c6d8594bb965a2247a61e991a99johnny 0, /* refcnt */
70025d765b044c6d8594bb965a2247a61e991a99johnny * Internal routines in support of particular npe_ctlops.
70025d765b044c6d8594bb965a2247a61e991a99johnny * External support routine
337fc9e235877b459e389f54daf9833bbc645439anishextern void npe_ck804_fix_aer_ptr(ddi_acc_handle_t cfg_hdl);
7a23d1009aa28ea040052630547929b9c5eb6ab4anishextern int npe_disable_empty_bridges_workaround(dev_info_t *child);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnaeextern void npe_nvidia_error_mask(ddi_acc_handle_t cfg_hdl);
5c0a55ff7158dbb6220c31dda253139cf9cf5fdeetextern void npe_intel_error_mask(ddi_acc_handle_t cfg_hdl);
49fbdd30212f016ddd49c4b5c997b0b827ff0962Erwin T Tsaurextern boolean_t npe_check_and_set_mmcfg(dev_info_t *dip);
70025d765b044c6d8594bb965a2247a61e991a99johnny * Module linkage information for the kernel.
613b28719c10e84c1202c1045df44d77767de21dRichard Bean "Host to PCIe nexus driver",
70025d765b044c6d8594bb965a2247a61e991a99johnny/* Save minimal state. */
70025d765b044c6d8594bb965a2247a61e991a99johnny * Initialize per-pci bus soft state pointer.
70025d765b044c6d8594bb965a2247a61e991a99johnny e = ddi_soft_state_init(&npe_statep, sizeof (pci_state_t), 1);
70025d765b044c6d8594bb965a2247a61e991a99johnny if (e != 0)
70025d765b044c6d8594bb965a2247a61e991a99johnny return (e);
70025d765b044c6d8594bb965a2247a61e991a99johnny return (e);
70025d765b044c6d8594bb965a2247a61e991a99johnny/*ARGSUSED*/
70025d765b044c6d8594bb965a2247a61e991a99johnny * Use the minor number as constructed by pcihp, as the index value to
70025d765b044c6d8594bb965a2247a61e991a99johnny * ddi_soft_state_zalloc.
70025d765b044c6d8594bb965a2247a61e991a99johnny if (ddi_prop_update_string(DDI_DEV_T_NONE, devi, "device_type",
70025d765b044c6d8594bb965a2247a61e991a99johnny cmn_err(CE_WARN, "npe: 'device_type' prop create failed");
70025d765b044c6d8594bb965a2247a61e991a99johnny if (ddi_soft_state_zalloc(npe_statep, instance) == DDI_SUCCESS)
70025d765b044c6d8594bb965a2247a61e991a99johnny * Initialize hotplug support on this bus. At minimum
70025d765b044c6d8594bb965a2247a61e991a99johnny * (for non hotplug bus) this would create ":devctl" minor
70025d765b044c6d8594bb965a2247a61e991a99johnny * node to support DEVCTL_DEVICE_* and DEVCTL_BUS_* ioctls
70025d765b044c6d8594bb965a2247a61e991a99johnny * to this bus.
70025d765b044c6d8594bb965a2247a61e991a99johnny cmn_err(CE_WARN, "npe: Failed to setup hotplug framework");
7a364d25fde47aa82704b12b5251bf7fac37f02eschwartz /* Second arg: initialize for pci_express root nexus */
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet pcip->pci_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE |
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet ddi_fm_init(devi, &pcip->pci_fmcap, &pcip->pci_fm_ibc);
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet ddi_fm_handler_register(devi, npe_fm_callback, NULL);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae PCIE_DIP2PFD(devi) = kmem_zalloc(sizeof (pf_data_t), KM_SLEEP);
70025d765b044c6d8594bb965a2247a61e991a99johnny/*ARGSUSED*/
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet pcip = ddi_get_soft_state(npe_statep, ddi_get_instance(devi));
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf /* Uninitialize pcitool support. */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Uninitialize hotplug support on this bus.
70025d765b044c6d8594bb965a2247a61e991a99johnnynpe_bus_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp,
70025d765b044c6d8594bb965a2247a61e991a99johnny * check for register number
70025d765b044c6d8594bb965a2247a61e991a99johnny if (pci_common_get_reg_prop(rdip, pci_rp) != DDI_SUCCESS)
70025d765b044c6d8594bb965a2247a61e991a99johnny * get ALL "reg" properties for dip, select the one of
70025d765b044c6d8594bb965a2247a61e991a99johnny * of interest. In x86, "assigned-addresses" property
70025d765b044c6d8594bb965a2247a61e991a99johnny * is identical to the "reg" property, so there is no
70025d765b044c6d8594bb965a2247a61e991a99johnny * need to cross check the two to determine the physical
70025d765b044c6d8594bb965a2247a61e991a99johnny * address of the registers.
70025d765b044c6d8594bb965a2247a61e991a99johnny * This routine still performs some validity checks to
70025d765b044c6d8594bb965a2247a61e991a99johnny * make sure that everything is okay.
70025d765b044c6d8594bb965a2247a61e991a99johnny * validate the register number.
70025d765b044c6d8594bb965a2247a61e991a99johnny * copy the required entry.
70025d765b044c6d8594bb965a2247a61e991a99johnny * free the memory allocated by ddi_prop_lookup_int_array
70025d765b044c6d8594bb965a2247a61e991a99johnny if (pci_common_get_reg_prop(rdip, pci_rp) != DDI_SUCCESS)
70025d765b044c6d8594bb965a2247a61e991a99johnny * check for unmap and unlock of address space
70025d765b044c6d8594bb965a2247a61e991a99johnny if ((mp->map_op == DDI_MO_UNMAP) || (mp->map_op == DDI_MO_UNLOCK)) {
49fbdd30212f016ddd49c4b5c997b0b827ff0962Erwin T Tsaur /* Check and see if MMCFG is supported */
649d4cce0c8ba57f2c399df82be95a0395cfeef2anish /* FALLTHROUGH */
70025d765b044c6d8594bb965a2247a61e991a99johnny * MEM64 requires special treatment on map, to check
70025d765b044c6d8594bb965a2247a61e991a99johnny * that the device is below 4G. On unmap, however,
70025d765b044c6d8594bb965a2247a61e991a99johnny * we can assume that everything is OK... the map
70025d765b044c6d8594bb965a2247a61e991a99johnny * must have succeeded.
70025d765b044c6d8594bb965a2247a61e991a99johnny /* FALLTHROUGH */
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * Adjust offset and length
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * A non-zero length means override the one in the regspec.
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet retval = ddi_map(dip, mp, (off_t)0, (off_t)0, vaddrp);
70025d765b044c6d8594bb965a2247a61e991a99johnny /* check for user mapping request - not legal for Config */
70025d765b044c6d8594bb965a2247a61e991a99johnny if (mp->map_op == DDI_MO_MAP_HANDLE && space == PCI_ADDR_CONFIG) {
70025d765b044c6d8594bb965a2247a61e991a99johnny cmn_err(CE_NOTE, "npe: Config mapping request from user\n");
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * Note that pci_fm_acc_setup() is called to serve two purposes
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * i) enable legacy PCI I/O style config space access
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * ii) register with FMA
70025d765b044c6d8594bb965a2247a61e991a99johnny /* Can't map config space without a handle */
70025d765b044c6d8594bb965a2247a61e991a99johnny /* record the device address for future reference */
70025d765b044c6d8594bb965a2247a61e991a99johnny cfp->c_funcnum = PCI_REG_FUNC_G(pci_rp->pci_phys_hi);
49fbdd30212f016ddd49c4b5c997b0b827ff0962Erwin T Tsaur /* Check if MMCFG is supported */
5c59319b8761ccd4b952eec8d5caecf298024607Dan Mick if (ddi_prop_lookup_int64_array(DDI_DEV_T_ANY, rdip, 0,
5c59319b8761ccd4b952eec8d5caecf298024607Dan Mick /* invalid property; give up */
5c59319b8761ccd4b952eec8d5caecf298024607Dan Mick /* Doesn't contain our bus; give up */
70025d765b044c6d8594bb965a2247a61e991a99johnny * range check
70025d765b044c6d8594bb965a2247a61e991a99johnny if ((offset >= length) || (len > length) || (offset + len > length))
70025d765b044c6d8594bb965a2247a61e991a99johnny * Adjust offset and length
70025d765b044c6d8594bb965a2247a61e991a99johnny * A non-zero length means override the one in the regspec.
70025d765b044c6d8594bb965a2247a61e991a99johnny * convert the pci regsec into the generic regspec used by the
70025d765b044c6d8594bb965a2247a61e991a99johnny * parent root nexus driver.
70025d765b044c6d8594bb965a2247a61e991a99johnny * We can't handle 64-bit devices that are mapped above
70025d765b044c6d8594bb965a2247a61e991a99johnny * 4G or that are larger than 4G.
70025d765b044c6d8594bb965a2247a61e991a99johnny if (pci_rp->pci_phys_mid != 0 || pci_rp->pci_size_hi != 0)
70025d765b044c6d8594bb965a2247a61e991a99johnny * Other than that, we can treat them as 32-bit mappings
70025d765b044c6d8594bb965a2247a61e991a99johnny /* FALLTHROUGH */
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet retval = ddi_map(dip, mp, (off_t)0, (off_t)0, vaddrp);
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * For config space gets force use of cautious access routines.
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet * These will handle default and protected mode accesses too.
70025d765b044c6d8594bb965a2247a61e991a99johnny/*ARGSUSED*/
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae pci_state_t *pci_p = ddi_get_soft_state(npe_statep,
70025d765b044c6d8594bb965a2247a61e991a99johnny cmn_err(CE_CONT, "?PCI Express-device: %s@%s, %s%d\n",
70025d765b044c6d8594bb965a2247a61e991a99johnny *(int *)result = 0;
70025d765b044c6d8594bb965a2247a61e991a99johnny totreg = (reglen * sizeof (int)) / sizeof (pci_regspec_t);
70025d765b044c6d8594bb965a2247a61e991a99johnny * We currently understand reporting of PCI_PM_IDLESPEED
70025d765b044c6d8594bb965a2247a61e991a99johnny * capability. Everything else is passed up.
70025d765b044c6d8594bb965a2247a61e991a99johnny (reqp->req.report_pmcap_req.cap == PCI_PM_IDLESPEED))
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet return (pci_common_peekpoke(dip, rdip, ctlop, arg, result));
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf /* X86 systems support PME wakeup from suspended state */
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae if ((asp->when == DDI_POST) && (asp->result == DDI_SUCCESS)) {
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae pf_init(rdip, (void *)pci_p->pci_fm_ibc, asp->cmd);
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf /* only do this for immediate children */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf if (asp->cmd == DDI_RESUME && asp->when == DDI_PRE &&
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf /* Not good, better stop now. */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf "Couldn't pre-resume device %p",
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf /* NOTREACHED */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf /* only do this for immediate children */
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae if (dsp->cmd == DDI_SUSPEND && dsp->when == DDI_POST &&
70025d765b044c6d8594bb965a2247a61e991a99johnny * npe_intr_ops
70025d765b044c6d8594bb965a2247a61e991a99johnnynpe_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op,
70025d765b044c6d8594bb965a2247a61e991a99johnny return (pci_common_intr_ops(pdip, rdip, intr_op, hdlp, result));
7a23d1009aa28ea040052630547929b9c5eb6ab4anish * Do not bind drivers to empty bridges.
7a23d1009aa28ea040052630547929b9c5eb6ab4anish * Fail above, if the bridge is found to be hotplug capable
70025d765b044c6d8594bb965a2247a61e991a99johnny if (pci_common_name_child(child, name, 80) != DDI_SUCCESS)
70025d765b044c6d8594bb965a2247a61e991a99johnny * Pseudo nodes indicate a prototype node with per-instance
70025d765b044c6d8594bb965a2247a61e991a99johnny * properties to be merged into the real h/w device node.
70025d765b044c6d8594bb965a2247a61e991a99johnny * The interpretation of the unit-address is DD[,F]
70025d765b044c6d8594bb965a2247a61e991a99johnny * where DD is the device id and F is the function.
70025d765b044c6d8594bb965a2247a61e991a99johnny * Try to merge the properties from this prototype
70025d765b044c6d8594bb965a2247a61e991a99johnny * node into real h/w nodes.
70025d765b044c6d8594bb965a2247a61e991a99johnny * Merged ok - return failure to remove the node.
70025d765b044c6d8594bb965a2247a61e991a99johnny /* workaround for DDIVS to run under PCI Express */
70025d765b044c6d8594bb965a2247a61e991a99johnny * If the "interrupts" property doesn't exist,
70025d765b044c6d8594bb965a2247a61e991a99johnny * this must be the ddivs no-intr case, and it returns
70025d765b044c6d8594bb965a2247a61e991a99johnny * DDI_SUCCESS instead of DDI_FAILURE.
70025d765b044c6d8594bb965a2247a61e991a99johnny * Create the ddi_parent_private_data for a pseudo
70025d765b044c6d8594bb965a2247a61e991a99johnny * The child was not merged into a h/w node,
70025d765b044c6d8594bb965a2247a61e991a99johnny * but there's not much we can do with it other
70025d765b044c6d8594bb965a2247a61e991a99johnny * than return failure to cause the node to be removed.
70025d765b044c6d8594bb965a2247a61e991a99johnny cmn_err(CE_WARN, "!%s@%s: %s.conf properties not merged",
70025d765b044c6d8594bb965a2247a61e991a99johnny if (ddi_prop_get_int(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS,
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae /* Disable certain errors on PCIe drivers for x86 platforms */
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae regs = pcie_get_aer_suce_mask() | npe_aer_suce_mask;
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * If URs are disabled, mask SERRs as well, otherwise the system will
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * still be notified of URs
337fc9e235877b459e389f54daf9833bbc645439anish if (pci_config_setup(child, &cfg_hdl) == DDI_SUCCESS) {
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae uint16_t device_id = (uint16_t)(bus_p->bus_dev_ven_id >> 16);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae uint16_t vendor_id = (uint16_t)(bus_p->bus_dev_ven_id & 0xFFFF);
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae /* Disable AER for certain NVIDIA Chipsets */
70025d765b044c6d8594bb965a2247a61e991a99johnny * Strip the node to properly convert it back to prototype form
70025d765b044c6d8594bb965a2247a61e991a99johnny * When retrofitting this module for pci_tools, functions such as open, close,
70025d765b044c6d8594bb965a2247a61e991a99johnny * and ioctl are now pulled into this module. Before this, the functions in
70025d765b044c6d8594bb965a2247a61e991a99johnny * the pcihp module were referenced directly. Now they are called or
70025d765b044c6d8594bb965a2247a61e991a99johnny * referenced through the pcihp cb_ops structure from functions in this module.
70025d765b044c6d8594bb965a2247a61e991a99johnnynpe_open(dev_t *devp, int flags, int otyp, cred_t *credp)
70025d765b044c6d8594bb965a2247a61e991a99johnny return ((pcihp_get_cb_ops())->cb_open(devp, flags, otyp, credp));
70025d765b044c6d8594bb965a2247a61e991a99johnnynpe_close(dev_t dev, int flags, int otyp, cred_t *credp)
70025d765b044c6d8594bb965a2247a61e991a99johnny return ((pcihp_get_cb_ops())->cb_close(dev, flags, otyp, credp));
70025d765b044c6d8594bb965a2247a61e991a99johnnynpe_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp)
70025d765b044c6d8594bb965a2247a61e991a99johnny int instance = PCIHP_AP_MINOR_NUM_TO_INSTANCE(minor);
70025d765b044c6d8594bb965a2247a61e991a99johnny pci_state_t *pci_p = ddi_get_soft_state(npe_statep, instance);
70025d765b044c6d8594bb965a2247a61e991a99johnny return (pci_common_ioctl(dip, dev, cmd, arg, mode, credp, rvalp));
70025d765b044c6d8594bb965a2247a61e991a99johnnynpe_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op,
70025d765b044c6d8594bb965a2247a61e991a99johnny return ((pcihp_get_cb_ops())->cb_prop_op(dev, dip, prop_op, flags,
70025d765b044c6d8594bb965a2247a61e991a99johnnynpe_info(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **result)
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet/*ARGSUSED*/
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreetnpe_fm_init(dev_info_t *dip, dev_info_t *tdip, int cap,
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreet/*ARGSUSED*/
00d0963faf2e861a4aef6b1bf28f99a5b2b20755dilpreetnpe_fm_callback(dev_info_t *dip, ddi_fm_error_t *derr, const void *no_used)
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * On current x86 systems, npe's callback does not get called for failed
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * loads. If in the future this feature is used, the fault PA should be
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * logged in the derr->fme_bus_specific field. The appropriate PCIe
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * error handling code should be called and needs to be coordinated with
eae2e508a8e70b1ec407b10bd068c080651bbe5ckrishnae * safe access handling.