gfxp_vgatext.c revision f4ce81cfdad23bacfdb147be77d8d5fbe7673847
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * CDDL HEADER START
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * The contents of this file are subject to the terms of the
4ab75253616c6d68e967c10221bb663c0bfa99dfmrj * Common Development and Distribution License (the "License").
4ab75253616c6d68e967c10221bb663c0bfa99dfmrj * You may not use this file except in compliance with the License.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * See the License for the specific language governing permissions
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * and limitations under the License.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * When distributing Covered Code, include this CDDL HEADER in each
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * If applicable, add the following below this CDDL HEADER, with the
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * fields enclosed by brackets "[]" replaced with your own identifying
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * information: Portions Copyright [yyyy] [name of copyright owner]
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * CDDL HEADER END
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Use is subject to license terms.
f67ca41a3fe371a8ac34045eb45b3c5449ee601crugrat/* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
f67ca41a3fe371a8ac34045eb45b3c5449ee601crugrat/* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */
f67ca41a3fe371a8ac34045eb45b3c5449ee601crugrat/* All Rights Reserved */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char red;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char green;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char blue;
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat unsigned int flags;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrattypedef enum pc_colors {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratstatic const unsigned char solaris_color_to_pc_color[16] = {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/* default structure for FBIOGATTR ioctl */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/* real_type owner */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/* fbtype: type h w depth cms size */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat { FBTYPE_SUNFAST_COLOR, TEXT_ROWS, TEXT_COLS, 1, 256, 0 },
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/* fbsattr: flags emu_type dev_specific */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat { 0, FBTYPE_SUN4COLOR, { 0 } },
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/* emu_types */
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat#define GFXP_IS_CONSOLE(softc) ((softc)->flags & GFXP_FLAG_CONSOLE)
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Global name used to write the softc pointer in, for the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * data wrapper vgatext_return_pointers()
60405de4d8688d96dd05157c28db3ade5c9bc234kzint gfxp_vgatext_detach(dev_info_t *devi, ddi_detach_cmd_t cmd,
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic int vgatext_devinit(struct vgatext_softc *, struct vis_devinit *data);
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_polled_copy(struct vis_polledio_arg *,
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_polled_display(struct vis_polledio_arg *,
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_polled_cursor(struct vis_polledio_arg *,
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyfstatic void vgatext_save_text(struct vgatext_softc *softc);
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyfstatic void vgatext_restore_textmode(struct vgatext_softc *softc);
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyfstatic int vgatext_suspend(struct vgatext_softc *softc);
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyfstatic void vgatext_resume(struct vgatext_softc *softc);
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_init_graphics(struct vgatext_softc *);
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic int vgatext_kdsetmode(struct vgatext_softc *softc, int mode);
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_get_cursor(struct vgatext_softc *softc,
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_set_cursor(struct vgatext_softc *softc, int row, int col);
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_hide_cursor(struct vgatext_softc *softc);
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_save_colormap(struct vgatext_softc *softc);
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic void vgatext_restore_colormap(struct vgatext_softc *softc);
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic int vgatext_get_pci_reg_index(dev_info_t *const devi,
60405de4d8688d96dd05157c28db3ade5c9bc234kz unsigned long himask, unsigned long hival, unsigned long addr,
60405de4d8688d96dd05157c28db3ade5c9bc234kzstatic int vgatext_get_isa_reg_index(dev_info_t *const devi,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (kmem_zalloc(sizeof (struct vgatext_softc), KM_SLEEP));
4e93fb0f6383eaac21897dcdae56b87118131e4drugratgfxp_check_for_console(dev_info_t *devi, struct vgatext_softc *softc,
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat * Based on Section 11.3, "PCI Display Subsystem Initialization",
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat * of the 1.1 PCI-to-PCI Bridge Architecture Specification
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat * determine if this is the boot console device. First, see
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat * if the SBIOS has turned on PCI I/O for this device. Then if
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat * this is PCI/PCI-E, verify the parent bridge has VGAEnable set.
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat if (pci_config_setup(devi, &pci_conf) != DDI_SUCCESS) {
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf ": can't get PCI conf handle");
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat /* If IO not enabled or ISA/EISA, just return */
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat if (!(softc->flags & GFXP_FLAG_CONSOLE) || !pci_pcie_bus)
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat * Check for VGA Enable in the Bridge Control register for all
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat * PCI/PCIEX parents. If not set all the way up the chain,
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat * this cannot be the boot console.
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat /* Verify still on the PCI/PCIEX parent tree */
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat if (pci_config_setup(pdevi, &ppci_conf) != DDI_SUCCESS) {
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat /* No registers on root node, done with check */
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat data16 = pci_config_get16(ppci_conf, PCI_BCNF_BCNTRL);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratgfxp_vgatext_attach(dev_info_t *devi, ddi_attach_cmd_t cmd,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat struct vgatext_softc *softc = (struct vgatext_softc *)ptr;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* DDI_ATTACH */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat softc->polledio.arg = (struct vis_polledio_arg *)softc;
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers mutex_init(&(softc->lock), NULL, MUTEX_DRIVER, NULL);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat error = ddi_prop_lookup_string(DDI_DEV_T_ANY, ddi_get_parent(devi),
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat cmn_err(CE_WARN, MYNAME ": can't determine parent type.");
60405de4d8688d96dd05157c28db3ade5c9bc234kz /* Not enable AGP and DRM by default */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat if (STREQ(parent_type, "isa") || STREQ(parent_type, "eisa")) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat reg_rnumber = vgatext_get_isa_reg_index(devi, 1, VGA_REG_ADDR,
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf ": can't find reg entry for registers");
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf ": can't find reg entry for memory");
f40ecdeb280b3d50f8821834c3268ded5874d428rugrat } else if (STREQ(parent_type, "pci") || STREQ(parent_type, "pciex")) {
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf ": can't find reg entry for registers");
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf ": can't find reg entry for memory");
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat cmn_err(CE_WARN, MYNAME ": unknown parent type \"%s\".",
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf (caddr_t *)&softc->regs.addr, reg_offset, VGA_REG_SIZE,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat softc->text_base = (caddr_t)softc->fb.addr + VGA_COLOR_BASE;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat softc->text_base = (caddr_t)softc->fb.addr + VGA_MONO_BASE;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat if (ddi_prop_lookup_string(DDI_DEV_T_ANY, ddi_root_node(),
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf DDI_PROP_DONTPASS, "console", &cons) == DDI_SUCCESS) {
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers error = ddi_prop_create(makedevice(DDI_MAJOR_T_UNKNOWN, unit),
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers devi, DDI_PROP_CANSLEEP, DDI_KERNEL_IOCTL, NULL, 0);
f4ce81cfdad23bacfdb147be77d8d5fbe7673847Edward Shu "Can not %s primary-controller "
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* only do this if not in graphics mode */
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat if ((vgatext_silent == 0) && (GFXP_IS_CONSOLE(softc))) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat (void) gfxp_vgatext_detach(devi, DDI_DETACH, (void *)softc);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/*ARGSUSED*/
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratgfxp_vgatext_detach(dev_info_t *devi, ddi_detach_cmd_t cmd,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat struct vgatext_softc *softc = (struct vgatext_softc *)ptr;
f4ce81cfdad23bacfdb147be77d8d5fbe7673847Edward Shu (void) ddi_prop_remove(DDI_DEV_T_ANY, devi, "primary-controller");
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf /* break; */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat cmn_err(CE_WARN, "gfxp_vgatext_detach: unknown cmd 0x%x\n",
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/*ARGSUSED*/
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratgfxp_vgatext_open(dev_t *devp, int flag, int otyp, cred_t *cred,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat struct vgatext_softc *softc = (struct vgatext_softc *)ptr;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (0);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/*ARGSUSED*/
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratgfxp_vgatext_close(dev_t devp, int flag, int otyp, cred_t *cred,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (0);
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilersdo_gfx_ioctl(int cmd, intptr_t data, int mode, struct vgatext_softc *softc)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat static char kernel_only[] =
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf "gfxp_vgatext_ioctl: %s is a kernel only ioctl";
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat if (ddi_copyout(&kd_mode, (void *)data, sizeof (int), mode))
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf err = vgatext_devinit(softc, (struct vis_devinit *)data);
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf if (err != 0) {
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf "gfxp_vgatext_ioctl: could not"
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf " initialize console");
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * At the moment, text mode is not considered to have
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * a color map.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat sizeof (struct fbgattr)))
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat sizeof (struct fbtype)))
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (0);
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers struct vgatext_softc *softc = (struct vgatext_softc *)ptr;
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers err = do_gfx_ioctl(cmd, data, mode, softc);
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * vgatext_save_text
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * vgatext_restore_textmode
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * vgatext_suspend
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * vgatext_resume
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Routines to save and restore contents of the VGA text area
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Mostly, this is to support Suspend/Resume operation for graphics
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * device drivers. Here in the VGAtext common code, we simply squirrel
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * away the contents of the hardware's text area during Suspend and then
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * put it back during Resume
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf unsigned i;
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf unsigned i;
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf cmn_err(CE_WARN, MYNAME ": unknown mode in vgatext_suspend.");
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Upon RESUME, the graphics device will always actually
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * be in TEXT mode even though the Xorg server did not
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * make that mode change itself (the suspend code did).
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * We want first, therefore, to restore textmode
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * operation fully, and then the Xorg server will
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * do the rest to restore the device to its
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * (hi resolution) graphics mode
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf cmn_err(CE_WARN, MYNAME ": unknown mode in vgatext_resume.");
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers extern void progressbar_stop(void);
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilersvgatext_kdsettext(struct vgatext_softc *softc)
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers for (i = 0; i < sizeof (softc->shadow); i++) {
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilersvgatext_kdsetgraphics(struct vgatext_softc *softc)
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilersvgatext_kdsetmode(struct vgatext_softc *softc, int mode)
4e93fb0f6383eaac21897dcdae56b87118131e4drugrat if ((mode == softc->mode) || (!GFXP_IS_CONSOLE(softc)))
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (0);
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers * In order to avoid racing with a starting X server,
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers * this needs to be a test and set that is performed in
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers * a single (softc->lock protected) ioctl into this driver.
48633f182599946aebd63dccdc852ad722b57d0eJan Setje-Eilers if (softc->mode == KD_TEXT && vgatext_silent == 1) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (0);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/*ARGSUSED*/
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratgfxp_vgatext_devmap(dev_t dev, devmap_cookie_t dhp, offset_t off, size_t len,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat struct vgatext_softc *softc = (struct vgatext_softc *)ptr;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (-1);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat cmn_err(CE_WARN, "vgatext: Can't map offset 0x%llx", off);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (-1);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (0);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratvgatext_devinit(struct vgatext_softc *softc, struct vis_devinit *data)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* initialize console instance */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (0);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * display a string on the screen at (row, col)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * assume it has been cropped to fit.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratvgatext_cons_display(struct vgatext_softc *softc, struct vis_consdisplay *da)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char *string;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char attr;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char ch;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char attr;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Sanity checks. This is a last-ditch effort to avoid damage
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * from brokenness or maliciousness above.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * To be fully general, we should copyin the data. This is not
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * really relevant for this text-only driver, but a graphical driver
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * should support these ioctls from userland to enable simple
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * system startup graphics.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat attr = (solaris_color_to_pc_color[da->bg_color & 0xf] << 4)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat vgatext_cons_display((struct vgatext_softc *)arg, da);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * screen-to-screen copy
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratvgatext_cons_copy(struct vgatext_softc *softc, struct vis_conscopy *ma)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned short *from;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned short *to;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned short *to_row_start;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned short *from_row_start;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned short *base;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Sanity checks. Note that this is a last-ditch effort to avoid
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * damage caused by broken-ness or maliciousness above.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Remember we're going to copy shorts because each
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * character/attribute pair is 16 bits.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* More sanity checks. */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat to_row_start = base + ((ma->t_row * TEXT_COLS) + ma->t_col);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat from_row_start = base + ((ma->s_row * TEXT_COLS) + ma->s_col);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat while (rows_to_move-- > 0) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Offset to the end of the region and copy backwards.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat while (rows_to_move-- > 0) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratvgatext_cons_cursor(struct vgatext_softc *softc, struct vis_conscursor *ca)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Sanity check. This is a last-ditch effort to avoid
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * damage from brokenness or maliciousness above.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat vgatext_cons_cursor((struct vgatext_softc *)arg, ca);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat/*ARGSUSED*/
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* Nothing at present */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugratvgatext_set_cursor(struct vgatext_softc *softc, int row, int col)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat vga_set_crtc(&softc->regs, VGA_CRTC_CLAH, addr >> 8);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat vga_set_crtc(&softc->regs, VGA_CRTC_CLAL, addr & 0xff);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat addr = (vga_get_crtc(&softc->regs, VGA_CRTC_CLAH) << 8) +
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * This code is experimental. It's only enabled if console is
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * set to graphics, a preliminary implementation of happyface boot.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* we are in graphics mode, set to text 80X25 mode */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* set misc registers */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat vga_set_reg(&softc->regs, VGA_MISC_W, VGA_MISC_TEXT);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* set sequencer registers */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* set crt controller registers */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < NUM_CRTC_REG; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* set graphics controller registers */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < NUM_GRC_REG; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* set attribute registers */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < NUM_ATR_REG; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat /* set palette */
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < VGA_TEXT_CMAP_ENTRIES; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat vga_put_cmap(&softc->regs, i, VGA_TEXT_PALETTES[i][0] << 2,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = VGA_TEXT_CMAP_ENTRIES; i < VGA8_CMAP_ENTRIES; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char atr_mode;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat extern unsigned char *ENCODINGS[];
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char *from;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned char *to;
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * The newboot code to use font plane 2 breaks NVIDIA
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * (and some ATI) behavior. Revert back to the S10
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * I'm embarassed to say that I don't know what these magic
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * sequences do, other than at the high level of "set the
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * memory window to allow font setup". I stole them straight
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * from "kd"...
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * This assumes 8x16 characters, which yield the traditional 80x25
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * screen. It really should support other character heights.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < 256; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (j = 0; j < bpc; j++)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < VGA_ATR_NUM_PLT; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat softc->attrib_palette[i] = vga_get_atr(&softc->regs, i);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < VGA8_CMAP_ENTRIES; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < VGA_ATR_NUM_PLT; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat vga_set_atr(&softc->regs, i, softc->attrib_palette[i]);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (i = 0; i < VGA8_CMAP_ENTRIES; i++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * search the entries of the "reg" property for one which has the desired
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * combination of phys_hi bits and contains the desired address.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * This version searches a PCI-style "reg" property. It was prompted by
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * issues surrounding the presence or absence of an entry for the ROM:
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * (a) a transition problem with PowerPC Virtual Open Firmware
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * (b) uncertainty as to whether an entry will be included on a device
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * with ROM support (and so an "active" ROM base address register),
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * but no ROM actually installed.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * See the note below on vgatext_get_isa_reg_index for the reasons for
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * returning the offset.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Note that this routine may not be fully general; it is intended for the
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * specific purpose of finding a couple of particular VGA reg entries and
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * may not be suitable for all reg-searching purposes.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned long himask,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned long hival,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned long addr,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf "reg", (caddr_t)®, &length) != DDI_PROP_SUCCESS) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (-1);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (index = 0; index < length / sizeof (pci_regspec_t); index++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat if (reg[index].pci_phys_low + reg[index].pci_size_low <= addr)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (-1);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * search the entries of the "reg" property for one which has the desired
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * combination of phys_hi bits and contains the desired address.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * This version searches a ISA-style "reg" property. It was prompted by
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * issues surrounding 8514/A support. By IEEE 1275 compatibility conventions,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * 8514/A registers should have been added after all standard VGA registers.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Unfortunately, the Solaris/Intel device configuration framework
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * (a) lists the 8514/A registers before the video memory, and then
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * (b) also sorts the entries so that I/O entries come before memory
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * It returns the "reg" index and offset into that register set.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * The offset is needed because there exist (broken?) BIOSes that
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * report larger ranges enclosing the standard ranges. One reports
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * 0x3bf for 0x21 instead of 0x3c0 for 0x20, for instance. Using the
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * offset adjusts for this difference in the base of the register set.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * Note that this routine may not be fully general; it is intended for the
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * specific purpose of finding a couple of particular VGA reg entries and
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat * may not be suitable for all reg-searching purposes.
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned long hival,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat unsigned long addr,
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf "reg", (caddr_t)®, &length) != DDI_PROP_SUCCESS) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (-1);
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat for (index = 0; index < length / sizeof (struct regspec); index++) {
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat if (reg[index].regspec_addr + reg[index].regspec_size <= addr)
fc1821fee2e1f208a4b5ff3e229e97b87979208arugrat return (-1);
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * This vgatext function is used to return the fb, and reg pointers
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * and handles for peer graphics drivers.