hwregs.c revision 27f7c58306b55fe9e0cfd2934039be1729b505e9
/*******************************************************************************
*
* control and status registers.
* $Revision: 1.183 $
*
******************************************************************************/
/******************************************************************************
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2006, Intel Corp.
* All rights reserved.
*
* 2. License
*
* 2.1. This is your license from Intel Corp. under its intellectual property
* rights. You may have additional license terms from the party that provided
* you this software, covering your right to use that party's intellectual
* property rights.
*
* 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
* copy of the source code appearing in this file ("Covered Code") an
* irrevocable, perpetual, worldwide license under Intel's copyrights in the
* base code distributed originally by Intel ("Original Intel Code") to copy,
* make derivatives, distribute, use and display any portion of the Covered
* Code in any form, with the right to sublicense such rights; and
*
* 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
* license (with the right to sublicense), under only those claims of Intel
* patents that are infringed by the Original Intel Code, to make, use, sell,
* offer to sell, and import the Covered Code and derivative works thereof
* solely to the minimum extent necessary to exercise the above copyright
* license, and in no event shall the patent license extend to any additions
* to or modifications of the Original Intel Code. No other license or right
* is granted directly or by implication, estoppel or otherwise;
*
* The above copyright and patent license is granted only if the following
* conditions are met:
*
* 3. Conditions
*
* 3.1. Redistribution of Source with Rights to Further Distribute Source.
* Redistribution of source code of any substantial portion of the Covered
* Code or modification with rights to further distribute source must include
* the above Copyright Notice, the above License, this list of Conditions,
* and the following Disclaimer and Export Compliance provision. In addition,
* Licensee must cause all Covered Code to which Licensee contributes to
* contain a file documenting the changes Licensee made to create that Covered
* Code and the date of any change. Licensee must include in that file the
* documentation of any changes made by any predecessor Licensee. Licensee
* must include a prominent statement that the modification is derived,
* directly or indirectly, from Original Intel Code.
*
* 3.2. Redistribution of Source with no Rights to Further Distribute Source.
* Redistribution of source code of any substantial portion of the Covered
* Code or modification without rights to further distribute source must
* include the following Disclaimer and Export Compliance provision in the
* addition, Licensee may not authorize further sublicense of source of any
* portion of the Covered Code, and must include terms to the effect that the
* license from Licensee to its licensee is limited to the intellectual
* property embodied in the software Licensee provides to its licensee, and
* not to intellectual property embodied in modifications its licensee may
* make.
*
* 3.3. Redistribution of Executable. Redistribution in executable form of any
* substantial portion of the Covered Code or modification must reproduce the
* above Copyright Notice, and the following Disclaimer and Export Compliance
* distribution.
*
* 3.4. Intel retains all right, title, and interest in and to the Original
* Intel Code.
*
* 3.5. Neither the name Intel nor any other trademark owned or controlled by
* Intel shall be used in advertising or otherwise to promote the sale, use or
* other dealings in products derived from or relating to the Covered Code
* without prior written authorization from Intel.
*
* 4. Disclaimer and Export Compliance
*
* 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
* HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
* IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
* INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
* UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
* IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
* PARTICULAR PURPOSE.
*
* 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
* OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
* COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
* SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
* CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
* HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
* SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
* LIMITED REMEDY.
*
* 4.3. Licensee shall not export, either directly or indirectly, any of this
* software or system incorporating such software without first obtaining any
* required license or other approval from the U. S. Department of Commerce or
* any other agency or department of the United States Government. In the
* event Licensee exports any such software from the United States or
* re-exports any such software from a foreign destination, Licensee shall
* compliance with all laws, regulations, orders, or other restrictions of the
* U.S. Export Administration Regulations. Licensee agrees that neither it nor
* software, or service, directly or indirectly, to any country for which the
* United States government or any agency thereof requires an export license,
* other governmental approval, or letter of assurance, without first obtaining
* such license, approval or letter.
*
*****************************************************************************/
#define __HWREGS_C__
#include "acpi.h"
#include "acnamesp.h"
#include "acevents.h"
#define _COMPONENT ACPI_HARDWARE
ACPI_MODULE_NAME ("hwregs")
/*******************************************************************************
*
* FUNCTION: AcpiHwClearAcpiStatus
*
* PARAMETERS: Flags - Lock the hardware or not
*
* RETURN: none
*
* DESCRIPTION: Clears all fixed and general purpose status bits
* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED
*
* NOTE: TBD: Flags parameter is obsolete, to be removed
*
******************************************************************************/
{
ACPI_CPU_FLAGS LockFlags = 0;
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/* Clear the fixed events */
{
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
}
/* Clear the GPE Bits in all GPE registers in all GPE blocks */
}
/*******************************************************************************
*
* FUNCTION: AcpiGetSleepTypeData
*
* PARAMETERS: SleepState - Numeric sleep state
* *SleepTypeA - Where SLP_TYPa is returned
* *SleepTypeB - Where SLP_TYPb is returned
*
* RETURN: Status - ACPI status
*
* DESCRIPTION: Obtain the SLP_TYPa and SLP_TYPb values for the requested sleep
* state.
*
******************************************************************************/
{
/* Validate parameters */
if ((SleepState > ACPI_S_STATES_MAX) ||
!SleepTypeA || !SleepTypeB)
{
}
/* Allocate the evaluation information block */
if (!Info)
{
}
/* Evaluate the namespace object containing the values for this state */
if (ACPI_FAILURE (Status))
{
"%s while evaluating SleepState [%s]\n",
goto Cleanup;
}
/* Must have a return object */
if (!Info->ReturnObject)
{
}
/* It must be of type Package */
{
}
/*
* The package must have at least two elements. NOTE (March 2005): This
* goes against the current ACPI spec which defines this object as a
* package with one encoded DWORD element. However, existing practice
* by BIOS vendors seems to be to have 2 or more elements, at least
* one per sleep type (A/B).
*/
{
"Sleep State return package does not have at least two elements"));
}
/* The first two elements must both be of type Integer */
!= ACPI_TYPE_INTEGER) ||
!= ACPI_TYPE_INTEGER))
{
"Sleep State return package elements are not both Integers (%s, %s)",
}
else
{
/* Valid _Sx_ package size, type, and value */
*SleepTypeA = (UINT8)
*SleepTypeB = (UINT8)
}
if (ACPI_FAILURE (Status))
{
"While evaluating SleepState [%s], bad Sleep object %p type %s",
}
}
/*******************************************************************************
*
* FUNCTION: AcpiHwGetRegisterBitMask
*
* PARAMETERS: RegisterId - Index of ACPI Register to access
*
* RETURN: The bitmask to be used when accessing the register
*
* DESCRIPTION: Map RegisterId into a register bitmask.
*
******************************************************************************/
{
if (RegisterId > ACPI_BITREG_MAX)
{
return (NULL);
}
return (&AcpiGbl_BitRegisterInfo[RegisterId]);
}
/*******************************************************************************
*
* FUNCTION: AcpiGetRegister
*
* PARAMETERS: RegisterId - ID of ACPI BitRegister to access
* ReturnValue - Value that was read from the register
* Flags - Lock the hardware or not
*
* RETURN: Status and the value read from specified Register. Value
* returned is normalized to bit0 (is shifted all the way right)
*
* DESCRIPTION: ACPI BitRegister read function.
*
* NOTE: TBD: Flags parameter is obsolete, to be removed
*
******************************************************************************/
{
UINT32 RegisterValue = 0;
/* Get the info structure corresponding to the requested ACPI Register */
if (!BitRegInfo)
{
}
/* Read from the register */
if (ACPI_SUCCESS (Status))
{
/* Normalize the value that was read */
>> BitRegInfo->BitPosition);
}
}
/*******************************************************************************
*
* FUNCTION: AcpiSetRegister
*
* PARAMETERS: RegisterId - ID of ACPI BitRegister to access
* Value - (only used on write) value to write to the
* Register, NOT pre-normalized to the bit pos
* Flags - Lock the hardware or not
*
* RETURN: Status
*
* DESCRIPTION: ACPI Bit Register write function.
*
* NOTE: TBD: Flags parameter is obsolete, to be removed
*
******************************************************************************/
{
UINT32 RegisterValue = 0;
/* Get the info structure corresponding to the requested ACPI Register */
if (!BitRegInfo)
{
}
/* Always do a register read first so we can insert the new bits */
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/*
* Decode the Register ID
* Register ID = [Register block ID] | [bit ID]
*
* Check bit ID to fine locate Register offset.
* Check Mask to determine Register offset, and then read-write.
*/
switch (BitRegInfo->ParentRegister)
{
case ACPI_REGISTER_PM1_STATUS:
/*
* Status Registers are different from the rest. Clear by
* writing 1, and writing 0 has no effect. So, the only relevant
* information is the single bit we're interested in, all others should
* be written as 0 so they will be left unchanged.
*/
if (Value)
{
RegisterValue = 0;
}
break;
case ACPI_REGISTER_PM1_ENABLE:
break;
/*
* Write the PM1 Control register.
* Note that at this level, the fact that there are actually TWO
* registers (A and B - and B may not exist) is abstracted.
*/
break;
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
break;
default:
break;
}
/* Normalize the value that was read */
}
/******************************************************************************
*
* FUNCTION: AcpiHwRegisterRead
*
* RegisterId - ACPI Register ID
* ReturnValue - Where the register value is returned
*
* RETURN: Status and the value read.
*
* DESCRIPTION: Read from the specified ACPI register
*
******************************************************************************/
{
ACPI_CPU_FLAGS LockFlags = 0;
if (ACPI_MTX_LOCK == UseLock)
{
}
switch (RegisterId)
{
case ACPI_REGISTER_PM1_STATUS: /* 16-bit access */
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/* PM1B is optional */
break;
case ACPI_REGISTER_PM1_ENABLE: /* 16-bit access */
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/* PM1B is optional */
break;
case ACPI_REGISTER_PM1_CONTROL: /* 16-bit access */
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
break;
case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
break;
case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
break;
case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
break;
default:
RegisterId));
break;
}
if (ACPI_MTX_LOCK == UseLock)
{
}
if (ACPI_SUCCESS (Status))
{
*ReturnValue = Value1;
}
}
/******************************************************************************
*
* FUNCTION: AcpiHwRegisterWrite
*
* RegisterId - ACPI Register ID
* Value - The value to write
*
* RETURN: Status
*
* DESCRIPTION: Write to the specified ACPI register
*
* NOTE: In accordance with the ACPI specification, this function automatically
* preserves the value of the following bits, meaning that these bits cannot be
* changed via this interface:
*
* PM1_CONTROL[0] = SCI_EN
* PM1_CONTROL[9]
* PM1_STATUS[11]
*
* ACPI References:
* 1) Hardware Ignored Bits: When software writes to a register with ignored
* bit fields, it preserves the ignored bit fields
* 2) SCI_EN: OSPM always preserves this bit position
*
******************************************************************************/
{
ACPI_CPU_FLAGS LockFlags = 0;
if (ACPI_MTX_LOCK == UseLock)
{
}
switch (RegisterId)
{
case ACPI_REGISTER_PM1_STATUS: /* 16-bit access */
/* Perform a read first to preserve certain bits (per ACPI spec) */
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/* Insert the bits to be preserved */
/* Now we can write the data */
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/* PM1B is optional */
break;
case ACPI_REGISTER_PM1_ENABLE: /* 16-bit access */
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/* PM1B is optional */
break;
case ACPI_REGISTER_PM1_CONTROL: /* 16-bit access */
/*
* Perform a read first to preserve certain bits (per ACPI spec)
*
* Note: This includes SCI_EN, we never want to change this bit
*/
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
/* Insert the bits to be preserved */
/* Now we can write the data */
if (ACPI_FAILURE (Status))
{
goto UnlockAndExit;
}
break;
case ACPI_REGISTER_PM1A_CONTROL: /* 16-bit access */
break;
case ACPI_REGISTER_PM1B_CONTROL: /* 16-bit access */
break;
case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
break;
case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
break;
case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
/* SMI_CMD is currently always in IO space */
break;
default:
break;
}
if (ACPI_MTX_LOCK == UseLock)
{
}
}
/******************************************************************************
*
* FUNCTION: AcpiHwLowLevelRead
*
* PARAMETERS: Width - 8, 16, or 32
* Value - Where the value is returned
* Reg - GAS register structure
*
* RETURN: Status
*
* DESCRIPTION: Read from either memory or IO space.
*
******************************************************************************/
{
/*
* Must have a valid pointer to a GAS structure, and
* a non-zero address within. However, don't return an error
* because the PM1A/B code must not fail if B isn't present.
*/
if (!Reg)
{
return (AE_OK);
}
/* Get a local copy of the address. Handles possible alignment issues */
if (!ACPI_VALID_ADDRESS (Address))
{
return (AE_OK);
}
*Value = 0;
/*
* Two address spaces supported: Memory or IO.
* PCI_Config is not supported here because the GAS struct is insufficient
*/
switch (Reg->AddressSpaceId)
{
break;
case ACPI_ADR_SPACE_SYSTEM_IO:
break;
default:
return (AE_BAD_PARAMETER);
}
"Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
return (Status);
}
/******************************************************************************
*
* FUNCTION: AcpiHwLowLevelWrite
*
* PARAMETERS: Width - 8, 16, or 32
* Value - To be written
* Reg - GAS register structure
*
* RETURN: Status
*
* DESCRIPTION: Write to either memory or IO space.
*
******************************************************************************/
{
/*
* Must have a valid pointer to a GAS structure, and
* a non-zero address within. However, don't return an error
* because the PM1A/B code must not fail if B isn't present.
*/
if (!Reg)
{
return (AE_OK);
}
/* Get a local copy of the address. Handles possible alignment issues */
if (!ACPI_VALID_ADDRESS (Address))
{
return (AE_OK);
}
/*
* Two address spaces supported: Memory or IO.
* PCI_Config is not supported here because the GAS struct is insufficient
*/
switch (Reg->AddressSpaceId)
{
break;
case ACPI_ADR_SPACE_SYSTEM_IO:
break;
default:
return (AE_BAD_PARAMETER);
}
"Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
return (Status);
}