7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * CDDL HEADER START
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * The contents of this file are subject to the terms of the
3ad553a7dabf3c8bcb69dd1ceeb13938fa526aedgavinm * Common Development and Distribution License (the "License").
3ad553a7dabf3c8bcb69dd1ceeb13938fa526aedgavinm * You may not use this file except in compliance with the License.
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * See the License for the specific language governing permissions
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * and limitations under the License.
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * When distributing Covered Code, include this CDDL HEADER in each
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * If applicable, add the following below this CDDL HEADER, with the
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * fields enclosed by brackets "[]" replaced with your own identifying
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * information: Portions Copyright [yyyy] [name of copyright owner]
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * CDDL HEADER END
e3d60c9bd991a9826cbfa63b10595d44e123b9c4Adrian Frost * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * Use is subject to license terms.
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu * Copyright (c) 2010, Intel Corporation.
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu * All rights reserved.
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * Generic x86 CPU Module
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * This CPU module is used for generic x86 CPUs when Solaris has no other
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * CPU-specific support module available. Code in this module should be the
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi * absolute bare-bones support and must be cognizant of both Intel and AMD etc.
20c794b39650d115e17a15983b6b82e46238cf45gavinm * Prevent generic cpu support from loading.
20c794b39650d115e17a15983b6b82e46238cf45gavinmstatic struct gcpu_chipshared *gcpu_shared[GCPU_MAX_CHIPID];
20c794b39650d115e17a15983b6b82e46238cf45gavinm * Our cmi_init entry point, called during startup of each cpu instance.
20c794b39650d115e17a15983b6b82e46238cf45gavinm * Allocate the state structure for this cpu. We will only
20c794b39650d115e17a15983b6b82e46238cf45gavinm * allocate the bank logout areas in gcpu_mca_init once we
20c794b39650d115e17a15983b6b82e46238cf45gavinm * know how many banks there are.
20c794b39650d115e17a15983b6b82e46238cf45gavinm gcpu = *datap = kmem_zalloc(sizeof (gcpu_data_t), KM_SLEEP);
20c794b39650d115e17a15983b6b82e46238cf45gavinm * Allocate a chipshared structure if no sibling cpu has already
20c794b39650d115e17a15983b6b82e46238cf45gavinm * allocated it, but allow for the fact that a sibling core may
20c794b39650d115e17a15983b6b82e46238cf45gavinm * be starting up in parallel.
20c794b39650d115e17a15983b6b82e46238cf45gavinm sp = kmem_zalloc(sizeof (struct gcpu_chipshared), KM_SLEEP);
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu mutex_init(&sp->gcpus_poll_lock, NULL, MUTEX_DRIVER, NULL);
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu mutex_init(&sp->gcpus_cfglock, NULL, MUTEX_DRIVER, NULL);
20c794b39650d115e17a15983b6b82e46238cf45gavinm osp = atomic_cas_ptr(&gcpu_shared[chipid], NULL, sp);
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi return (0);
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu * deconfigure gcpu_init()
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu * Keep shared data in cache for reuse.
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu /* Release reference count held in gcpu_init(). */
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * All cpu handles are initialized so we can begin polling now.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Furthermore, our virq mechanism requires that everything
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * be run on cpu 0 so we can assure that by starting from here.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * All cpu handles are initialized only once all cpus
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * are started, so we can begin polling post mp startup.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Yecmi_api_ver_t _cmi_api_version = CMI_API_VERSION_3;
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye GCPU_OP(gcpu_mca_trap, NULL), /* cmi_mca_trap */
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye GCPU_OP(gcpu_cmci_trap, NULL), /* cmi_cmci_trap */
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye GCPU_OP(gcpu_hdl_poke, NULL), /* cmi_hdl_poke */
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye GCPU_OP(NULL, gcpu_xpv_panic_callback), /* cmi_panic_callback */
7aec1d6e253b21f9e9b7ef68b4d81ab9859b51fecindi "Generic x86 CPU Module"