smbios.h revision 516627f338a630bcf9806a91aa873bbbae9a2fac
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * CDDL HEADER START
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80ab886d233f514d54c2a6bdeb9fdfd951bd6881wesolows * Common Development and Distribution License (the "License").
80ab886d233f514d54c2a6bdeb9fdfd951bd6881wesolows * You may not use this file except in compliance with the License.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * CDDL HEADER END
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi * Copyright 2015 Joyent, Inc.
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothier * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * Use is subject to license terms.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * This header file defines the interfaces available from the SMBIOS access
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * library, libsmbios, and an equivalent kernel module. This API can be used
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * to access DMTF SMBIOS data from a device, file, or raw memory buffer.
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * This is NOT a Public interface, and should be considered Unstable, as it is
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * subject to change without notice as the DMTF SMBIOS specification evolves.
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * Therefore, be aware that any program linked with this API in this
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * instance of illumos is almost guaranteed to break in the next release.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern "C" {
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Structure Table Entry Point. See DSP0134 5.2.1 for more information.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * The structure table entry point is located by searching for the anchor.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_entry {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws char smbe_eanchor[4]; /* anchor tag (SMB_ENTRY_EANCHOR) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbe_ecksum; /* checksum of entry point structure */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbe_major; /* major version of the SMBIOS spec */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbe_minor; /* minor version of the SMBIOS spec */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint16_t smbe_maxssize; /* maximum size in bytes of a struct */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbe_revision; /* entry point structure revision */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbe_format[5]; /* entry point revision-specific data */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws char smbe_ianchor[5]; /* intermed. tag (SMB_ENTRY_IANCHOR) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint16_t smbe_stlen; /* length in bytes of structure table */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint32_t smbe_staddr; /* physical addr of structure table */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint16_t smbe_stnum; /* number of structure table entries */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbe_bcdrev; /* BCD value representing DMI version */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_ENTRY_EANCHOR "_SM_" /* structure table entry point anchor */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_ENTRY_EANCHORLEN 4 /* length of entry point anchor */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_ENTRY_IANCHOR "_DMI_" /* intermediate anchor string */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_ENTRY_IANCHORLEN 5 /* length of intermediate anchor */
80ab886d233f514d54c2a6bdeb9fdfd951bd6881wesolows#define SMB_ENTRY_MAXLEN 255 /* maximum length of entry point */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * Structure type codes. The comments next to each type include an (R) note to
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * indicate a structure that is required as of SMBIOS v2.8 and an (O) note to
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * indicate a structure that is obsolete as of SMBIOS v2.8.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_CHASSIS 3 /* system enclosure or chassis (R) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_SLOT 9 /* upgradeable system slot (R) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_TYPE_OBDEVS 10 /* on-board devices (O) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_SYSCONFSTR 12 /* system configuration string table */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_MEMARRAY 16 /* physical memory array (R) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_MEMERR32 18 /* 32-bit memory error information */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_MEMARRAYMAP 19 /* memory array mapped address (R) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_TYPE_MEMDEVICEMAP 20 /* memory device mapped address */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_POINTDEV 21 /* built-in pointing device */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_SECURITY 24 /* hardware security settings */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_OOBRA 30 /* out-of-band remote access facility */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_MEMERR64 33 /* 64-bit memory error information */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_MGMTDEVCP 35 /* management device component */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_MGMTDEVDATA 36 /* management device threshold data */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_IPMIDEV 38 /* IPMI device information */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_TYPE_ADDINFO 40 /* additional information */
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothier#define SMB_TYPE_OBDEVEXT 41 /* on-board device extended info */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_TYPE_MCHI 42 /* mgmt controller host interface */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_OEM_LO 128 /* start of OEM-specific type range */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier#define SUN_OEM_EXT_PROCESSOR 132 /* processor extended info */
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothier#define SUN_OEM_EXT_PORT 136 /* port exteded info */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier#define SUN_OEM_PCIEXRC 138 /* PCIE RootComplex/RootPort info */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier#define SUN_OEM_EXT_MEMARRAY 144 /* phys memory array extended info */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier#define SUN_OEM_EXT_MEMDEVICE 145 /* memory device extended info */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_TYPE_OEM_HI 256 /* end of OEM-specific type range */
9c94f155585ea35e938fea603bc227c685223abdCheng Sean Ye * OEM string indicating "Platform Resource Management Specification"
9c94f155585ea35e938fea603bc227c685223abdCheng Sean Ye * compliance.
9c94f155585ea35e938fea603bc227c685223abdCheng Sean Ye * Some default values set by BIOS vendor
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * SMBIOS Common Information. These structures do not correspond to anything
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * in the SMBIOS specification, but allow library clients to more easily read
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information that is frequently encoded into the various SMBIOS structures.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_info {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_version {
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier#define SMB_CONT_BYTE 1 /* contained elements are byte size */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier#define SMB_CONT_WORD 2 /* contained elements are word size */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier#define SMB_CONT_MAX 255 /* maximum contained objects */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Bios Information. See DSP0134 Section 7.1 for more information.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * smbb_romsize is converted from the implementation format into bytes.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_bios {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint32_t smbb_segment; /* bios address segment location */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const uint8_t *smbb_xcflags; /* bios characteristics extensions */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws size_t smbb_nxcflags; /* number of smbb_xcflags[] bytes */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws smbios_version_t smbb_ecfwv; /* bios embedded ctrl f/w version */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_RSV0 0x00000001 /* reserved bit zero */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_RSV1 0x00000002 /* reserved bit one */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_BCNOTSUP 0x00000008 /* BIOS chars not supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_EISA 0x00000040 /* EISA is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_PCMCIA 0x00000100 /* PCMCIA is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_PLUGNPLAY 0x00000200 /* Plug and Play is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_FLASH 0x00000800 /* BIOS is Flash Upgradeable */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_SHADOW 0x00001000 /* BIOS shadowing is allowed */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_VLVESA 0x00002000 /* VL-VESA is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_ESCD 0x00004000 /* ESCD support is available */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_CDBOOT 0x00008000 /* Boot from CD is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_SELBOOT 0x00010000 /* Selectable Boot supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_ROMSOCK 0x00020000 /* BIOS ROM is socketed */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_PCMBOOT 0x00040000 /* Boot from PCMCIA supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_EDD 0x00080000 /* EDD Spec is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_NEC9800 0x00100000 /* int 0x13 NEC 9800 floppy */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_TOSHIBA 0x00200000 /* int 0x13 Toshiba floppy */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_525_360K 0x00400000 /* int 0x13 5.25" 360K floppy */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_525_12M 0x00800000 /* int 0x13 5.25" 1.2M floppy */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_35_720K 0x01000000 /* int 0x13 3.5" 720K floppy */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_35_288M 0x02000000 /* int 0x13 3.5" 2.88M floppy */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_I5_PRINT 0x04000000 /* int 0x5 print screen svcs */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_I9_KBD 0x08000000 /* int 0x9 8042 keyboard svcs */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_I14_SER 0x10000000 /* int 0x14 serial svcs */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_I17_PRINTER 0x20000000 /* int 0x17 printer svcs */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSFL_I10_CGA 0x40000000 /* int 0x10 CGA svcs */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_BIOSXB_1 0 /* bios extension byte 1 (7.1.2.1) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_BIOSXB_2 1 /* bios extension byte 2 (7.1.2.2) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB_ECFW_MAJ 4 /* extended ctlr f/w major version */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB_ECFW_MIN 5 /* extended ctlr f/w minor version */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB1_USBL 0x02 /* USB legacy is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB1_LS120 0x10 /* LS-120 boot is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB1_ATZIP 0x20 /* ATAPI ZIP drive boot is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB1_1394 0x40 /* 1394 boot is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB1_SMBAT 0x80 /* Smart Battery is supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB2_BBOOT 0x01 /* BIOS Boot Specification supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB2_FKNETSVC 0x02 /* F-key Network Svc boot supported */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BIOSXB2_ETCDIST 0x04 /* Enable Targeted Content Distrib. */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_BIOSXB2_UEFI 0x08 /* UEFI Specification supported */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_BIOSXB2_VM 0x10 /* SMBIOS table describes a VM */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS System Information. See DSP0134 Section 7.2 for more information.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * The current set of smbs_wakeup values is defined after the structure.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_system {
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Base Board description. See DSP0134 Section 7.3 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. smbb_flags and smbb_type definitions are below.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_bboard {
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint8_t smbb_contn; /* number of contained object hdls */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BBFL_MOTHERBOARD 0x01 /* board is a motherboard */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BBFL_NEEDAUX 0x02 /* auxiliary card or daughter req'd */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BBFL_REPLACABLE 0x08 /* board is field-replacable */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BBFL_HOTSWAP 0x10 /* board is hot-swappable */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BBT_PROCMEM 0xB /* processor/memory module */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Chassis description. See DSP0134 Section 7.4 for more information.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * We move the lock bit of the type field into smbc_lock for easier processing.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_chassis {
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint8_t smbc_elems; /* number of element records (n) */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint8_t smbc_elemlen; /* length of contained element (m) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent char smbc_sku[256]; /* SKU number (as a string) */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_CHT_CONVERTIBLE 0x1F /* convertible */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_CHT_DETACHABLE 0x20 /* detachable */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_CHSC_EILOCK 0x04 /* external interface locked out */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_CHSC_EIENAB 0x05 /* external interface enabled */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Processor description. See DSP0134 Section 7.5 for more details.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * If the L1, L2, or L3 cache handle is -1, the cache information is unknown.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * If the handle refers to something of size 0, that type of cache is absent.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * NOTE: Although SMBIOS exports a 64-bit CPUID result, this value should not
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * be used for any purpose other than BIOS debugging. illumos itself computes
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * its own CPUID value and applies knowledge of additional errata and processor
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * specific CPUID variations, so this value should not be used for anything.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_processor {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint32_t smbp_clkspeed; /* external clock speed in MHz */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi /* number of cores per processor socket */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent /* number of enabled cores per processor socket */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent /* number of threads per processor socket */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent /* processor characteristics (SMB_PRC_*) */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi uint16_t smbp_corecount2; /* core count 2 */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi uint16_t smbp_coresenabled2; /* cores enabled 2 */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi uint16_t smbp_threadcount2; /* thread count 2 */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRV_LEGACY(v) (!((v) & 0x80)) /* legacy voltage mode */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRV_FIXED(v) ((v) & 0x80) /* fixed voltage mode */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRSTATUS_PRESENT(s) ((s) & 0x40) /* socket is populated */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRSTATUS_STATUS(s) ((s) & 0x07) /* status (see below) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRS_BDISABLED 0x2 /* disabled in bios user setup */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRS_PDISABLED 0x3 /* disabled in bios from post error */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRC_NX 0x0020 /* execution protection */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRC_VT 0x0040 /* enhanced virtualization */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRC_PM 0x0080 /* power/performance control */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRF_PENTIUMII_XEON 0x10 /* Pentium II Xeon */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_PENTIUMIV_HT 0x15 /* Pentium 4 HT */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE_DUO_M 0x29 /* Core Duo mobile */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE_SOLO_M 0x2A /* Core Solo mobile */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_PRF_CORE_M 0x2C /* Intel Core M */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent /* AMD Turion II Ultra Dual-Core Mobile M */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_TURION2_2C_MM 0x39 /* AMD Turion II Dual-Core Mobile M */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_ATHLON2_2C_M 0x3A /* AMD Athlon II Dual-Core M */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_6100 0x3B /* AMD Opteron 6100 series */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_4100 0x3C /* AMD Opteron 4100 series */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_6200 0x3D /* AMD Opteron 6200 series */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_4200 0x3E /* AMD Opteron 4200 series */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_4300 0x4C /* AMD Opteron 4300 series */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_6300 0x4D /* AMD Opteron 6300 series */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_3300 0x4E /* AMD Opteron 3300 series */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_AMD_FIREPRO 0x4F /* AMD FirePro series */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRF_MICROSPARCIIep 0x53 /* microSPARC IIep */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_PRF_ATHLON_X4 0x66 /* AMD Athlon X4 Quad-Core */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_PRF_OPTERON_X1K 0x67 /* AMD Opteron X1000 */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_PRF_OPTERON_X2K 0x68 /* AMD Opteron X2000 APU */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_TURION64_M 0x86 /* Turion 64 Mobile */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_2C 0x87 /* AMD Opteron Dual-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_ATHLON64_X2_2C 0x88 /* AMD Athlon 64 X2 Dual-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_TURION64_X2_M 0x89 /* AMD Turion 64 X2 Mobile */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_4C 0x8A /* AMD Opteron Quad-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_3G 0x8B /* AMD Opteron 3rd Generation */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_PHENOM_FX_4C 0x8C /* AMD Phenom FX Quad-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_PHENOM_X4_4C 0x8D /* AMD Phenom X4 Quad-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_PHENOM_X2_2C 0x8E /* AMD Phenom X2 Dual-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_ATHLON_X2_2C 0x8F /* AMD Athlon X2 Dual-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_4C_3200 0xA1 /* Xeon Quad Core 3200 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_3000 0xA2 /* Xeon Dual Core 3000 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_4C_5300 0xA3 /* Xeon Quad Core 5300 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_5100 0xA4 /* Xeon Dual Core 5100 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_5000 0xA5 /* Xeon Dual Core 5000 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_LV 0xA6 /* Xeon Dual Core LV */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_ULV 0xA7 /* Xeon Dual Core ULV */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_7100 0xA8 /* Xeon Dual Core 7100 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_4C_5400 0xA9 /* Xeon Quad Core 5400 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_5200 0xAB /* Xeon Dual Core 5200 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_7200 0xAC /* Xeon Dual Core 7200 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_4C_7300 0xAD /* Xeon Quad Core 7300 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_4C_7400 0xAE /* Xeon Quad Core 7400 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_XC_7400 0xAF /* Xeon Multi Core 7400 */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRF_PENTIUMIII_XEON 0xB0 /* Pentium III Xeon */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_PRF_PENTIUMIII_SS 0xB1 /* Pentium III with SpeedStep */
42a58d9da2d06f11c75f3d4ef25f081457e81654sethg#define SMB_PRF_PENTIUM_EE 0xBC /* Pentium Extreme Edition */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE_SOLO 0xBD /* Intel Core Solo */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE2_DUO 0xBF /* Intel Core 2 Duo */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE2_SOLO 0xC0 /* Intel Core 2 Solo */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE2_EX 0xC1 /* Intel Core 2 Extreme */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE2_QUAD 0xC2 /* Intel Core 2 Quad */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE2_EX_M 0xC3 /* Intel Core 2 Extreme mobile */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE2_DUO_M 0xC4 /* Intel Core 2 Duo mobile */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CORE2_SOLO_M 0xC5 /* Intel Core 2 Solo mobile */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_CELERON_2C 0xC7 /* Celeron Dual-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_XC 0xD6 /* Intel Xeon Multi-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_3XXX 0xD7 /* Intel Xeon Dual-Core 3xxx */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_4C_3XXX 0xD8 /* Intel Xeon Quad-Core 3xxx */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_5XXX 0xDA /* Intel Xeon Dual-Core 5xxx */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_4C_5XXX 0xDB /* Intel Xeon Quad-Core 5xxx */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_2C_7XXX 0xDD /* Intel Xeon Dual-Core 7xxx */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_4C_7XXX 0xDE /* Intel Xeon Quad-Core 7xxx */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_XC_7XXX 0xDF /* Intel Xeon Multi-Core 7xxx */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_XEON_XC_3400 0xE0 /* Intel Xeon Multi-Core 3400 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_3000 0xE4 /* AMD Opteron 3000 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_SEMPRON_II 0xE5 /* AMD Sempron II */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_4C_EM 0xE6 /* AMD Opteron Quad-Core embedded */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_PHENOM_3C 0xE7 /* AMD Phenom Triple-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_TURIONU_2C_M 0xE8 /* AMD Turion Ultra Dual-Core mobile */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_TURION_2C_M 0xE9 /* AMD Turion Dual-Core mobile */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_ATHLON_2C 0xEA /* AMD Athlon Dual-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_SEMPRON_SI 0xEB /* AMD Sempron SI */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_PHENOM_II 0xEC /* AMD Phenom II */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_ATHLON_II 0xED /* AMD Athlon II */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_OPTERON_6C 0xEE /* AMD Opteron Six-Core */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_PRF_SEMPRON_M 0xEF /* AMD Sempron M */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Cache Information. See DSP0134 Section 7.8 for more information.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * If smba_size is zero, this indicates the specified cache is not present.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_cache {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint32_t smba_maxsize; /* maximum installed size in bytes */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint16_t smba_stype; /* supported SRAM types (SMB_CAT_*) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint16_t smba_ctype; /* current SRAM type (SMB_CAT_*) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smba_etype; /* error correction type (SMB_CAE_*) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smba_ltype; /* logical cache type (SMB_CAG_*) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_CAA_12WAY 0x09 /* 12-way set associative */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_CAA_24WAY 0x0A /* 24-way set associative */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_CAA_32WAY 0x0B /* 32-way set associative */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_CAA_48WAY 0x0C /* 48-way set associative */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_CAA_64WAY 0x0D /* 64-way set associative */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_CAA_20WAY 0x0E /* 20-way set associative */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Port Information. See DSP0134 Section 7.9 for more information.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * The internal reference designator string is also mapped to the location.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_port {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const char *smbo_iref; /* internal reference designator */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const char *smbo_eref; /* external reference designator */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbo_itype; /* internal connector type (SMB_POC_*) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbo_etype; /* external connector type (SMB_POC_*) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POC_DI25 0x19 /* 25p dual inline (p26 cut) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POC_CDROM 0x1C /* on-board sound from CDROM */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POC_MINI14 0x1D /* Mini-Centronics Type 14 */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POC_MINI26 0x1E /* Mini-Centronics Type 26 */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POC_MINIJACK 0x1F /* Mini-jack (headphones) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_POC_SATA 0x22 /* SAS/SATA plug receptacle */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POT_PP_XTAT 0x01 /* Parallel Port XT/AT compat */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POT_PP_ECPEPP 0x05 /* Parallel Port ECP/EPP */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POT_SP_XTAT 0x06 /* Serial Port XT/AT compat */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POT_SP_16450 0x07 /* Serial Port 16450 compat */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POT_SP_16550 0x08 /* Serial Port 16550 compat */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POT_SP_16550A 0x09 /* Serial Port 16550A compat */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POT_FIREWIRE 0x11 /* FireWrite (IEEE P1394) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_POT_PCMIIa 0x13 /* PCMCIA Type II (alternate) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Slot Information. See DSP0134 Section 7.10 for more information.
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * See DSP0134 7.10.5 for how to interpret the value of smbl_id.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_slot {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLT_MEM 0x0B /* proprietary memory card slot */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_M2_1DP 0x14 /* M.2 Socket 1-DP (Mechanical Key A) */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_M2_1SD 0x15 /* M.2 Socket 1-SD (Mechanical Key E) */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_M2_2 0x16 /* M.2 Socket 2 (Mechanical Key B) */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_M2_3 0x17 /* M.2 Socket 3 (Mechanical Key M) */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_MXM_II 0x19 /* MXM Type II */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_MXM_III 0x1A /* MXM Type III (standard connector) */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_MXM_III_HE 0x1B /* MXM Type III (HE connector) */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_MXM_V 0x1C /* MXM Type IV */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_MXM3_A 0x1D /* MXM 3.0 Type A */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_MXM3_B 0x1E /* MXM 3.0 Type B */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_PCIEG2_SFF 0x1F /* PCI Express Gen 2 SFF-8639 */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_SLT_PCIEG3_SFF 0x20 /* PCI Express Gen 3 SFF-8639 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE2G1 0xAC /* PCI Exp. Gen 2 x1 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE2G2 0xAD /* PCI Exp. Gen 2 x2 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE2G4 0xAE /* PCI Exp. Gen 2 x4 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE2G8 0xAF /* PCI Exp. Gen 2 x8 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE2G16 0xB0 /* PCI Exp. Gen 2 x16 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE3G1 0xB2 /* PCI Exp. Gen 3 x1 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE3G2 0xB3 /* PCI Exp. Gen 3 x2 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE3G4 0xB4 /* PCI Exp. Gen 3 x4 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE3G8 0xB5 /* PCI Exp. Gen 3 x8 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_SLT_PCIE3G16 0xB6 /* PCI Exp. Gen 3 x16 */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLCH1_UNKNOWN 0x01 /* characteristics unknown */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLCH1_SHARED 0x08 /* opening shared with other slot */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLCH1_PC16 0x10 /* slot supports PC Card-16 */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLCH1_PCZV 0x40 /* slot supports Zoom Video */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLCH1_PCMRR 0x80 /* slot supports Modem Ring Resume */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLCH2_PME 0x01 /* slot supports PME# signal */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLCH2_HOTPLUG 0x02 /* slot supports hot-plug devices */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_SLCH2_SMBUS 0x04 /* slot supports SMBus signal */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS On-Board Device Information. See DSP0134 Section 7.11 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. Any number of on-board device sections may be present, each
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * containing one or more records. The smbios_info_obdevs() function permits
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * the caller to retrieve one or more of the records from a given section.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_obdev {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const char *smbd_name; /* description string for this device */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS BIOS Language Information. See DSP0134 Section 7.14 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. The smbios_info_strtab() function can be applied using a
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * count of smbla_num to retrieve the other possible language settings.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_lang {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint_t smbla_fmt; /* language name format (see below) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_LFMT_LONG 0 /* <ISO639>|<ISO3166>|Encoding Method */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS System Event Log Information. See DSP0134 Section 7.16 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. Accessing the event log itself requires additional interfaces.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_evtype {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_evlog {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbev_method; /* data access method (see below) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbev_format; /* log header format (see below) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const smbios_evtype_t *smbev_typev; /* type descriptor array */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_EVM_1x1i_1x1d 0 /* I/O: 1 1b idx port, 1 1b data port */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_EVM_2x1i_1x1d 1 /* I/O: 2 1b idx port, 1 1b data port */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_EVM_1x2i_1x1d 2 /* I/O: 1 2b idx port, 1 1b data port */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_EVM_MEM32 3 /* Memory-Mapped 32-bit Physical Addr */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Physical Memory Array Information. See DSP0134 Section 7.17 for
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * more information. This describes a collection of physical memory devices.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_memarray {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbma_use; /* physical device functional purpose */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_MAL_SYSMB 0x03 /* system board or motherboard */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_MAL_PC98LB 0xA3 /* PC-98/Local bus add-on card */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Memory Device Information. See DSP0134 Section 7.18 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. One or more of these structures are associated with each
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * smbios_memarray_t. A structure is present even for unpopulated sockets.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * Unknown values are set to -1. A smbmd_size of 0 indicates unpopulated.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * WARNING: Some BIOSes appear to export the *maximum* size of the device
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * that can appear in the corresponding socket as opposed to the current one.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_memdevice {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint32_t smbmd_twidth; /* total width in bits including ecc */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint64_t smbmd_size; /* size in bytes (see note above) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const char *smbmd_dloc; /* physical device locator string */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const char *smbmd_bloc; /* physical bank locator string */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent uint16_t smbmd_clkspeed; /* configured clock speed */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent uint16_t smbmd_confvolt; /* configured voltage */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_MDF_REG 0x2000 /* Registered (Buffered) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_MDF_UNREG 0x4000 /* Unregistered (Unbuffered) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Memory Array Mapped Address. See DSP0134 Section 7.20 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. We convert start/end addresses into addr/size for convenience.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_memarrmap {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint32_t smbmam_width; /* number of devices that form a row */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint64_t smbmam_size; /* size in bytes of address range */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Memory Device Mapped Address. See DSP0134 Section 7.21 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. We convert start/end addresses into addr/size for convenience.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_memdevmap {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws id_t smbmdm_arrmap; /* memory array mapped address handle */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint64_t smbmdm_size; /* size in bytes of address range */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Hardware Security Settings. See DSP0134 Section 7.25 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. Only one such record will be present in the SMBIOS.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_hwsec {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint8_t smbh_adm_ps; /* administrator password status */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_HWSEC_PS_DISABLED 0x00 /* password disabled */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_HWSEC_PS_NOTIMPL 0x02 /* password not implemented */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_HWSEC_PS_UNKNOWN 0x03 /* password status unknown */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS System Boot Information. See DSP0134 Section 7.33 for more
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * information. The contents of the data varies by type and is undocumented
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * from the perspective of DSP0134 -- it seems to be left as vendor-specific.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * The (D) annotation next to SMB_BOOT_* below indicates possible data payload.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_boot {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const void *smbt_data; /* data buffer specific to status */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws size_t smbt_size; /* size of smbt_data buffer in bytes */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_OSFAIL 2 /* normal o/s failed to load */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_FWHWFAIL 3 /* firmware-detected hardware failure */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_OSHWFAIL 4 /* o/s-detected hardware failure */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_USERREQ 5 /* user-requested boot (keystroke) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_SECURITY 6 /* system security violation */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_PREVREQ 7 /* previously requested image (D) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_WATCHDOG 8 /* watchdog initiated reboot */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_RESV_LO 9 /* low end of reserved range */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_RESV_HI 127 /* high end of reserved range */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_OEM_LO 128 /* low end of OEM-specific range */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_OEM_HI 191 /* high end of OEM-specific range */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_PROD_LO 192 /* low end of product-specific range */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_BOOT_PROD_HI 255 /* high end of product-specific range */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS IPMI Device Information. See DSP0134 Section 7.39 and also
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * Appendix C1 of the IPMI specification for more information on this record.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_ipmi {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws smbios_version_t smbip_vers; /* BMC's IPMI specification version */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint32_t smbip_bus; /* bus ID of NV storage device, or -1 */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint16_t smbip_intr; /* interrupt number (or zero if none) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws uint16_t smbip_regspacing; /* i/o space register spacing (bytes) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_IPMI_T_KCS 0x01 /* KCS: Keyboard Controller Style */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_IPMI_T_SMIC 0x02 /* SMIC: Server Mgmt Interface Chip */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_IPMI_T_SSIF 0x04 /* SSIF: SMBus System Interface */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_IPMI_F_IOADDR 0x01 /* base address is in i/o space */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_IPMI_F_INTRSPEC 0x02 /* intr information is specified */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_IPMI_F_INTRHIGH 0x04 /* intr active high (else low) */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_IPMI_F_INTREDGE 0x08 /* intr is edge triggered (else lvl) */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent * SMBIOS Onboard Devices Extended Information. See DSP0134 Section 7.42
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothier * for more information.
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothiertypedef struct smbios_obdev_ext {
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothier const char *smboe_name; /* reference designation */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier * SMBIOS OEM-specific (Type 132) Processor Extended Information.
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint16_t smbpe_processor; /* extending processor handle */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint16_t *smbpe_apicid; /* strand Inital APIC IDs */
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothier * SMBIOS OEM-specific (Type 136) Port Extended Information.
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothiertypedef struct smbios_port_ext {
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothier uint16_t smbporte_port; /* port connector handle */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier * SMBIOS OEM-specific (Type 138) PCI-Express RC/RP Information.
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothiertypedef struct smbios_pciexrc {
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier * SMBIOS OEM-specific (Type 144) Memory Array Extended Information.
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint16_t smbmae_comp; /* component parent handle */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier * SMBIOS OEM-specific (Type 145) Memory Device Extended Information.
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint16_t smbmdeve_md; /* memory device handle */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint8_t smbmdeve_ncs; /* number of chip selects */
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothier uint8_t *smbmdeve_cs; /* array of chip select numbers */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * SMBIOS Interfaces. An SMBIOS image can be opened by either providing a file
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * pathname, device pathname, file descriptor, or raw memory buffer. Once an
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * image is opened the functions below can be used to iterate over the various
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * structures and convert the underlying data representation into the simpler
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * data structures described earlier in this header file. The SMB_VERSION
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * constant specified when opening an image indicates the version of the ABI
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * the caller expects and the DMTF SMBIOS version the client can understand.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * The library will then map older or newer data structures to that as needed.
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_VERSION_23 0x0203 /* SMBIOS encoding for DMTF spec 2.3 */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_VERSION_24 0x0204 /* SMBIOS encoding for DMTF spec 2.4 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_VERSION_25 0x0205 /* SMBIOS encoding for DMTF spec 2.5 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_VERSION_26 0x0206 /* SMBIOS encoding for DMTF spec 2.6 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_VERSION_27 0x0207 /* SMBIOS encoding for DMTF spec 2.7 */
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghent#define SMB_VERSION_28 0x0208 /* SMBIOS encoding for DMTF spec 2.8 */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_VERSION_30 0x0300 /* SMBIOS encoding for DMTF spec 3.0 */
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchi#define SMB_VERSION SMB_VERSION_30 /* SMBIOS latest version definitions */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_O_NOCKSUM 0x1 /* do not verify header checksums */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_O_NOVERS 0x2 /* do not verify header versions */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_O_ZIDS 0x4 /* strip out identification numbers */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_O_MASK 0x7 /* mask of valid smbios_*open flags */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_ID_NOTSUP 0xFFFE /* structure is not supported by BIOS */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#define SMB_ID_NONE 0xFFFF /* structure is a null reference */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwstypedef struct smbios_struct {
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const smbios_struct_t *, void *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern smbios_hdl_t *smbios_open(const char *, int, int, int *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern smbios_hdl_t *smbios_fdopen(int, int, int, int *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern smbios_hdl_t *smbios_bufopen(const smbios_entry_t *,
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws const void *, size_t, int, int, int *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern void smbios_checksum(smbios_hdl_t *, smbios_entry_t *);
516627f338a630bcf9806a91aa873bbbae9a2facJonathan Matthewextern boolean_t smbios_truncated(smbios_hdl_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern const char *smbios_errmsg(int);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_lookup_id(smbios_hdl_t *, id_t, smbios_struct_t *);
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothierextern int smbios_lookup_type(smbios_hdl_t *, uint_t, smbios_struct_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_iter(smbios_hdl_t *, smbios_struct_f *, void *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern void smbios_info_smbios(smbios_hdl_t *, smbios_entry_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_common(smbios_hdl_t *, id_t, smbios_info_t *);
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothierextern int smbios_info_contains(smbios_hdl_t *, id_t, uint_t, id_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern id_t smbios_info_bios(smbios_hdl_t *, smbios_bios_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern id_t smbios_info_system(smbios_hdl_t *, smbios_system_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_bboard(smbios_hdl_t *, id_t, smbios_bboard_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_chassis(smbios_hdl_t *, id_t, smbios_chassis_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_processor(smbios_hdl_t *, id_t, smbios_processor_t *);
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothierextern int smbios_info_extprocessor(smbios_hdl_t *, id_t,
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_cache(smbios_hdl_t *, id_t, smbios_cache_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_port(smbios_hdl_t *, id_t, smbios_port_t *);
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothierextern int smbios_info_extport(smbios_hdl_t *, id_t, smbios_port_ext_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_slot(smbios_hdl_t *, id_t, smbios_slot_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_obdevs(smbios_hdl_t *, id_t, int, smbios_obdev_t *);
03f9f63d24f0494b7d47b927090ad9045e396402Tom Pothierextern int smbios_info_obdevs_ext(smbios_hdl_t *, id_t, smbios_obdev_ext_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_strtab(smbios_hdl_t *, id_t, int, const char *[]);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern id_t smbios_info_lang(smbios_hdl_t *, smbios_lang_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern id_t smbios_info_eventlog(smbios_hdl_t *, smbios_evlog_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_memarray(smbios_hdl_t *, id_t, smbios_memarray_t *);
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothierextern int smbios_info_extmemarray(smbios_hdl_t *, id_t,
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_memarrmap(smbios_hdl_t *, id_t, smbios_memarrmap_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_memdevice(smbios_hdl_t *, id_t, smbios_memdevice_t *);
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothierextern int smbios_info_extmemdevice(smbios_hdl_t *, id_t,
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern int smbios_info_memdevmap(smbios_hdl_t *, id_t, smbios_memdevmap_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern id_t smbios_info_hwsec(smbios_hdl_t *, smbios_hwsec_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern id_t smbios_info_boot(smbios_hdl_t *, smbios_boot_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern id_t smbios_info_ipmi(smbios_hdl_t *, smbios_ipmi_t *);
074bb90d80fdbeb2d04a8450a55ecbc96de28785Tom Pothierextern int smbios_info_pciexrc(smbios_hdl_t *, id_t, smbios_pciexrc_t *);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * The smbios_*_desc() and smbios_*_name() interfaces can be used for utilities
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * such as smbios(1M) that wish to decode SMBIOS fields for humans. The _desc
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * functions return the comment string next to the #defines listed above, and
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * the _name functions return the appropriate #define identifier itself.
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghentextern const char *smbios_memdevice_rank_desc(uint_t);
6734c4b0468cc77a7871a5dd5c23a5562557d64cRobert Mustacchiextern const char *smbios_onboard_type_desc(uint_t);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mwsextern const char *smbios_processor_upgrade_desc(uint_t);
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghentextern const char *smbios_processor_core_flag_name(uint_t);
4e901881a1e657e1cbf12d7ef9b476ec373e7939Dale Ghentextern const char *smbios_processor_core_flag_desc(uint_t);
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#endif /* !_KERNEL */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * For SMBIOS clients within the kernel itself, ksmbios is used to refer to
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * the kernel's current snapshot of the SMBIOS, if one exists, and the
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws * ksmbios_flags tunable is the set of flags for use with smbios_open().
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#endif /* _KERNEL */
84ab085a13f931bc78e7415e7ce921dbaa14fcb3mws#endif /* _SYS_SMBIOS_H */