pmcs_mpi.h revision c280a92b706bf16eee2a24cc328c9b78d71cb38c
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*
*
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* PMC 8x6G Message Passing Interface Definitions
*/
#ifndef _PMCS_MPI_H
#define _PMCS_MPI_H
#ifdef __cplusplus
extern "C" {
#endif
#define PMCS_DWRD(x) (x << 2)
/*
* MPI Configuration Table Offsets
*/
#define PMCS_SIGNATURE 0x53434D50
#define PMCS_MPI_REVISION1 1
#define PMCS_FW_TYPE_RELEASED 0
#define PMCS_FW_TYPE_DEVELOPMENT 1
#define PMCS_FW_TYPE_ALPHA 2
#define PMCS_FW_TYPE_BETA 3
#define PMCS_MSGL(x) (x & 0xffff)
#define IQ_NORMAL_PRI_DEPTH_SHIFT 0
#define IQ_NORMAL_PRI_DEPTH_MASK 0xff
#define IQ_HIPRI_PRI_DEPTH_SHIFT 8
#define IQ_HIPRI_PRI_DEPTH_MASK 0xff00
#define GENERAL_EVENT_OQ_SHIFT 16
#define GENERAL_EVENT_OQ_MASK 0xff0000
#define DEVICE_HANDLE_REMOVED_SHIFT 24
#define DEVICE_HANDLE_REMOVED_MASK 0xff000000ul
}
}
/*
* I_T Nexus Target Event Notification Queue
*/
/*
* SSP Target Event Notification Queue
*/
/*
* I/O Abort Delay
*/
/*
* Customization Setting
*/
/*
* This specifies a log buffer in host memory for the MSGU.
*/
/*
* This specifies a log buffer in host memory for the IOP.
*/
/*
* Fatal Error Handling
*/
/*
* MPI GST Table Offsets
*/
#define PMCS_GST_BASE 0
#define PMCS_MPI_S(x) ((x) & 0x7)
#define PMCS_MPI_STATE_NIL 0
#define PMCS_MPI_STATE_INIT 1
#define PMCS_MPI_STATE_DEINIT 2
#define PMCS_MPI_STATE_ERR 3
/*
* MPI Inbound Queue Configuration Table Offsets
*
* Each Inbound Queue configuration area consumes 8 DWORDS (32 bit words),
* or 32 bytes.
*/
#define PMCS_IQC_PARMX(x) ((x) << 5)
#define PMCS_IQDX(x) ((x) & 0xffff)
/*
* MPI Outbound Queue Configuration Table Offsets
*
* Each Outbound Queue configuration area consumes 9 DWORDS (32 bit words),
* or 36 bytes.
*/
#define PMCS_OQC_PARMX(x) (x * 36)
#define PMCS_OQDX(x) ((x) & 0xffff)
#define PMCS_OQICT(x) ((x) & 0xffff)
#ifdef __cplusplus
}
#endif
#endif /* _PMCS_MPI_H */