/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
*/
/*
* This file is the principle header file for the PMCS driver
*/
#ifndef _PMCS_H
#define _PMCS_H
#ifdef __cplusplus
extern "C" {
#endif
#include <sys/isa_defs.h>
#include <sys/mdi_impldefs.h>
#include <sys/byteorder.h>
#include <sys/sysmacros.h>
struct pmcs_xscsi {
new : 1,
/* statlock protects both target stats and the special queue (sq) */
char *ua;
};
/*
* wq_recovery_tail in the pmcs_xscsi structure is a pointer to a command in
* the wait queue (wq). That pointer is the last command in the wait queue
* that needs to be reissued after device state recovery is complete. Commands
* that need to be retried are reinserted into the wq after wq_recovery_tail
* to maintain the order in which the commands were originally submitted.
*/
/*
* LUN representation. Just a LUN (number) and pointer to the target
* structure (pmcs_xscsi).
*/
struct pmcs_lun {
};
/*
* Interrupt coalescing values
*/
/*
* This structure is used to maintain state with regard to I/O interrupt
* coalescing.
*/
typedef struct pmcs_io_intr_coal_s {
typedef struct pmcs_cq_thr_info_s {
typedef struct pmcs_cq_info_s {
typedef struct pmcs_iocomp_cb_s {
typedef struct pmcs_iqp_trace_s {
char *head;
char *curpos;
/*
* Used by string-based softstate as hint to possible size.
*/
/*
* HBA iport node softstate
*/
struct pmcs_iport {
enum { /* unit address state in the phymap */
} ua_state;
/* SMP serialization */
};
struct pmcs_chunk {
};
/*
* HBA node (i.e. non-iport) softstate
*/
struct pmcs_hw {
/*
* Identity
*/
/*
* 16 possible initiator PHY WWNs
*/
/*
* Card State
*/
enum pwpstate {
} state;
/*
* Last reason for a soft reset
*/
enum pwp_last_reset_reason {
/*
* This HBA instance's iportmap and list of iport states.
* Note: iports_lock protects iports, iports_attached, and
* num_iports on the HBA softstate.
*/
int num_iports;
int phymap_active;
/*
* Locks
*/
/*
* FMA Capabilities
*/
int fm_capabilities;
/*
* Register Access Handles
*/
/*
* DMA Handles
*/
/*
* Register Pointers
*/
/*
* Message Passing and other offsets.
*
* mpi_offset is the offset within the fourth register set (mpi_regs)
* that contains the base of the MPI structures. Since this is actually
* set by the card firmware, it can change from startup to startup.
*
* The other offsets (gst, iqc, oqc) are for similar tables in
* MPI space, typically only accessed during setup.
*/
/*
* Inbound and outbound queue depth
*/
/*
* Kernel addresses and offsets for Inbound Queue Producer Indices
*
* See comments in pmcs_iomb.h about Inbound Queues. Since it
* is relatively expensive to go across the PCIe bus to read or
* write inside the card, we maintain shadow copies in kernel
* memory and update the card as needed.
*/
/*
* Kernel addresses and offsets for Outbound Queue Consumer Indices
*/
/*
* Driver's copy of the outbound queue indices
*/
/*
* DMA addresses for both Inbound and Outbound queues.
*/
/*
*
* See discussion in pmcs_def.h about how this is laid out.
*/
/*
* Scratch area pointer and DMA addrress for SATA and SMP operations.
*/
void *scratch;
/*
* Firmware info
*
* fwlogp: Pointer to block of memory mapped for the event logs
* fwlogp_aap1: Pointer to the beginning of the AAP1 event log
* fwlogp_iop: Pointer to the beginning of the IOP event log
* fwaddr: The physical address of fwlogp
*
* fwlogfile_aap1/iop: Path to the saved AAP1/IOP event logs
* fwlog_max_entries_aap1/iop: Max # of entries in each log
* fwlog_oldest_idx_aap1/iop: Index of oldest entry in each log
* fwlog_latest_idx_aap1/iop: Index of newest entry in each log
* fwlog_threshold_aap1/iop: % full at which we save the event log
* fwlog_findex_aap1/iop: Suffix to each event log's next filename
*
* Firmware event logs are written out to the filenames specified in
* fwlogp_aap1/iop when the number of entries in the in-memory copy
* reaches or exceeds the threshold value. The filenames are suffixed
* with .X where X is an integer ranging from 0 to 4. This allows us
* to save up to 5MB of event log data for each log.
*/
/*
* Internal register dump region and flash chunk DMA info
*/
/*
* Copies of the last read MSGU and IOP heartbeats.
*/
/*
* Card information, some determined during MPI setup
*/
/*
* Counter for the number of times watchdog fires. We can use this
* to throttle events which fire off of the watchdog, such as the
* forward progress detection routine.
*/
/*
* Interrupt Setup stuff.
*
* int_type defines the kind of interrupt we're using with this card.
* oqvec defines the relationship between an Outbound Queue Number and
* a MSI-X vector.
*/
enum {
} int_type;
/*
* Interrupt handle table and size
*/
int intr_cnt;
int intr_cap;
/*
* DMA S/G chunk list
*/
int nchunks;
/*
* Front of the DMA S/G chunk freelist
*/
/*
* PHY and Discovery Related Stuff
*
* The PMC chip can have up to 16 local phys. We build a level-first
* traversal tree of phys starting with the physical phys on the
* chip itself (i.e., treating the chip as if it were an expander).
*
* Our discovery process goes through a level and discovers what
* each entity is (and it's phy number within that expander's
* address space). It then configures each non-empty item (SAS,
* discover on that expander itself via REPORT GENERAL and
* DISCOVERY SMP commands, attaching the discovered entities
* to the next level. Then we step down a level and continue
* (and so on).
*
* The PMC chip maintains an I_T_NEXUS notion based upon our
* registering each new device found (getting back a device handle).
*
* Like with the number of physical PHYS being a maximum of 16,
* there are a maximum number of PORTS also being 16. Some
* events apply to PORTS entirely, so we track PORTS as well.
*/
/*
* Discovery-related items.
* config_lock: Protects config_changed and should never be held
* outside of getting or setting the value of config_changed or
* configuring.
* config_changed: Boolean indicating whether discovery needs to
* be restarted.
* configuring: 1 = discovery is running, 0 = discovery not running.
* NOTE: configuring is now in the bitfield above.
* config_restart_time is set by the tgtmap_[de]activate callbacks each
* time we decide we want SCSA to retry enumeration on some device.
* The watchdog timer will not fire discovery unless it has reached
* config_restart_time and config_restart is TRUE. This ensures that
* we don't ask SCSA to retry enumerating devices while it is still
* running.
* config_cv can be used by any thread waiting on the configuring
* bit to clear.
*/
/*
* Work Related Stuff
*
* Each command given to the PMC chip has an associated work structure.
* See the discussion in pmcs_def.h about work structures.
*/
/*
*/
/*
* Thread Level stuff.
*
* A number of tasks are done off worker thread taskq.
*/
/*
* Solaris target representation.
* targets = array of pointers to xscsi structures
* allocated by ssoftstate.
*/
/*
* Receptacle information - FMA
*/
/*
* fw_timestamp: Firmware timestamp taken after PHYs are started
* sys_timestamp: System timestamp taken at roughly the same time
* hrtimestamp is the hrtime at roughly the same time
* All of these are protected by the global pmcs_trace_lock.
*/
#ifdef DEBUG
#endif
};
extern void *pmcs_softc_state;
extern void *pmcs_iport_softstate;
/*
* Some miscellaneous, oft used strings
*/
extern const char pmcs_nowrk[];
extern const char pmcs_nomsg[];
extern const char pmcs_timeo[];
/*
* Other externs
*/
extern int modrootloaded;
#ifdef __cplusplus
}
#endif
#endif /* _PMCS_H */