sata_defs.h revision 8d483882aa3390058094b043f3d62187b5d1de03
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SATA_DEFS_H
#define _SATA_DEFS_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
/*
* Common ATA commands (subset)
*/
/*
*/
/*
* Power Managment Commands (subset)
*/
#define SATA_PWRMODE_STANDBY 0 /* standby mode */
/*
* SMART FEATURES Subcommands
*/
#define SATA_SMART_READ_DATA 0xd0
#define SATA_SMART_ATTR_AUTOSAVE 0xd2
#define SATA_SMART_EXECUTE_OFFLINE_IMM 0xd4
#define SATA_SMART_READ_LOG 0xd5
#define SATA_SMART_WRITE_LOG 0xd6
#define SATA_SMART_ENABLE_OPS 0xd8
#define SATA_SMART_DISABLE_OPS 0xd9
#define SATA_SMART_RETURN_STATUS 0xda
/*
* SET FEATURES Subcommands
*/
#define SATAC_SF_ENABLE_WRITE_CACHE 0x02
#define SATAC_SF_TRANSFER_MODE 0x03
#define SATAC_SF_DISABLE_RMSN 0x31
#define SATAC_SF_ENABLE_ACOUSTIC 0x42
#define SATAC_SF_DISABLE_READ_AHEAD 0x55
#define SATAC_SF_DISABLE_WRITE_CACHE 0x82
#define SATAC_SF_ENABLE_READ_AHEAD 0xaa
#define SATAC_SF_DISABLE_ACOUSTIC 0xc2
#define SATAC_SF_ENABLE_RMSN 0x95
/*
* SET FEATURES transfer mode values
*/
#define SATAC_TRANSFER_MODE_PIO_DEFAULT 0x00
#define SATAC_TRANSFER_MODE_PIO_DISABLE_IODRY 0x01
#define SATAC_TRANSFER_MODE_PIO_FLOW_CONTROL 0x08
#define SATAC_TRANSFER_MODE_MULTI_WORD_DMA 0x20
#define SATAC_TRANSFER_MODE_ULTRA_DMA 0x40
/*
* Download microcode subcommands
*/
/* Generic ATA definitions */
#define SATA_TAG_QUEUING_SHIFT 3
#define SATA_TAG_QUEUING_MASK 0x1f
/*
* Identify Device data
* Although both ATA and ATAPI devices' Identify Data have the same length,
* other type of device.
* Following is the ATA Device Identify data layout
*/
typedef struct sata_id {
/* WORD */
/* OFFSET COMMENT */
} sata_id_t;
/* Identify Device: general config bits - word 0 */
#define SATA_ID_SERIAL_OFFSET 10
#define SATA_ID_SERIAL_LEN 20
#define SATA_ID_MODEL_OFFSET 27
#define SATA_ID_MODEL_LEN 40
#define SATA_ID_FW_LEN 8
/* Identify Device: common capability bits - word 49 */
#define SATA_DMA_SUPPORT 0x0100
#define SATA_LBA_SUPPORT 0x0200
#define SATA_IORDY_DISABLE 0x0400
#define SATA_IORDY_SUPPORT 0x0800
#define SATA_STANDBYTIMER 0x2000
/* Identify Device: ai_validinfo (word 53) */
/* Identify Device: ai_majorversion (word 80) */
/* Identify (Packet) Device Word 88 */
/* All are SCT Command Transport support */
/* Identify Packet Device data definitions (ATAPI devices) */
/* Identify Packet Device: general config bits - word 0 */
#define SATA_ATAPI_TYPE_MASK 0xc000
#define SATA_ATAPI_ID_DEV_SHFT 8
/*
* Status bits from ATAPI Interrupt reason register (AT_COUNT) register
*/
/* ATAPI feature reg definitions */
/* ATAPI IDENTIFY_DRIVE capabilities word (49) */
#define SATA_ATAPI_ID_CAP_OVERLAP 0x2000
/*
* ATAPI Identify Packet Device word 62
*/
/*
* ATAPI signature bits
*/
#define SATA_ATAPI_SECTOR_SIZE 2048
#define SATA_ATAPI_HEADS 64
#define SATA_ATAPI_SECTORS_PER_TRK 32
/* SATA Capabilites bits (word 76) */
#define SATA_NCQ 0x100
#define SATA_2_SPEED 0x004
#define SATA_1_SPEED 0x002
/* SATA Features Supported (word 78) - not used */
/* SATA Features Enabled (word 79) - not used */
/*
* Generic NCQ related defines
*/
#define FIS_CMD_UPDATE 0x80
/*
* Status bits from AT_STATUS register
*/
/*
* Status bits from AT_ERROR register
*/
/*
* Bits from the device control register
*/
/* device_reg */
/* ATAPI transport version-in Inquiry data */
#define SATA_ATAPI_TRANS_VERSION(inq) \
/* Number of log entries per extended selftest log block */
#define ENTRIES_PER_EXT_SELFTEST_LOG_BLK 19
/* Number of entries per SCSI LOG SENSE SELFTEST RESULTS page */
#define SCSI_ENTRIES_IN_LOG_SENSE_SELFTEST_RESULTS 20
/* Length of a SCSI LOG SENSE SELFTEST RESULTS parameter */
#define SCSI_LOG_SENSE_SELFTEST_PARAM_LEN 0x10
#define DIAGNOSTIC_FAILURE_ON_COMPONENT 0x40
#define SCSI_COMPONENT_81 0x81
#define SCSI_COMPONENT_82 0x82
#define SCSI_COMPONENT_83 0x83
#define SCSI_COMPONENT_84 0x84
#define SCSI_COMPONENT_85 0x85
#define SCSI_COMPONENT_86 0x86
#define SCSI_COMPONENT_87 0x87
#define SCSI_COMPONENT_88 0x88
#define SCSI_ASC_ATA_DEV_FEAT_NOT_ENABLED 0x67
#define SCSI_ASCQ_ATA_DEV_FEAT_NOT_ENABLED 0x0b
#define SCSI_PREDICTED_FAILURE 0x5d
#define SCSI_GENERAL_HD_FAILURE 0x10
#define SCSI_INFO_EXCEPTIONS_PARAM_LEN 4
#define READ_LOG_EXT_LOG_DIRECTORY 0
#define READ_LOG_EXT_NCQ_ERROR_RECOVERY 0x10
#define SMART_SELFTEST_LOG_PAGE 6
#define EXT_SMART_SELFTEST_LOG_PAGE 7
/*
* SATA NCQ error recovery page (0x10)
*/
struct sata_ncq_error_recovery_page {
};
/*
* SMART data structures
*/
struct smart_data {
};
struct smart_selftest_log_entry {
};
#define NUM_SMART_SELFTEST_LOG_ENTRIES 21
struct smart_selftest_log {
struct smart_selftest_log_entry
};
struct smart_ext_selftest_log_entry {
};
struct smart_ext_selftest_log {
};
struct read_log_ext_directory {
};
/*
* SMART specific data
* These eventually need to go to a generic scsi hearder file
* for now they will reside here
*/
#define PC_CUMULATIVE_VALUES 0x01
#define PAGE_CODE_GET_SUPPORTED_LOG_PAGES 0x00
#define PAGE_CODE_SELF_TEST_RESULTS 0x10
#define PAGE_CODE_INFORMATION_EXCEPTIONS 0x2f
#define PAGE_CODE_SMART_READ_DATA 0x30
struct log_parameter {
};
/* param_ctrl_flag fields */
#define SMART_MAGIC_VAL_1 0x4f
#define SMART_MAGIC_VAL_2 0xc2
#define SMART_MAGIC_VAL_3 0xf4
#define SMART_MAGIC_VAL_4 0x2c
#define SCT_STATUS_LOG_PAGE 0xe0
/*
* Acoustic management
*/
struct mode_acoustic_management {
};
#define P_CNTRL_CURRENT 0
#define P_CNTRL_CHANGEABLE 1
#define P_CNTRL_DEFAULT 2
#define P_CNTRL_SAVED 3
#define ACOUSTIC_DISABLED 0
#define ACOUSTIC_ENABLED 1
#define MODEPAGE_ACOUSTIC_MANAG 0x30
/*
* sstatus field definitions
*/
#define SSTATUS_DET_SHIFT 0
#define SSTATUS_SPD_SHIFT 4
#define SSTATUS_IPM_SHIFT 8
/*
* sstatus DET values
*/
#define SSTATUS_DET_NODEV 0 /* No dev detected */
#define SSTATUS_GET_DET(x) \
(x & SSTATUS_DET)
#define SSTATUS_SET_DET(x, new_val) \
#define SSTATUS_SPD_NOLIMIT 0 /* No speed limit */
/*
* sstatus IPM values
*/
#define SSTATUS_GET_IPM(x) \
((x & SSTATUS_IPM) >> SSTATUS_IPM_SHIFT)
#define SSTATUS_SET_IPM(x, new_val) \
(x = (x & ~SSTATUS_IPM) | \
/*
* serror register fields
*/
/*
* S-Control Bridge port x register fields
*/
#define SCONTROL_DET_SHIFT 0
#define SCONTROL_SPD_SHIFT 4
#define SCONTROL_IPM_SHIFT 8
#define SCONTROL_SPM_SHIFT 12
#define SCONTROL_GET_DET(x) \
(x & SCONTROL_DET)
#define SCONTROL_SET_DET(x, new_val) \
#define SCONTROL_DET_NOACTION 0 /* Do nothing to port */
#define SCONTROL_SPD_NOLIMIT 0 /* No speed limit */
#define SCONTROL_IPM_NORESTRICT 0 /* No PM limit */
#define SCONTROL_SPM_NORESTRICT 0 /* No PM limits */
#ifdef __cplusplus
}
#endif
#endif /* _SATA_DEFS_H */