pci_tools.h revision 09b1eac246a4e627fcbd1ce5bf8005746cbe45ea
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_PCI_TOOLS_H
#define _SYS_PCI_TOOLS_H
#ifdef __cplusplus
extern "C" {
#endif
/*
* Versioning.
*/
#define PCITOOL_V1 1
#define PCITOOL_V2 2
#define PCITOOL_VERSION PCITOOL_V2
/* File suffixes for nexus pcitool nodes. */
#define PCI_MINOR_REG "reg"
#define PCI_MINOR_INTR "intr"
/*
* Ioctls for PCI tools.
*/
/* Get system interrupt information */
/*
* This file contains data structures for the pci tool.
*/
#define PCITOOL_CONFIG 0
#define PCITOOL_BAR0 1
#define PCITOOL_BAR1 2
#define PCITOOL_BAR2 3
#define PCITOOL_BAR3 4
#define PCITOOL_BAR4 5
#define PCITOOL_BAR5 6
#define PCITOOL_ROM 7
/*
* Pass this through barnum to signal to use a base addr instead.
* This is for platforms which do not have a way to automatically map
* a selected bank to a base addr.
*/
#define PCITOOL_BASE 0xFF
/*
* BAR corresponding to space desired.
*/
typedef enum {
bar0 = PCITOOL_BAR0,
bar1 = PCITOOL_BAR1,
bar2 = PCITOOL_BAR2,
bar3 = PCITOOL_BAR3,
bar4 = PCITOOL_BAR4,
bar5 = PCITOOL_BAR5,
/*
* PCITOOL error numbers.
*/
typedef enum {
PCITOOL_SUCCESS = 0x0,
/*
* PCITOOL_DEVICE_SET_INTR ioctl data structure to re-assign the interrupts.
*/
typedef struct pcitool_intr_set {
/*
* Flags for pcitool_intr_get/set_t/info_t
*/
#define PCITOOL_INTR_FLAG_SET_GROUP 0x1
#define PCITOOL_INTR_FLAG_GET_MSI 0x2
#define PCITOOL_INTR_FLAG_SET_MSI 0x4
/*
* PCITOOL_DEVICE_GET_INTR ioctl data structure to dump out the
* ino mapping information.
*/
typedef struct pcitool_intr_dev {
typedef struct pcitool_intr_get {
/* returned - to kernel */
/* # devs returned - from kernel */
/* intrs enabled for devs if > 0 */
/* from kernel */
/*
* Get the size needed to return the number of devices wanted.
* Can't say num_devs - 1 as num_devs may be unsigned.
*/
#define PCITOOL_IGET_SIZE(num_devs) \
(sizeof (pcitool_intr_get_t) - \
sizeof (pcitool_intr_dev_t) + \
(num_devs * sizeof (pcitool_intr_dev_t)))
typedef struct pcitool_intr_info {
/*
* Interrupt controller types
*/
#define PCITOOL_CTLR_TYPE_UNKNOWN 0
#define PCITOOL_CTLR_TYPE_RISC 1
#define PCITOOL_CTLR_TYPE_UPPC 2
#define PCITOOL_CTLR_TYPE_PCPLUSMP 3
/*
* Size and endian fields for acc_attr bitmask.
*/
#define PCITOOL_ACC_ATTR_SIZE_MASK 0x3
#define PCITOOL_ACC_ATTR_SIZE_1 0x0
#define PCITOOL_ACC_ATTR_SIZE_2 0x1
#define PCITOOL_ACC_ATTR_SIZE_4 0x2
#define PCITOOL_ACC_ATTR_SIZE_8 0x3
#define PCITOOL_ACC_ATTR_ENDN_MASK 0x100
#define PCITOOL_ACC_ATTR_ENDN_LTL 0x0
#define PCITOOL_ACC_ATTR_ENDN_BIG 0x100
#define PCITOOL_ACC_IS_BIG_ENDIAN(x) (x & PCITOOL_ACC_ATTR_ENDN_BIG)
/*
* Data stucture to read and write to pci device registers.
* This is the argument to the following ioctls:
*/
typedef struct pcitool_reg {
/* BAR from pcitools_bar_t */
/* (DEVCTL_DEVICE_SET/GET_REG) */
/* to kernel */
#ifdef __cplusplus
}
#endif
#endif /* _SYS_PCI_TOOLS_H */