pci_impl.h revision bf8fc2340620695a402331e5da7c7db43264174d
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9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * Use is subject to license terms.
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim#pragma ident "%Z%%M% %I% %E% SMI"
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kimextern "C" {
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * There are two ways to access the PCI configuration space on X86
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * Access method 2 is the older method
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * Access method 1 is the newer method and is preferred because
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * of the problems in trying to lock the configuration space
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * for MP machines using method 2. See PCI Local BUS Specification
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * Revision 2.0 section 3.6.4.1 for more details.
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * In addition, on IBM Sandalfoot and a few related machines there's
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim * still another mechanism. See PReP 1.1 section 6.1.7.
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim/* these macros apply to Configuration Mechanism #1 */
9e86db79b7d1bbc5f2f04e99954cbd5eae0e22bbHyon Kim (PCI_CONE | (((bus) & 0xff) << 16) | (((device & 0x1f)) << 11) \
typedef struct pci_acc_cfblk {
struct pci_bus_resource {
#ifdef _LP64
* For now, x86-only to avoid conflicts with <sys/memlist_impl.h>
#define PCI_CAP_SZUNKNOWN 0
((xspace) ? 0 : \
#ifdef __cplusplus