nxge_txc_hw.h revision 6f45ec7b0b964c3be967c4880e8867ac1e7763a5
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2006 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_NXGE_NXGE_TXC_HW_H
#define _SYS_NXGE_NXGE_TXC_HW_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
#include <nxge_defs.h>
/* Transmit Ring Scheduler Registers */
#define TXC_PORT_DMA_LIST 0 /* RW bit 23:0 */
#define TXC_DMA_DMA_LIST_MASK 0x0000000000FFFFFFULL
#define TXC_DMA_DMA_LIST_MASK_N2 0x000000000000FFFFULL
typedef union _txc_port_enable_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_port_enable_n2_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
/* Transmit Controller - Registers */
#define TXC_FZC_OFFSET 0x1000
#define TXC_FZC_CONTROL_OFFSET 0x100
#define TXC_DMA_MAX_BURST_SHIFT 0 /* RW bit 19:0 */
#define TXC_DMA_MAX_BURST_MASK 0x00000000000FFFFFULL
(channel * TXC_FZC_OFFSET))
typedef union _txc_dma_max_burst_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
/* DRR Performance Monitoring Register */
#define TXC_DMA_MAX_LENGTH_SHIFT /* RW bit 27:0 */
#define TXC_DMA_MAX_LENGTH_MASK 0x000000000FFFFFFFULL
(channel * TXC_FZC_OFFSET))
typedef union _txc_dma_max_length_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_DMA_LENGTH_SHIFT 0 /* RW bit 27:0 */
#define TXC_DMA_LENGTH_MASK 0x000000000FFFFFFFULL
typedef union _txc_control_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_control_n2_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_TRAINING_VECTOR 0 /* RW bit 32:0 */
#define TXC_TRAINING_VECTOR_MASK 0x00000000FFFFFFFFULL
typedef union _txc_training_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_DEBUG_SELECT_SHIFT 0 /* WO bit 5:0 */
#define TXC_DEBUG_SELECT_MASK 0x000000000000003FULL
typedef union _txc_debug_select_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_MAX_REORDER_MASK_2 (0xf)
#define TXC_MAX_REORDER_MASK_4 (0x7)
#define TXC_MAX_REORDER_SHIFT_BITS 8
typedef union _txc_max_reorder_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_PORT_CNTL_CLEAR 0x1
typedef union _txc_port_ctl_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_PKT_STUFF_PKTASY_MASK 0x000000000000FFFFULL
#define TXC_PKT_STUFF_REORDER_SHIFT 0 /* RW bit 31:16 */
#define TXC_PKT_STUFF_REORDER_MASK 0x00000000FFFF0000ULL
typedef union _txc_pkt_stuffed_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_PKTS_XMIT_SHIFT 0 /* RW bit 15:0 */
#define TXC_PKTS_XMIT_MASK 0x000000000000FFFFULL
#define TXC_BYTES_XMIT_MASK 0x00000000FFFF0000ULL
typedef union _txc_pkt_xmit_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
/* count 4 step 0x00100 */
typedef union _txc_roecc_ctl_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_roecc_st_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_ro_data0_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_ro_data1_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_ro_data2_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_ro_data3_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_ro_data4_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
/* count 4 step 0x00100 */
typedef union _txc_sfecc_ctl_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_sfecc_st_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_sf_data0_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_sf_data1_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_sf_data2_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_sf_data3_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_sf_data4_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_RO_TIDS_MASK 0x00000000FFFFFFFFULL
typedef union _txc_ro_tids_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_RO_STATE0_MASK 0x00000000FFFFFFFFULL
typedef union _txc_ro_state0_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_RO_STATE1_MASK 0x00000000FFFFFFFFULL
typedef union _txc_ro_state1_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_RO_STATE2_MASK 0x00000000FFFFFFFFULL
typedef union _txc_ro_state2_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_ro_state3_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef union _txc_ro_ctl_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_RO_ST_DATA0_MASK 0x00000000FFFFFFFFULL
typedef union _txc_ro_st_data0_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_RO_ST_DATA1_MASK 0x00000000FFFFFFFFULL
typedef union _txc_ro_st_data1_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_RO_ST_DATA2_MASK 0x00000000FFFFFFFFULL
typedef union _txc_ro_st_data2_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_RO_ST_DATA3_MASK 0x00000000FFFFFFFFULL
typedef union _txc_ro_st_data3_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_PORT_PACKET_REQ_MASK 0x00000000FFFFFFFFULL
typedef union _txc_port_packet_req_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
/* Reorder error bits in interrupt registers */
#define TXC_INT_STAT_SF_CORR_ERR 0x01
#define TXC_INT_STAT_SF_UNCORR_ERR 0x02
#define TXC_INT_STAT_RO_CORR_ERR 0x04
#define TXC_INT_STAT_RO_UNCORR_ERR 0x08
#define TXC_INT_STAT_REORDER_ERR 0x10
#define TXC_INT_STAT_PKTASSYDEAD 0x20
#define TXC_INT_STAT_DBG_MASK 0x00000000FFFFFFFFULL
typedef union _txc_int_stat_dbg_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_INT_STAT_MASK 0x00000000FFFFFFFFULL
typedef union _txc_int_stat_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
#define TXC_INT_MASK_MASK 0x00000000FFFFFFFFULL
typedef union _txc_int_mask_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
/* 2 ports */
typedef union _txc_int_mask_n2_t {
struct {
#ifdef _BIG_ENDIAN
#endif
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#endif
} ldw;
#ifndef _BIG_ENDIAN
#endif
} bits;
typedef struct _txc_ro_states {
typedef struct _txc_sf_states {
#ifdef __cplusplus
}
#endif
#endif /* _SYS_NXGE_NXGE_TXC_HW_H */