nxge_sr_hw.h revision 6f45ec7b0b964c3be967c4880e8867ac1e7763a5
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2006 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_NXGE_NXGE_SR_HW_H
#define _SYS_NXGE_NXGE_SR_HW_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
#define ESR_NEPTUNE_DEV_ADDR 0x1E
#define ESR_NEPTUNE_BASE 0
#define ESR_PORT_ADDR_BASE 0
#define PCISR_DEV_ADDR 0x1E
#define PCISR_BASE 0
#define PCISR_PORT_ADDR_BASE 2
#define PB 0
/*
* Shift right by 1 because the PRM requires that all the serdes register
* address be divided by 2
*/
#define ESR_NEP_RX_TX_COMMON_CONTROL_L_ADDR() (ESR_NEPTUNE_BASE +\
(SR_RX_TX_COMMON_CONTROL >> 1))
#define ESR_NEP_RX_TX_COMMON_CONTROL_H_ADDR() (ESR_NEPTUNE_BASE +\
(SR_RX_TX_COMMON_CONTROL >> 1)\
+ 1)
#define ESR_NEP_RX_TX_RESET_CONTROL_L_ADDR() (ESR_NEPTUNE_BASE +\
(SR_RX_TX_RESET_CONTROL >> 1))
#define ESR_NEP_RX_TX_RESET_CONTROL_H_ADDR() (ESR_NEPTUNE_BASE +\
(SR_RX_TX_RESET_CONTROL >> 1)\
+ 1)
#define ESR_NEP_RX_POWER_CONTROL_L_ADDR() (ESR_NEPTUNE_BASE +\
(SR_RX_POWER_CONTROL >> 1))
#define ESR_NEP_RX_POWER_CONTROL_H_ADDR() (ESR_NEPTUNE_BASE +\
#define ESR_NEP_TX_POWER_CONTROL_L_ADDR() (ESR_NEPTUNE_BASE +\
(SR_TX_POWER_CONTROL >> 1))
#define ESR_NEP_TX_POWER_CONTROL_H_ADDR() (ESR_NEPTUNE_BASE +\
#define ESR_NEP_MISC_POWER_CONTROL_L_ADDR() (ESR_NEPTUNE_BASE +\
(SR_MISC_POWER_CONTROL >> 1))
#define ESR_NEP_MISC_POWER_CONTROL_H_ADDR() (ESR_NEPTUNE_BASE +\
(SR_MISC_POWER_CONTROL >> 1)\
+ 1)
typedef union _sr_rx_tx_common_ctrl_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_tx_common_ctrl_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
/* RX TX Common Control Register field values */
#define TDMASTER_LANE_A 0
#define TDMASTER_LANE_B 1
#define TDMASTER_LANE_C 2
#define TDMASTER_LANE_D 3
#define REVLBREFSEL_GBT_RBC_A_O 0
#define REVLBREFSEL_GBT_RBC_B_O 1
#define REVLBREFSEL_GBT_RBC_C_O 2
#define REVLBREFSEL_GBT_RBC_D_O 3
#define REFCLKR_FREQ_SIM 0
#define REFCLKR_FREQ_53_125 0x1
#define REFCLKR_FREQ_62_5 0x3
#define REFCLKR_FREQ_70_83 0x4
#define REFCLKR_FREQ_75 0x5
#define REFCLKR_FREQ_78_125 0x6
#define REFCLKR_FREQ_79_6875 0x7
#define REFCLKR_FREQ_83_33 0x8
#define REFCLKR_FREQ_85 0x9
#define REFCLKR_FREQ_100 0xA
#define REFCLKR_FREQ_104_17 0xB
#define REFCLKR_FREQ_106_25 0xC
#define REFCLKR_FREQ_120 0xF
#define REFCLKR_FREQ_125 0x10
#define REFCLKR_FREQ_127_5 0x11
#define REFCLKR_FREQ_141_67 0x13
#define REFCLKR_FREQ_150 0x15
#define REFCLKR_FREQ_156_25 0x16
#define REFCLKR_FREQ_159_375 0x17
#define REFCLKR_FREQ_170 0x19
#define REFCLKR_FREQ_212_5 0x1E
typedef union _sr_rx_tx_reset_ctrl_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_tx_reset_ctrl_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_power_ctrl_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_power_ctrl_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_tx_power_ctrl_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_tx_power_ctrl_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_misc_power_ctrl_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _misc_power_ctrl_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_tx_ctrl_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_tx_ctrl_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
#define RXPRESWIN_52US_300BITTIMES 0
#define RXPRESWIN_53US_300BITTIMES 1
#define RXPRESWIN_54US_300BITTIMES 2
#define RXPRESWIN_55US_300BITTIMES 3
typedef union _sr_rx_tx_tuning_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_tx_tuning_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_syncchar_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_syncchar_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_tx_test_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_rx_tx_test_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_glue_ctrl0_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union _sr_glue_ctrl0_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
#define BITLOCKTIME_64_CYCLES 0
#define BITLOCKTIME_128_CYCLES 1
#define BITLOCKTIME_256_CYCLES 2
#define BITLOCKTIME_300_CYCLES 3
#define BITLOCKTIME_384_CYCLES 4
#define BITLOCKTIME_512_CYCLES 5
#define BITLOCKTIME_1024_CYCLES 6
#define BITLOCKTIME_2048_CYCLES 7
typedef union _sr_glue_ctrl1_l {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
typedef union glue_ctrl1_h {
struct {
#if defined(_BIT_FIELDS_HTOL)
#elif defined(_BIT_FIELDS_LTOH)
#else
#endif
} bits;
#define TERM_CFG_67OHM 0
#define TERM_CFG_72OHM 1
#define TERM_CFG_80OHM 2
#define TERM_CFG_87OHM 3
#define TERM_CFG_46OHM 4
#define TERM_CFG_48OHM 5
#define TERM_CFG_52OHM 6
#define TERM_CFG_55OHM 7
#define INITTIME_60US 0
#define INITTIME_120US 1
#define INITTIME_240US 2
#define INITTIME_480US 3
#ifdef __cplusplus
}
#endif
#endif /* _SYS_NXGE_NXGE_SR_HW_H */