9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * CDDL HEADER START
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9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Common Development and Distribution License (the "License").
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * You may not use this file except in compliance with the License.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * See the License for the specific language governing permissions
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * and limitations under the License.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * When distributing Covered Code, include this CDDL HEADER in each
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * fields enclosed by brackets "[]" replaced with your own identifying
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5a047af5b368c7ae4914da7d7ad5d0bb7797464cBill Taylor * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Contains all the structure definitions and #defines for all Hermon
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hardware resources and registers (as defined by the Hermon register
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * specification). Wherever possible, the names in the Hermon spec
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * have been preserved in the structure and field names below.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * PCI IDs for supported chipsets
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define PCI_DEVID_HERMON_SDR 0x6340 /* Mellanox MT25208-SDR PCIe Gen1 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define PCI_DEVID_HERMON_DDR 0x634A /* Mellanox MT25208-DDR PCIe Gen1 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define PCI_DEVID_HERMON_DDRG2 0x6732 /* Mellanox MT25208-DDR PCIe Gen2 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define PCI_DEVID_HERMON_QDRG2 0x673C /* Mellanox MT25208-QDR PCIe Gen2 */
13cc0a0b8d667c14344b4ff49cc47350cd9ef182Bill Taylor#define PCI_DEVID_HERMON_QDRG2V 0x6746 /* Mellanox MT25208-QDR PCIe Gen2 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define PCI_DEVID_HERMON_MAINT 0x0191 /* Maintenance/Mem Controller Mode */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Native page size of the adapter
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Offsets into the CMD BAR (BAR 0) for many of the more interesting hardware
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * registers. These registers include the HCR (more below), and the software
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * reset register (SW_RESET).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_CMD_SW_RESET_OFFSET 0xF0010 /* PRM */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_CMD_SW_SEMAPHORE_OFFSET 0xF03FC /* PRM */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_CMD_OFFSET_MASK 0xFFFFF /* per MLX instruction */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Ownership flags used to define hardware or software ownership for
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * various Hermon resources
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Determines whether or not virtual-to-physical address translation is
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * required. Several of the Hermon hardware structures can be optionally
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * accessed by Hermon without going through the TPT address translation
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HCA Command Register (HCR)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The HCR command interface provides privileged access to the HCA in
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * order to query, configure and modify HCA execution. It is the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * primary mechanism through which mailboxes may be posted to Hermon
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * firmware. To use this interface software fills the HCR with pointers
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * to input and output mailboxes. Some commands support immediate
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * parameters, however, and for these commands the HCR will contain the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * input or output parameters. Command execution completion can be
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * detected either by the software polling the HCR or by waiting for a
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * command completion event.
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * Arbel/tavor "QUERY_DEV_LIM" == Hermon "QUERY_DEV_CAP" - Same hex code
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * same function as tavor/arbel QUERY_DEV_LIM, just renamed (whatever).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The QUERY_DEV_LIM command returns the device limits and capabilities
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * supported by the Hermon device. This command must be run before
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * running the INIT_HCA command (below) in order to determine the maximum
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * capabilities of the device and which optional features are supported.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rss_toep :1; /* rss toeplitz hashing */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t log_max_gso_sz :5; /* Lge Send Offload */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t mod_wr_srq :1; /* resize SRQ supported */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t blh :1; /* big LSO header, bit in WQE */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t ipv6_ex :1; /* offload w/ IPV6 ext hdrs */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fcoe_t11 :1; /* fcoenet T11 frame support */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t eth_uc_lb :1; /* enet unicast loopback */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fexch_base_mpt :7; /* FC exch base mpt num */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fcp_ud_base_qp :16; /* RC UD base qp num */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fexch_base_qp :8; /* FC exch base qp num */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t log_max_gso_sz :5; /* Lge Send Offload */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rss_toep :1; /* rss toeplitz hashing */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t mod_wr_srq :1; /* resize SRQ supported */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t eth_uc_lb :1; /* enet unicast loopback */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fcoe_t11 :1; /* fcoenet T11 frame support */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t ipv6_ex :1; /* offload w/ IPV6 ext hdrs */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t blh :1; /* big LSO header, bit in WQE */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fexch_base_qp :8; /* FC exch base qp num */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fcp_ud_base_qp :16; /* RC UD base qp num */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fexch_base_mpt :7; /* FC exch base mpt num */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon "QUERY_FW" command
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The QUERY_FW command retrieves the firmware revision and the Command
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Interface revision. The command also returns the HCA attached local
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * memory area (DDR) which is used by the firmware. Below we also
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * include some defines which are used to enforce a minimum firmware
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * version check (see hermon_fw_version_check() for more details).
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
5a047af5b368c7ae4914da7d7ad5d0bb7797464cBill Taylor * 2.6.000 is critical for some performance features, e.g., Reserved_Lkey,
5a047af5b368c7ae4914da7d7ad5d0bb7797464cBill Taylor * and 2.7.000 is needed for FRWR and FCoIB. Requiring 2.6.000 now so that
5a047af5b368c7ae4914da7d7ad5d0bb7797464cBill Taylor * existing customers get the performance, but are not required to upgrade
5a047af5b368c7ae4914da7d7ad5d0bb7797464cBill Taylor * to the latest. Less than 2.6.000 will cause the driver to attach in
5a047af5b368c7ae4914da7d7ad5d0bb7797464cBill Taylor * maintenance mode, and throw an FMA event about upgrading the firmware.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon "QUERY_ADAPTER" command
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The QUERY_ADAPTER command retrieves adapter specific parameters. The
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * command also retrieves the PCI(X) interrupt pin routing for each of
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the INTx# pins supported by the device. This information is used by
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the driver during interrupt processing in order to clear the appropriate
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * interrupt bit.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t vsd_vend_id :16; /* added v35 hermon */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t vsd_vend_id :16; /* added v35 hermon */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Virtual physical mapping structure for: MAP_FA, MAP_ICM_AUX, and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * MAP_ICM commands.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon "INIT_HCA" and "QUERY_HCA" commands
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The INIT_HCA command configures all HCA resources in HCA attached local
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * memory and some system relevant information. The same mailbox output
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * format is used by the QUERY_HCA command. All parameters, which are
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * specifically the output of the QUERY_HCA command are marked as
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * "QUERY_HCA only". These parameters are not configurable through the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * INIT_HCA command, but can be retrieved as read-only through the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * QUERY_HCA command.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Below we first define several structures which help make up the whole
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * of the INIT_HCA/QUERY_HCA command. These are:
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_qp_ee_cq_eq_rdb_t for "QPC/EEC/CQC/EQC/RDB Parameters",
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_udav_mem_param_t for "Memory Access Parameters for UDAV Table",
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_multicast_param_t for "Multicast Support Parameters",
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_tpt_param_t for "Translation and Protection Table Parameters",
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * and hermon_uar_param_t for Hermon "UAR Parameters".
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * need to consider removing any ref to "ee", hermon doesn't support
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * ee/rd stuff, and they've taken away the pretense
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * NEW for Hermon
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * QP Allocation Params
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * NOTE: as of PRM v0.50 no longer needed (ccq not supported
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * leave structure here, just in case ccq comes back )
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * but adjust the overall structure
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * not to use it
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rsvd[6]; /* but 0x14 def'd for fibre channel */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rsvd[6]; /* but 0x14 def'd for fibre channel */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t hca_core_clock :16; /* QUERY_HCA only */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t cqpm_short_pkt_lim :14; /* short pkt limit for qpm */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fcoe_t11 :1; /* fcoe t11 frame enable */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t hca_core_clock :16; /* QUERY_HCA only */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t cqpm_short_pkt_lim :14; /* short pkt limit for qpm */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t fcoe_t11 :1; /* fcoe t11 frame enable */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon "INIT_IB"/"INIT_PORT" command
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The INIT_IB/INIT_PORT command enables the physical layer of an IB port.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * It provides control over the IB port attributes. The capabilities
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * requested here should not exceed the device limits, as retrieved by
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the QUERY_DEV_LIM/CAP command (above). To query information about the IB
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * port or node, the driver may submit GetPortInfo or GetNodeInfo MADs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * through the Hermon MAD_IFC command.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Changed name to initport, but operates similar to initib - but as of
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * PRM v0.35c the initport just does that, and the params set previously
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * by initib are now set in SET_PORT
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON query_port and set_port commands. QUERY_PORT is new for hermon,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * doing some of what used to be done in the QUERY_DEV_CAP command. It is
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * introduced in PRM v0.35 and will need to be added to the list of
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * supported HCA commands
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * SET_PORT is similar to the SET_IB command from tavor and arbel. Here,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * tho, it's more extensive and will be easier to deal with I suspect by
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * making it a structure and filling it in and then doing the copy to the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * mailbox (instead of just writing the minimal information to the mailbox
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * directly as was done for the previous HCAs).
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * PRM 0.4X and 0.50 changed the query_port to integrate the ethernet
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * stuff as well, so this is a signficant change to the structure
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * Enet link speed - 0x0 10Gb XAUI, 0x01 10Gb XFI,
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * 0x02 1Gb, 0xF other
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * IB Link speed - bit 0 SDR, bit1 DDR, Bit 2 QDR
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * IB MTU - 0x0 rsvd, 0x1=256, 0x2=512, 0x3=1024, 0x4=2048, 0x5=4096
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * for next two if link down
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * -> what port supports, if up
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * -> what port is running
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor /* max vl's supported (not incl vl_15) */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * for next two if link down
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * -> what port supports, if up
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * -> what port is running
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * IB MTU - 0x0 rsvd, 0x1=256, 0x2=512, 0x3=1024, 0x4=2048, 0x5=4096
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * IB Link speed - bit 0 SDR, bit1 DDR, Bit 2 QDR
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * Enet link speed - 0x0 10Gb XAUI, 0x01 10Gb XFI,
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * 0x02 1Gb, 0xF other
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor /* max vl's supported (not incl vl_15) */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * the following structure is used for IB set port
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * others following are for ethernet set port
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rqk :1; /* reset qkey violation cntr */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t max_gid :16; /* valid if noted above */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t max_pkey :16; /* valid if noted above */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rqk :1; /* reset qkey violation cntr */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t max_pkey :16; /* valid if noted above */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t max_gid :16; /* valid if noted above */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * structures for ethernet setport
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * Which structure is used depends on low-16 of opmod
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * Low 8 == port number, 15:8 == selector
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * Or the following with port number
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_HW_ENET_OPMOD_SELECT_GEN 0x0000 /* general params */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_HW_ENET_OPMOD_SELECT_RQN 0x0100 /* rcv qpn calc */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_HW_ENET_OPMOD_SELECT_MAC 0x0200 /* MAC table conf */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_HW_ENET_OPMOD_SELECT_VLAN 0x0300 /* VLAN table conf */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_HW_ENET_OPMOD_SELECT_PRIO 0x0400 /* Priority table */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_HW_ENET_OPMOD_SELECT_GID 0x0500 /* GID Table */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * set port for enthernet, general parameters
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * Which structure
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* set_port for enet, RX QPM calculations Parameters */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* set_port for enet, MAC Table Configuration */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor struct hermon_hw_set_port_mact_entry_s mtable[128];
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor struct hermon_hw_set_port_mact_entry_s mtable[128];
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* set_port for enet, VLAN Table Configuration */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor struct hermon_hw_set_port_vlant_entry_s table[126];
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor struct hermon_hw_set_port_vlant_entry_s table[126];
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* set_port for enet, Priority table Parameters */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* note: GID table is same BIG or LITTLE ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Memory Protection Table (MPT) entries
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The Memory Protection Table (MPT) contains the information associated
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * with all the regions and windows. The MPT table resides in a virtually-
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * contiguous area in ICM, and the memory key (R_Key or L_Key) is used to
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * calculate the physical address for accessing the entries in the table.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The SW2HW_MPT command transfers ownership of an MPT entry from software
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * to hardware. The command takes the MPT entry from the input mailbox and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * stores it in the MPT in the hardware. The command will fail if the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * requested MPT entry is already owned by the hardware or if the MPT index
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * given in the command is inconsistent with the MPT entry memory key.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The QUERY_MPT command retrieves a snapshot of an MPT entry. The command
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * takes the current state of an MPT entry from the hardware and stores it
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * in the output mailbox. The command will fail if the requested MPT entry
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * is already owned by software.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Finally, the HW2SW_MPT command transfers ownership of an MPT entry from
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the hardware to the software. The command takes the MPT entry from the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hardware, invalidates it, and stores it in the output mailbox. The
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * command will fail if the requested entry is already owned by software.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The command will also fail if the MPT entry in question is a Memory
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Region which has Memory Windows currently bound to it.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following structure is used in the SW2HW_MPT, QUERY_MPT, and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HW2SW_MPT commands, and ONLY for the dMPT - for data.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t reg_win_len; /* dw 6-7, byte 0x18-1f */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t mtt_addr_l :29; /* dw 12, byte 0x30-33 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t reg_win_len; /* dw 6-7, byte 0x18-1f */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t mtt_addr_h :8; /* dw 11, byte 0x2c-2f */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t entity_sz :21; /* dw 14, byte 0x38-3b */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following structure is for the CMPTs. This is NEVER actually built and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * passed to the hardware - we use it to track information needed for the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * context entries, and to facilitate the alloc tracking. It differs from
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the dMPT sturcture above in that it does not have/need the "dif" stuff.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t reg_win_len; /* dw 6-7, byte 0x18-1f */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t mtt_addr_l :29; /* dw 12, byte 0x30-33 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t reg_win_len; /* dw 6-7, byte 0x18-1f */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t mtt_addr_h :8; /* dw 11, byte 0x2c-2f */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t entity_sz :21; /* dw 14, byte 0x38-3b */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Memory Translation Table (MTT) entries
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * After accessing the MPT table (above) and validating the access rights
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * to the region/window, Hermon address translation moves to the next step
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * where it translates the virtual address to a physical address. This
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * translation is performed using the Memory Translation Table entries
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * (MTT). Note: The MTT in hardware is organized into segments and each
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * segment contains multiple address translation pages (MTT entries).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Each memory region (MPT above) points to the first segment in the MTT
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * that corresponds to that region.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG_ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Event Queue Context Table (EQC) entries
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon supports 512 Event Queues, and the status of Event Queues is stored
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * in the Event Queue Context (EQC) table. The EQC table is a virtually-
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * contiguous memory structure in the ICM. Each EQC
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * table entry contains Event Queue status and information required by
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the hardware in order to access the event queue.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * NOTE that in Hermon (as opposed to earlier HCAs),
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * you have to allocate ICM for 2**32 (or about 16 M), even though
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * it doesn't support that many. See PRM v35. Also, some set of them
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * will be available for each domain in a virtual environment, needing to
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * rething the allocation and usage model for EQs - in the future.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following structure is used in the SW2HW_EQ, QUERY_EQ, and HW2SW_EQ
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The SW2HW_EQ command transfers ownership of an EQ context from software
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * to hardware. The command takes the EQC entry from the input mailbox and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * stores it in the EQC in the hardware. The command will fail if the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * requested EQC entry is already owned by the hardware. NOTE: the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * initialization of the cMPT for the EQC occurs implicitly as a result
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * of executing this command, and MR has/had to be adjusted for it.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The QUERY_EQ command retrieves a snapshot of an EQC entry. The command
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * stores the snapshot in the output mailbox. The EQC state and its values
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * are not affected by the QUERY_EQ command.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Finally, the HW2SW_EQ command transfers ownership of an EQC entry from
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the hardware to the software. The command takes the EQC entry from the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hardware and stores it in the output mailbox. The EQC entry will be
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * invalidated as a result of the command. It is the responsibility of the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * software to unmap all the events, which might have been previously
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * mapped to the EQ, prior to issuing the HW2SW_EQ command.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t rsrv1[2]; /* force it to 8b alignment */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t rsrv1[2]; /* force it to 8b alignment */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Event Queue Entries (EQE)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Each EQE contains enough information for the software to identify the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * source of the event. The following structures are used to define each
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * of the various kinds of events that the Hermon hardware will generate.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note: The hermon_hw_eqe_t below is the generic "Event Queue Entry". All
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * other EQEs differ only in the contents of their "event_data" field.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Below we first define several structures which define the contents of
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the "event_data" fields:
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_eqe_cq_t for "Completion Queue Events"
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_eqe_qp_evt_t for "Queue Pair Events" such as Path Migration
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Succeeded, Path Migration Failed, Communication Established, Send
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Queue Drained, Local WQ Catastrophic Error, Invalid Request Local
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * WQ Error, and Local Access Violation WQ Error.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_eqe_cqerr_t for "Completion Queue Error Events"
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_eqe_portstate_t for "Port State Change Events"
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_eqe_gpio_t for "GPIO State Change Events"
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_eqe_cmdcmpl_t for "Command Interface Completion Events"
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_eqe_operr_t for "Operational and Catastrophic Error Events"
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * such as EQ Overflow, Misbehaved UAR page, Internal Parity Error,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Uplink bus error, and DDR data error.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_hw_eqe_pgflt_t for "Not-present Page Fault on WQE or Data
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Buffer Access". (Note: Currently, this event is unsupported).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note also: The following structures are not #define'd with both
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * little-endian and big-endian definitions. This is because their
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * individual fields are not directly accessed except through the macros
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * defined below.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following macros are used for extracting (and in some cases filling in)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * information from EQEs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((htonl(((uint32_t *)(eqe))[1]) & HERMON_EQE_CQNUM_MASK) >> \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((htonl(((uint32_t *)(eqe))[1]) & HERMON_EQE_QPNUM_MASK) >> \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor (((((uint8_t *)(eqe))[12]) & HERMON_EQE_PORTNUM_MASK) >> \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon does ownership of CQ and EQ differently from Arbel & Tavor.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Now, you keep track of the TOTAL number of CQE's or EQE's that have been
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * processed, and the sense of the ownership bit changes each time through.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * That is, if the size of the queue is 16, so 4 bits [3:0] are the index
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * number, then bit [4] is the ownership bit in the count. So you mask that
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * bit and compare it to the owner bit in the entry - if the same, then the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * entry is in SW onwership. Otherwise, it's in hardware and the driver
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * does not consume it.
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_EQE_OWNER_IS_SW(eq, eqe, consindx, shift) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((((uint8_t *)(eqe))[0x1f] & HERMON_EQE_OWNER_MASK) == \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Completion Queue Context Table (CQC) entries
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The CQC table is a virtually-contiguous memory area residing in HCA's
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * ICM. Each CQC table entry contains information
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * required by the hardware to access the completion queue to post
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * completions (CQE).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following structure is used in the SW2HW_CQ, QUERY_CQ, RESIZE_CQ,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * and HW2SW_CQ commands.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The SW2HW_CQ command transfers ownership of an CQ context from software
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * to hardware. The command takes the CQC entry from the input mailbox and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * stores it in the CQC in the hardware. The command will fail if the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * requested CQC entry is already owned by the hardware.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The QUERY_CQ command retrieves a snapshot of a CQC entry. The command
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * stores the snapshot in the output mailbox. The CQC state and its values
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * are not affected by the QUERY_CQ command.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Finally, the HW2SW_CQ command transfers ownership of a CQC entry from
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the hardware to the software. The command takes the CQC entry from the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hardware and stores it in the output mailbox. The CQC entry will be
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * invalidated as a result of the command.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t rsrv1[8]; /* hermon, match DEV_CAP size */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t rsrv1[8]; /* hermon, match DEV_CAP size */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Completion Queue Entries (CQE)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Each CQE contains enough information for the software to associate the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * completion with the Work Queue Element (WQE) to which it corresponds.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note: The following structure is not #define'd with both little-endian
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * and big-endian definitions. This is because each CQE's individual
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * fields are not directly accessed except through the macros defined below.
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t ipoib_status; /* SMAC 31:0 or enet/ipoib/EoIB status */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following macros are used for extracting (and in some cases filling in)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * information from CQEs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor/* Byte offsets for IPoIB Checksum Offload fields */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_CQE_IPOK 0x10 /* byte 0x10 in cqe */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_CQE_IPOK_BIT 0x10 /* bitmask for OK bit */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor (((uint8_t *)(cqe))[HERMON_CQE_IPOK] & HERMON_CQE_IPOK_BIT)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((((uint8_t *)(cqe))[HERMON_CQE_CKSUM_15_8] << 8) | \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((htonl((((uint32_t *)(cqe)))[0]) & HERMON_CQE_QPNUM_MASK) >> \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_CQE_IMM_ETH_PKEY_CRED_GET(cq, cqe) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((htonl(((uint32_t *)(cqe))[2]) & HERMON_CQE_DQPN_MASK) >> \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor (((uint8_t *)(cqe))[8] & HERMON_CQE_PATHBITS_MASK)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((((uint8_t *)(cqe))[HERMON_CQE_SLID_15_8] << 8) | \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((((uint8_t *)(cqe))[12]) >> HERMON_CQE_SL_SHIFT)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((((uint8_t *)(cqe))[HERMON_CQE_WQECNTR_15_8] << 8) | \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_CQE_ERROR_VENDOR_SYNDROME_GET(cq, cqe) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor ((((uint8_t *)(cqe))[31]) & HERMON_CQE_OPCODE_MASK)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor (((((uint8_t *)(cqe))[31]) & HERMON_CQE_SENDRECV_MASK) >> \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor/* See Comment above for EQE - ownership of CQE is handled the same */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_CQE_OWNER_IS_SW(cq, cqe, considx, shift, mask) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor (((((uint8_t *)(cqe))[31] & HERMON_CQE_OWNER_MASK) >> \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Shared Receive Queue (SRQ) Context Entry Format
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rsrc0[80]; /* to match DEV_CAP size of 0x80 */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rsrc0[80]; /* to match DEV_CAP size of 0x80 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon MOD_STAT_CFG input mailbox structure
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint32_t reserved[22]; /* get to new enet stuff */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon MOD_STAT_CFG input modifier structure
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * NOTE: this might end up defined ONLY one way,
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * if usage is access via macros
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon UD Address Vector (UDAV)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon UDAV are used in conjunction with Unreliable Datagram (UD) send
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * WQEs. Each UD send message contains an address vector in in the datagram
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * segment. The verbs consumer must use special verbs to create and modify
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * address handles, each of which contains a UDAV structure. When posting
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * send WQEs to UD QP, the verbs consumer must supply a valid address
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_UDAV_MODIFY_MASK0 0xFCFFFFFFFF000000ULL
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_UDAV_MODIFY_MASK1 0xFF80F00000000000ULL
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* UDAV for enthernet */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Queue Pair Context Table (QPC) entries
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The QPC table is a virtually-contiguous memory area residing in HCA
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * ICM. Each QPC entry is accessed for reads and writes
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * by the HCA while executing work requests on the associated QP.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following structure is used in the RST2INIT_QP, INIT2INIT_QP,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * INIT2RTR_QP, RTR2RTS_QP, RTS2RTS_QP, SQERR2RTS_QP, TOERR_QP, RTS2SQD_QP,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * SQD2RTS_QP, TORST_QP, and QUERY_QP commands.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * With the exception of the QUERY_QP command, each of these commands reads
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * from some portion of the QPC in the input mailbox and modified the QPC
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * stored in the hardware. The QUERY_QP command retrieves a snapshot of a
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * QPC entry. The command stores the snapshot in the output mailbox. The
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * QPC state and its values are not affected by the QUERY_QP command.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Below we first define the hermon_hw_addr_path_t or "Hermon Address Path"
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * structure. This structure is used to provide address path information
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * (both primary and secondary) for each QP context. Note: Since this
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * structure is _very_ similar to the hermon_hw_udav_t structure above,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * we are able to leverage the similarity with filling in and reading from
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the two types of structures. See hermon_get_addr_path() and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * hermon_set_addr_path() in hermon_misc.c for more details.
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#endif /* LITTLE ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* The addr path includes RSS fields for RSS QPs */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#endif /* LITTLE ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor /* new w/ hermon */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t base_mkey :24; /* bits 32-8, low 7 m/b 0 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor /* new w/ hermon */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t base_mkey :24; /* bits 32-8, low 7 m/b 0 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#endif /* LITTLE ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Multicast Group Member (MCG)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon MCG are organized in a virtually-contiguous memory table (the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Multicast Group Table) in the ICM. This table is
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * actually comprised of two consecutive tables: the Multicast Group Hash
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Table (MGHT) and the Additional Multicast Group Members Table (AMGM).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Each such entry contains an MGID and a list of QPs that are attached to
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the multicast group. Each such entry may also include an index to an
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Additional Multicast Group Member Table (AMGM) entry. The AMGMs are
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * used to form a linked list of MCG entries that all map to the same hash
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * value. The MCG entry size is configured through the INIT_HCA command.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note: An MCG actually consists of a single hermon_hw_mcg_t and some
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * number of hermon_hw_mcg_qp_list_t (such that the combined structure is a
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * power-of-2).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following structures are used in the READ_MGM and WRITE_MGM commands.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The READ_MGM command reads an MCG entry from the multicast table and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * returns it in the output mailbox. Note: This operation does not affect
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the MCG entry state or values.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The WRITE_MGM command retrieves an MCG entry from the input mailbox and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * stores it in the multicast group table at the index specified in the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * command. Once the command has finished execution, the multicast group
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * table is updated. The old entry contents are lost.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor/* Multicast Group Member - QP List entries */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * ETHERNET ONLY Commands
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * The follow are new commands, used only for an Ethernet Port
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#else /* BIG ENDIAN */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* opmod for set_mcast_fltr */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * FC Command structures
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor/* ARM_RQ - limit water mark for srq & rq */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Structure for getting the peformance counters from the HCA
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#else /* BIG ENDIAN */
30e01c537fd78d139ff463ccb3ef064e7190f9a8Ramaswamy Tummala * Structure for getting the extended peformance counters from the HCA
30e01c537fd78d139ff463ccb3ef064e7190f9a8Ramaswamy Tummala#else /* BIG ENDIAN */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon User Access Region (UAR)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * JBDB : writeup on the UAR for memfree
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * JBDB : writeup on the structures
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * DB register
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * [es] and change it even further for hermon
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the whole UAR and doorbell record (dbr) approach is changed again
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * from arbel, and needs commenting
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * -- Tavor comment
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Tavor doorbells are each rung by writing to the doorbell registers that
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * form a User Access Region (UAR). A doorbell is a write-only hardware
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * register which enables passing information from software to hardware
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * with minimum software latency. A write operation from the host software
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * to these doorbell registers passes information about the HCA resources
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * and initiates processing of the doorbell data. There are 6 types of
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * doorbells in Tavor.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * "Send Doorbell" for synchronizing the attachment of a WQE (or a chain
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * of WQEs) to the send queue.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * "RD Send Doorbell" (Same as above, except for RD QPs) is not supported.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * "Receive Doorbell" for synchronizing the attachment of a WQE (or a chain
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * of WQEs) to the receive queue.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * "CQ Doorbell" for updating the CQ consumer index and requesting
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * completion notifications.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * "EQ Doorbell" for updating the EQ consumer index, arming interrupt
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * triggering, and disarming CQ notification requests.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * "InfiniBlast" (which would have enabled access to the "InfiniBlast
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * buffer") is not supported.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note: The tavor_hw_uar_t below is the container for all of the various
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * doorbell types. Below we first define several structures which make up
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the contents of those doorbell types.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note also: The following structures are not #define'd with both little-
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * endian and big-endian definitions. This is because each doorbell type
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * is not directly accessed except through a single ddi_put64() operation
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * (see tavor_qp_send_doorbell, tavor_qp_recv_doorbell, tavor_cq_doorbell,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * or tavor_eq_doorbell)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Send doorbell register structure
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor/* Max descriptors per Hermon doorbell */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * CQ doorbell register structure
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor /* consumer cntr of last polled completion */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_CQDB_CMDSN_SHIFT 0x1C /* dec 28 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor/* Default value for use in NOTIFY_CQ doorbell */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylortypedef struct hermon_hw_guest_eq_ci_s { /* guest op eq consumer index */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * UAR page structure, containing all doorbell registers
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t rsrv2[502]; /* next is at offset 0x800 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * QP (RQ, SRQ) doorbell record-specific data
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note that this structure is NOT in ICM, but just kept in host memory
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * and managed independently of PRM or other constraints. Also, though
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the qp/srq doorbell need to be only 4 bytes, it is 8 bytes in memory for
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * ease of management. Hermon defines its usage in the QP chapter.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * CQ (ARM and SET_CI) doorbell record-specific data
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * See comment above re: QP doorbell. This dbr is 8 bytes long, and its
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * usage is defined in PRM chapter on Completion Queues
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor /* sequence number of the doorbell ring % 4 */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Blue Flame (BF)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon has the ability to do a low-latency write of successive WQEs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * for the HCA. This utilizes part of the memory area behind the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * same BAR as the UAR page (see above) - half the area is devoted to
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * UAR pages, the other half to BlueFlame (though in fairness, the return
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * information from QUERY_DEV_CAP should be consulted _in case_ they ever
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * decide to change it.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * We define the structures to access them below.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Send Work Queue Element (WQE)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * A Hermon Send WQE is built of the following segments, each of which is a
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * multiple of 16 bytes. Note: Each individual WQE may contain only a
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * subset of these segments described below (according to the operation type
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * and transport type of the QP).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The first 16 bytes of ever WQE are formed from the "Ctrl" segment.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * This segment contains the address of the next WQE to be executed and the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * information required in order to allocate the resources to execute the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * next WQE. The "Ctrl" part of this segment contains the control
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * information required to execute the WQE, including the opcode and other
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * control information.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The "Datagram" segment contains address information required in order to
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * form a UD message.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The "Bind" segment contains the parameters required for a Bind Memory
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Window operation.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The "Remote Address" segment is present only in RDMA or Atomic WQEs and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * specifies remote virtual addresses and RKey, respectively. Length of
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * the remote access is calculated from the scatter/gather list (for
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * RDMA-write/RDMA-read) or set to eight (for Atomic).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The "Atomic" segment is present only in Atomic WQEs and specifies
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Swap/Add and Compare data.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note: The following structures are not #define'd with both little-endian
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * and big-endian definitions. This is because their individual fields are
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * not directly accessed except through macros defined below.
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * XRC remote buffer if impl
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * XRC 23:0, or DMAC 47:32& 8 bits of pad
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t cq_gen :2; /* 00=no cqe, 11= gen cqe */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor /* s-bit set means solicit bit in last packet */
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor * immediate OR invalidation key OR DMAC 31:0 depending
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_SEND_NOPCODE_INIT_AND_SEND 0xD
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SEND_NOPCODE_CONFIG 0x1F /* for ccq only */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SEND_SIGNALED_MASK 0x0000000C00000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SEND_SOLICIT_MASK 0x0000000200000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SEND_IMMEDIATE_MASK 0x0000000100000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SENDHDR_UD_AV_MASK 0xFFFFFFFFFFFFFFE0ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SENDHDR_BIND_ATOM 0x8000000000000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SENDHDR_BIND_WR 0x4000000000000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SENDHDR_BIND_RD 0x2000000000000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t mkey; /* swapped w/ addrh relative to arbel */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint64_t reg_len; /* w/ len_64 allows 65 bits of length */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon "MLX transport" Work Queue Element (WQE)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The format of the MLX WQE is similar to that of the Send WQE (above)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * with the following exceptions. MLX WQEs are used for sending MADs on
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * special QPs 0 and 1. Everything following the "Next/Ctrl" header
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * (defined below) consists of scatter-gather list entries. The contents
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * of these SGLs (also defined below) will be put on the wire exactly as
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * they appear in the buffers. In addition, the VCRC and the ICRC of each
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * sent packet can be modified by changing values in the following header
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * or in the payload of the packet itself.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t opcode :5; /* is 0x0A (send) for MLX */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor uint32_t icrc :1; /* 1==don't replace icrc fld */
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_MLXHDR_VL15_MASK 0x0002000000000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_MLXHDR_SLR_MASK 0x0001000000000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_MLXHDR_SIGNALED_MASK 0x0000000800000000ull
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Hermon Receive Work Queue Element (WQE)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Unlike the Send WQE, the Receive WQE is built ONLY of 16-byte segments. A
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * "Next/Ctrl" segment is no longer needed, because of the fixed
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * receive queue stride (RQ.STRIDE). It contains just
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * some number of scatter list entries for the incoming message.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The format of the scatter-gather list entries is shown below. For
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Receive WQEs the "inline_data" field must be cleared (i.e. data segments
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * cannot contain inline data).
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following defines are used when building descriptors for special QP
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * work requests (i.e. MLX transport WQEs). Note: Because Hermon MLX transport
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * requires the driver to build actual IB packet headers, we use these defines
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * for the most common fields in those headers.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * The following macros are used for building each of the individual
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * segments that can make up a Hermon WQE. Note: We try not to use the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * structures (with their associated bitfields) here, instead opting to
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * build and put 64-bit or 32-bit chunks to the WQEs as appropriate,
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * primarily because using the bitfields appears to force more read-modify-
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * write operations.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_UD - Builds Unreliable Datagram Segment
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_REMADDR - Builds Remote Address Segment using
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * RDMA info from the work request
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_RC_ATOMIC_REMADDR - Builds Remote Address Segment
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * for RC Atomic work requests
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_ATOMIC - Builds Atomic Segment using atomic
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * info from the work request
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_BIND - Builds the Bind Memory Window
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Segment using bind info from the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * work request
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_DATA_SEG - Builds the individual Data Segments
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * for Send, Receive, and MLX WQEs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_INLINE - Builds an "inline" Data Segment
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * (primarily for MLX transport)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_INLINE_ICRC - Also builds an "inline" Data Segment
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * (but used primarily in the ICRC
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * portion of MLX transport WQEs)
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_LINKNEXT - Links the current WQE to the
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * previous one
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_LINKFIRST - Links the first WQE on the current
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * chain to the previous WQE
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_MLX_LRH - Builds the inline LRH header for
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * MLX transport MADs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_MLX_GRH - Builds the inline GRH header for
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * MLX transport MADs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_MLX_BTH - Builds the inline BTH header for
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * MLX transport MADs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * HERMON_WQE_BUILD_MLX_DETH - Builds the inline DETH header for
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * MLX transport MADs
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor tmp[4] = ntohll((((uint64_t)((dest)->ud_dst_qpn & \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_BUILD_LSO(qp, ds, mss, hdr_sz) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor *(uint32_t *)(ds) = htonl(((mss) << 16) | hdr_sz);
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_BUILD_REMADDR(qp, ra, wr_rdma) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor tmp[1] = htonll((uint64_t)(wr_rdma)->rdma_rkey << 32); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_RC_ATOMIC_REMADDR(qp, rc, wr) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor tmp[0] = htonll((wr)->wr.rc.rcwr.atomic->atom_raddr); \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor tmp[1] = htonll((uint64_t)(wr)->wr.rc.rcwr.atomic->atom_rkey << 32); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_ATOMIC(qp, at, wr_atom) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor tmp[1] = htonll(((uint64_t)(wr_bind)->bind_rkey_out << 32) | \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_FRWR(qp, frwr_arg, pmr_arg) \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor ((flags & IBT_MR_ENABLE_REMOTE_ATOMIC) ? 0x80000000 : 0) | \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor ((flags & IBT_MR_ENABLE_REMOTE_WRITE) ? 0x40000000 : 0) | \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor ((flags & IBT_MR_ENABLE_REMOTE_READ) ? 0x20000000 : 0) | \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor ((flags & IBT_MR_ENABLE_LOCAL_WRITE) ? 0x10000000 : 0) | \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor ((flags & IBT_MR_ENABLE_WINDOW_BIND) ? 0x00200000 : 0)); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor lkey = (pmr->pmr_lkey & ~0xff) | pmr->pmr_key; \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor frwr64[1] = htonll(pmr->pmr_addr_list->p_laddr); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor ((uint32_t *)frwr64)[8] = htonl(pmr->pmr_offset); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor ((uint32_t *)frwr64)[9] = htonl(pmr->pmr_buf_sz); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor uint64_t *li64 = (uint64_t *)(void *)(li_arg); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor ((uint32_t *)li64)[2] = htonl((wr_li)->li_rkey); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_FCP3_INIT(ds, fctl, cs_pri, seq_id, mtu, \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor fc_init[1] = htonl((cs_pri) << 24 | (seq_id) << 16 | (mtu)); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor IBT_FCTL_GET_ABORT_FIELD(fctl) << 6 | (op) << 3 | 0x2); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor fc_init[3] = htonl((rem_exch) << 16 | (local_exch_idx)); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor membar_producer(); /* fc_init[0] is where the stamping is */ \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor fc_init[0] = htonl(((fctl) & IBT_FCTL_PRIO) << 6); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_DATA_SEG_RECV(ds, sgl) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor HERMON_WQE_SGL_BYTE_CNT_MASK) << 32) | (sgl)->ds_key)); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_DATA_SEG_SEND(ds, sgl) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor htonl((sgl)->ds_len & HERMON_WQE_SGL_BYTE_CNT_MASK); \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor *(uint32_t *)(ds) = htonl(HERMON_WQE_SGL_INLINE_MASK | (sz))
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_INLINE_ICRC(qp, ds, sz, icrc) \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor tmp[0] = htonl(HERMON_WQE_SGL_INLINE_MASK | (sz)); \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SET_CTRL_SEGMENT(desc, desc_sz, fence, \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor /* do not set the first dword (owner/opcode) here */ \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor cntr_tmp = strong | fccrc | sol | sig | cksum; \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_SET_MLX_CTRL_SEGMENT(desc, desc_sz, sig, maxstat, \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor cntr_tmp = (((maxstat << 4) | (sl & 0xff)) << 8) | sig; \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_WQE_BUILD_MLX_LRH(lrh, qp, udav, pktlen) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor lrh_tmp = HERMON_MLX_VL0_LVER | ((udav)->sl << 20); \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Note: The GRH payload length, calculated below, is the overall packet
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * length (in bytes) minus LRH header and GRH headers.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Also note: Filling in the GIDs in the way we do below is helpful because
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * it avoids potential alignment restrictions and/or conflicts.
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_MLX_GRH(state, grh, qp, udav, pktlen) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor grh_tmp |= (udav)->tclass << HERMON_MLX_TC_SHIFT; \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor grh_tmp = (((pktlen) << 2) - (sizeof (ib_lrh_hdr_t) + \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor sgid.gid_prefix = (state)->hs_sn_prefix[(qp)->qp_portnum]; \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor sgid.gid_guid = (state)->hs_guid[(qp)->qp_portnum] \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor bcopy(&(udav)->rgid_h, &tmp[6], sizeof (ib_gid_t)); \
17a2b317610f531d565bf4e940433aab2d9e6985Bill Taylor#define HERMON_WQE_BUILD_MLX_BTH(state, bth, qp, wr) \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor bth_tmp |= (IB_BTH_SOLICITED_EVENT_MASK << 16); \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor tmp[1] = htonl((wr)->wr.ud.udwr_dest->ud_dst_qpn & \
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Flash interface:
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * Below we have PCI config space space offsets for flash interface
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * access, offsets within Hermon CR space for accessing flash-specific
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * information or settings, masks used for flash settings, and
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor * timeout values for flash operations.
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_HW_FLASH_GPIO_PIN_ENABLE 0x1E000000
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_HW_FLASH_SPI_TRANS_SZ_4B 0x00000200
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#define HERMON_HW_FLASH_SPI_BOOT_ADDR_REG 0xF0000
9e39c5ba00a55fa05777cc94b148296af305e135Bill Taylor#endif /* _SYS_IB_ADAPTERS_HERMON_HW_H */