88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * CDDL HEADER START
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * The contents of this file are subject to the terms of the
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Common Development and Distribution License (the "License").
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * You may not use this file except in compliance with the License.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * See the License for the specific language governing permissions
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * and limitations under the License.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * When distributing Covered Code, include this CDDL HEADER in each
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * If applicable, add the following below this CDDL HEADER, with the
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * fields enclosed by brackets "[]" replaced with your own identifying
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * information: Portions Copyright [yyyy] [name of copyright owner]
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * CDDL HEADER END
436935a13231964207120b7e50a063b53b8e579cVladimir Kotal * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Use is subject to license terms.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmextern "C" {
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Deimos - cryptographic acceleration based upon Broadcom 582x.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Note: Everything in this file is private to the Deimos device
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * driver! Do not include this in any other file.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Tunables.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MCR1LOWATER 16 /* these numbers favor overall throughput */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MAXREQSPERMCR 16 /* there are 4 subunits serviced by MCR2 */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MAXWORK 6 /* How many work structures to preallocate */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * These are constants. Do not change them.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MAXPACKET 0xffff /* Max size of a packet or fragment */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DSAPARTLEN 20 /* Size of fixed DSA parts (r, s, q, x, v) */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Mechanism info structure passed to KCF during registration.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MD5_HMAC_MIN_KEY_LEN 1 /* MD5-HMAC min key length in bytes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MD5_HMAC_MAX_KEY_LEN 64 /* MD5-HMAC max key length in bytes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define SHA1_HMAC_BLOCK_SIZE 64 /* SHA1-HMAC block size */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define SHA1_HMAC_MIN_KEY_LEN 1 /* SHA1-HMAC min key length in bytes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define SHA1_HMAC_MAX_KEY_LEN 64 /* SHA1-HMAC max key length in bytes */
436935a13231964207120b7e50a063b53b8e579cVladimir Kotal#define DES3_MIN_KEY_LEN 16 /* 3DES min key length in bytes */
436935a13231964207120b7e50a063b53b8e579cVladimir Kotal#define DES3_MAX_KEY_LEN 24 /* 3DES max key length in bytes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DSA_MIN_KEY_LEN 64 /* DSA min key length in bytes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DSA_MAX_KEY_LEN 128 /* DSA max key length in bytes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define RSA_MIN_KEY_LEN 32 /* RSA min key length in bytes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define RSA_MAX_KEY_LEN 256 /* RSA max key length in bytes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * RSA implementation.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * DSA implementation.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * FMA eclass index definitions. Note that this enum must be consistent
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * with the dca_fma_eclass_sca1000 and dca_fma_eclass_sca500 string arrays.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Forward typedefs.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * This structure is used to identify a specific board.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Structure representing a node in a DMA chain. (Broadcom calls
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * these "Data Buffer Chain Entries".)
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * note, this structure must be a multiple of sizeof (intptr_t)
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* the descriptor */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* and the buffer to which it points */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* physical addresses */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Linked-list linkage.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * The following are context fields for Deimos 2.0.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* Fields for RSA and DSA */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* Fields for DES and 3DES */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Work structure. One of these per actual job submitted to an MCR.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Contains everything we need to submit the job, and everything we
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * need to notify caller and release resources when the completion
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * interrupt comes.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Consumer's I/O buffers.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Chains and DMA structures.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Scratch input buffer.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Scratch output buffer.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Values to program MCR with.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Callback.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Other stuff.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Algorithm specific parameters.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Statistics.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* Pre-mapped input and output data buffer chain support */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * User buffers are mapped to DMA handles dynamically. The physically
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * contigous blocks ( >= a page) are built into a data buffer chain.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* Offset in the context page for storing dynamic buffer chains */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* Destroy this request if true */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Request flags (dca_request_t.dr_flags).
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* DMA access to the MCR and context */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm dca_listnode_t dwl_freework; /* available work structures */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* Kstats */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Operations for MCR1 (bulk stuff).
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CMD_PUREHASH 0x5 /* Pure MD5/SHA1 hash processing */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Operations for MCR2 (key stuff).
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CMD_DHSHARED 0x2 /* DH shared secret generation */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CMD_RSAPRIVATE 0x4 /* RSA private key operation (CRT) */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CMD_DSAVERIFY 0x6 /* DSA verification operation */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CMD_RNGSHA1 0x42 /* RNG output processed by SHA1 */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * note that when reenabling any of these stats, DS_MAX will need to
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * be adjusted.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Blocking structure for ioctls.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Per instance structure.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Work requests.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * hardware model
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Kstats. There is no standard for what standards
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Cryptographic Providers should supply, so we're
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * making them up for now.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* For the local random number pool used internally by the dca driver */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm /* FMA capabilities */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Device flags (dca_t.dca_flags)
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * PCI configuration registers.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCI_PROGCLASS 0x09 /* programming class, 8 bits */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCI_CACHELINESZ 0x0C /* cache line size, 8 bits */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCI_SUBVENID 0x2C /* subsystem vendor id, 16 bits */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCI_MAXLAT 0x3F /* maximum grant for burst, 8 bits */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCI_RETRIES 0x41 /* retries bus will perform, 8 bits */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * PCI configuration register bit values.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCICOMM_FBBE 0x0200 /* fast back-to-back enable */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCICOMM_MWIE 0x0010 /* memory write & invalidate enable */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCISTAT_PARITY 0x0100 /* data parity error detected */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm/* Note: 5820 errata: BIST feature does not work */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define PCIBIST_ERRMASK 0x0F /* mask of BIST error codes */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Command and Status Registers.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CSR_MCR2 0x10 /* pointer to MCR2 (exponentiator) */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Command and status register bits.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_MCR2IE 0x40000000U /* MCR2 interrupt enable */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_MCR1IE 0x20000000U /* MCR1 interrupt enable */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_BE32 0x08000000U /* 32-bit big endian mode */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_BE64 0x04000000U /* 64-bit big endian mode */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_EIE 0x02000000U /* error interrupt enable */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_RNG4 0x00800000U /* 1 RNG bit per 4 cycles */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_RNG8 0x01000000U /* 1 RNG bit per 8 cycles */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_RNG16 0x01800000U /* 1 RNG bit per 16 cycles */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_MODNORM 0x00400000U /* s/w modulus normalization */
3383b6dda001791704e0e66f7b78dd0dfe74f547qs#define DMACTL_RD256 0x00020000U /* 256 byte read DMA size */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMACTL_FRAGMASK 0x0000FFFFU /* output fragment size */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMASTAT_MAIP 0x80000000U /* master access in progress */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMASTAT_MCR1INT 0x20000000U /* MCR1 interrupted */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMASTAT_ERRINT 0x10000000U /* error interrupted */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMASTAT_MCR2INT 0x04000000U /* MCR2 interrupted */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DMASTAT_INTERRUPTS 0x34000000U /* all interrupts */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Offsets of things relative to an MCR.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Basis for size (should be optimized by constant folding):
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * 4 bytes for flags and #packets.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * for each packet:
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * 2 descriptors (DESC_SIZE)
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * 4 bytes for context address
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * 4 bytes for packet length and reserved
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MCR_SIZE (4 + MAXREQSPERMCR * ((2 * DESC_SIZE) + 8))
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * MCR flags.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MCRFLAG_FINISHED 0x0001 /* MCR processing complete */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define MCRFLAG_ERROR 0x0002 /* set if an error occured */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Fields within a descriptor (data buffer chain).
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DESC_SIZE 16 /* ROUNDUP(12, 16) - descriptor size (bytes) */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Offsets of fields within context structures, see Broadcom spec.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CTX_MAXLENGTH 768 /* max size of ctx, fits anything */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Values for specific operations.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CTX_RNG_LENGTH 64 /* context length for RNG (64 min) */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CTX_3DES_LENGTH 64 /* context length for 3DES (64 min) */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CTX_IPSEC_LENGTH 80 /* context length for IPsec */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CTX_IPSEC_HMAC_MD5 0x1000 /* HMAC-MD5 authentication */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CTX_IPSEC_HMAC_SHA1 0x2000 /* HMAC-MD5 authentication */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CTX_DSAMSGTYPE_TEXT 1 /* Generate SHA1 hash first */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Macros to access fields within the MCR. Note that this includes the
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * context fields as well, since the context is just offset from the
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * base of the MCR.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm ddi_get32(work->dw_mcr_acch, (uint32_t *)(work->dw_mcr_kaddr + reg))
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm ddi_get16(work->dw_mcr_acch, (uint16_t *)(work->dw_mcr_kaddr + reg))
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm/* XXX: define the GET forms for descriptors only if needed */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm ddi_rep_put8(req->dr_ctx_acch, (uchar_t *)src, (uchar_t *)dst, count, \
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Register access.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm ddi_get32(dca->dca_regs_handle, (uint_t *)(dca->dca_regs + reg))
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm ddi_put32(dca->dca_regs_handle, (uint_t *)(dca->dca_regs + reg), val)
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Used to guarantee alignment.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define HIDBLWORD(x) (((x) & 0xffffffff00000000ULL) >> 32)
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Driver hardening related.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define CHECK_REGS(dca) ddi_check_acc_handle(dca->dca_regs_handle)
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Other utility macros.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define WORKLIST(dca, mcr) (&((dca)->dca_worklist[mcr - 1]))
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Debug stuff.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#define DENTRY 0x0080 /* crypto routine entry/exit points */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Some pkcs#11 defines as there are no pkcs#11 header files included.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Driver globals.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm * Prototypes.
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_3desctxinit(crypto_ctx_t *, crypto_mechanism_t *, crypto_key_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm int, int);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_3des(crypto_ctx_t *, crypto_data_t *, crypto_data_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_3desupdate(crypto_ctx_t *, crypto_data_t *, crypto_data_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_3desatomic(crypto_provider_handle_t, crypto_session_id_t,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm crypto_mechanism_t *, crypto_key_t *, crypto_data_t *, crypto_data_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_rsastart(crypto_ctx_t *, crypto_data_t *, crypto_data_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_rsainit(crypto_ctx_t *, crypto_mechanism_t *, crypto_key_t *, int);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmvoid dca_rsactxfree(void *);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_rsaatomic(crypto_provider_handle_t, crypto_session_id_t,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm crypto_mechanism_t *, crypto_key_t *, crypto_data_t *, crypto_data_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_dsa_sign(crypto_ctx_t *, crypto_data_t *, crypto_data_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_dsa_verify(crypto_ctx_t *, crypto_data_t *, crypto_data_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_dsainit(crypto_ctx_t *, crypto_mechanism_t *, crypto_key_t *, int,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmvoid dca_dsactxfree(void *);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_dsaatomic(crypto_provider_handle_t, crypto_session_id_t,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm crypto_mechanism_t *, crypto_key_t *, crypto_data_t *, crypto_data_t *,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_rng(dca_t *, uchar_t *, size_t len, crypto_req_handle_t);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_resid_gather(crypto_data_t *, char *, int *, char *, int);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_bcmp_reverse(const void *s1, const void *s2, size_t n);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_getbufbytes(crypto_data_t *, size_t, int, uchar_t *);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_sgcheck(dca_t *, crypto_data_t *, dca_sg_param_t);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_attr_lookup_uint32(crypto_object_attribute_t *, uint_t, uint64_t,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_attr_lookup_uint8_array(crypto_object_attribute_t *, uint_t,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm uint64_t, void **, unsigned int *);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm dca_find_attribute(crypto_object_attribute_t *, uint_t, uint64_t);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_bitlen(unsigned char *, int);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmvoid dca_reverse(void *, void *, int, int);
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gmint dca_check_dma_handle(dca_t *dca, ddi_dma_handle_t handle,
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#endif /* _KERNEL */
88f8b78a88cbdc6d8c1af5c3e54bc49d25095c98gm#endif /* _SYS_CRYPTO_DCA_H */