hci1394_descriptors.h revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright (c) 1999-2000 by Sun Microsystems, Inc.
* All rights reserved.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* 1394 Open HCI command descriptors.
* These are DMA commands chained together to form packets.
*/
#ifdef __cplusplus
extern "C" {
#endif
/*
* There are 2 different 1394 Open HCI entities defined in this file.
* The HCI DMA descriptors (aka context descriptors or descriptor
* commands), and the packet formats.
*
* Packet formats are used within descriptors for transmit and
* are available in buffers for receive. EACH PACKET TYPE
* (such as read_quadlet_request) may have a different format
* depending on whether it is to be transmitted or whether it
* is being received.
*
* In general, fields within a packet remain in the same location
* within a quadlet either way. However, the location of the
* quadlets themselves may be different.
*
* In an attempt to clarify what is used for what, Macros used
* for setting up packets within a descriptor (an "Immediate" command)
* shall have "DESC" in their name. Macros used for reading packets
* from an input buffer shall have "PKT" in their name.
*
* For more information, see OpenHCI 1.00 chapters 7 (Asynch Transmit),
* 8 (Asynch Receive), 9 (Isoch Transmit) and 10 (Isoch Receive).
* Each chapter shows the DMA descriptors at the beginning, and
* the packet formats at the end.
* Also see chapter 11 (Self ID).
*/
/*
* hci1394_desc is the basic format used for the following descriptor commands:
* OUTPUT_MORE, OUTPUT_LAST, INPUT_MORE and INPUT_LAST
*/
typedef struct hci1394_desc_s {
/*
* hci1394_desc_imm is the basic format used for the "immediate" descriptor
* commands: OUTPUT_MORE_IMMEDIATE and OUTPUT_LAST_IMMEDIATE.
*/
typedef struct hci1394_desc_imm_s {
/*
* hci1394_desc_hdr contains the immediate packet header quadlets
* for OUTPUT_MORE_IMMEDIATE and OUTPUT_LAST_IMMEDIATE. A packet header
* has up to 4 quadlets of data which are specific to the individual operation
* and operation type (i.e. this data would be different between a quadlet read
* and quadlet write).
*/
typedef struct hci1394_desc_hdr_s {
/* typedefs for each descriptor command */
typedef hci1394_desc_t hci1394_output_more_t;
typedef hci1394_desc_t hci1394_output_last_t;
typedef hci1394_desc_t hci1394_input_more_t;
typedef hci1394_desc_t hci1394_input_last_t;
/*
* maximum number of 16-byte components comprising a descriptor block.
* Note that "immediate" descriptors take up 32-bytes and therefore are
* 2 Z counts. Refer to OHCI 1.00 sections 3.1.2, 7.1.5.1, 8.3.1, 9.2.1,
* and table 10-2 for context specific info about Z.
*/
#define HCI1394_DESC_MAX_Z 8
/*
* There are two sets of defines below. The first set includes
* definitions for the descriptor header. Namely hdr, branch, and stat.
* The second set includes definitions for the different packet header
* formats that have to be placed in the immediate q1-q4 fields
* of a descriptor.
*/
/* General descriptor HDR quadlet defs */
#define DESC_HDR_REQCOUNT_SHIFT 0
#define DESC_HDR_STVAL_SHIFT 0
#define DESC_GET_HDR_REQCOUNT(DESCP) \
/* CMD_TYPE values */
/* CMD_KEY values */
/* CMD_BR and CMD_INT values - two bits */
#define DESC_INTR_DSABL 0x00000000
#define DESC_INTR_ENBL 0x00300000
#define DESC_BR_DSABL 0x00000000
#define DESC_BR_ENBL 0x000C0000
#define DESC_W_DSABL 0x00000000
#define DESC_W_ENBL 0x00030000
/*
* Shortcuts for AT Descriptor types. We will always interrupt upon command
* completion for AT OL, OLI, and IM.
*/
#define DESC_AT_OM DESC_TY_OUTPUT_MORE
/*
* descriptor BRANCH field defs
* Branch addresses are 16-byte aligned. the low order 4-bits are
* used for the Z value.
*/
#define DESC_BRANCH_MASK 0xFFFFFFF0
#define DESC_Z_MASK 0x0000000F
/*
* descriptor STATUS field defs. comprised of xfer status and either
* a timestamp or a residual count (rescount)
*/
#define DESC_ST_XFER_STAT_MASK 0xFFFF0000
#define DESC_ST_XFER_STAT_SHIFT 16
#define DESC_ST_RESCOUNT_SHIFT 0
#define DESC_ST_TIMESTAMP_SHIFT 0
/*
* XFER status fields are the same as the context control fields.
* but in the high 16 bits
*/
#define DESC_AT_SPD_MASK 0x7
#define DESC_AT_SPD_SHIFT 16
#define DESC_AR_SPD_MASK 0x00E00000
#define DESC_AR_SPD_SHIFT 21
#define DESC_AR_EVT_MASK 0x001F0000
#define DESC_AR_EVT_SHIFT 16
#define HCI1394_DESC_EVT_GET(data) \
#define HCI1394_DESC_AR_SPD_GET(data) \
#define HCI1394_DESC_AT_SPD_SET(data) \
/*
* XferStatus events are as follows
*/
/*
* Response packet response codes
*/
#define DESC_RESP_COMPLETE 0x0
#define DESC_RESP_CONFLICT_ERR 0x4
#define DESC_RESP_DATA_ERR 0x5
#define DESC_RESP_TYPE_ERR 0x6
#define DESC_RESP_ADDR_ERR 0x7
/*
* Context dependent MACROs used to set up the command headers and
* Caller provides only the necessary variables.
*/
/*
* Isochronous Transmit Descriptors
*/
((REQCOUNT) << DESC_HDR_REQCOUNT_SHIFT)))
(8 << DESC_HDR_REQCOUNT_SHIFT)))
/*
* Isochronous Receive Descriptors
* PPB is Packet-Per-Buffer mode, BF is Buffer-Fill mode
*/
((REQCOUNT) << DESC_HDR_REQCOUNT_SHIFT)); \
((REQCOUNT) << DESC_HDR_REQCOUNT_SHIFT)); \
((REQCOUNT) << DESC_HDR_REQCOUNT_SHIFT)); \
/*
* Packet Formats
*
* HCI packet formats typically comprise 2-4 quadlets for transmit
* and 3-5 quadlets for receive. Although particular quadlets
* may be in different parts of the 1394 header, the fields within
* the quadlets remain in a consistent location.
*/
typedef struct hci1394_basic_packet {
/* defs for the # of bytes are used in building the immediate descriptors */
/* These are used to set REQCOUNT in the HDR etc... */
#define DESC_FIVE_QUADS 20
#define DESC_FOUR_QUADS 16
#define DESC_THREE_QUADS 12
#define DESC_TWO_QUADS 8
#define DESC_ONE_QUAD 4
#define DESC_ONE_OCTLET 8
#define DESC_TWO_OCTLETS 16
/* q1 shortcuts for ASYNC processing */
#define DESC_AT_SRCBUSID 0x00800000
#define DESC_ATREQ_Q1_PHY 0x000000E0
#define DESC_ATREQ_Q1_QWR 0x00000100
#define DESC_ATREQ_Q1_BWR 0x00000110
#define DESC_ATREQ_Q1_QRD 0x00000140
#define DESC_ATREQ_Q1_BRD 0x00000150
#define DESC_ATREQ_Q1_LCK 0x00000190
#define DESC_ATRESP_Q1_WR 0x00000120
#define DESC_ATRESP_Q1_QRD 0x00000160
#define DESC_ATRESP_Q1_BRD 0x00000170
#define DESC_ATRESP_Q1_LCK 0x000001B0
/* q1 - definitions for the asynch packet first quadlet */
#define DESC_PKT_SRCBUSID_SHIFT 23
#define DESC_PKT_SRCBUSID_MASK 0x00800000
#define DESC_PKT_SPD_MASK 0x00070000
#define DESC_PKT_TLABEL_MASK 0x0000FC00
#define DESC_PKT_RT_SHIFT 8
#define DESC_PKT_RT_MASK 0x00000300
#define DESC_PKT_TCODE_MASK 0x000000F0
#define DESC_RT_RETRYX 0x1
/* q1 - definitions for the isoch first quadlet (see q1 async above for spd) */
#define DESC_PKT_TAG_SHIFT 14
#define DESC_PKT_TAG_MASK 0x0000C000
#define DESC_PKT_CHAN_SHIFT 8
#define DESC_PKT_CHAN_MASK 0x00003F00
#define DESC_PKT_SY_SHIFT 0
#define DESC_PKT_SY_MASK 0x0000000F
/* q2 - definitions for the asynch second quadlet */
#define DESC_PKT_DESTID_MASK 0xFFFF0000
#define DESC_PKT_SRCID_MASK 0xFFFF0000
#define DESC_PKT_DESTOFFHI_SHIFT 0
#define DESC_PKT_DESTOFFHI_MASK 0x0000FFFF
/* q3 - definitions for the asynch third quadlet */
#define DESC_PKT_DESTOFFLO_SHIFT 0
#define DESC_PKT_DESTOFFLO_MASK 0xFFFFFFFF
#define DESC_PKT_PHYGEN_SHIFT 16
#define DESC_PKT_PHYGEN_MASK 0x00FF0000
/* q4 - definitions for the fourth quadlet */
#define DESC_PKT_QDATA_SHIFT 0 /* at_wr_quad, at_rd_resp_quad */
#define DESC_PKT_QDATA_MASK 0xFFFFFFFF
/* ar_rd_blk, ar_wr_blk, ar_lock, */
/* ar_rd_resp, ar_lock_resp */
#define DESC_PKT_EXTTCODE_MASK 0x0000FFFF
/*
* MACROS for getting and setting HCI packet fields
*/
/* ASYNCHRONOUS */
#define HCI1394_DESC_TCODE_GET(data) \
#define HCI1394_DESC_TLABEL_GET(data) \
#define HCI1394_DESC_RCODE_GET(data) \
#define HCI1394_DESC_DESTID_GET(data) \
#define HCI1394_DESC_SRCID_GET(data) \
#define HCI1394_DESC_DATALEN_GET(data) \
#define HCI1394_DESC_EXTTCODE_GET(data) \
((data) & DESC_PKT_EXTTCODE_MASK)
#define HCI1394_DESC_PHYGEN_GET(data) \
#define HCI1394_DESC_TLABEL_SET(data) \
#define HCI1394_DESC_RCODE_SET(data) \
#define HCI1394_DESC_DESTID_SET(data) \
#define HCI1394_DESC_DATALEN_SET(data) \
#define HCI1394_DESC_EXTTCODE_SET(data) \
((data) & DESC_PKT_EXTTCODE_MASK)
/* ISOCHRONOUS */
/*
* note: the GET macros for isoch take the actual quadlet as an arg because
* the location of the IR header quadlet varies depending on the mode.
* SETs are expected to be done only for isochronous transmit.
*/
#define HCI1394_GETCHAN(Q) (((Q) & PKT_CHAN_MASK) >> \
#define HCI1394_GETSY(Q) (((Q) & DESC_PKT_SY_MASK) >> \
#define HCI1394_GET_ILEN(Q) (((Q) & DESC_DATALEN_MASK) >> \
/*
* OpenHCI Packet format sizes (header only)
*/
#define DESC_SZ_AR_WRITE_RESP DESC_FOUR_QUADS
#define DESC_SZ_AR_PHY DESC_FOUR_QUADS
#ifdef __cplusplus
}
#endif
#endif /* _SYS_1394_ADAPTERS_HCI1394_DESCRIPTORS_H */