xgehal-mgmt.c revision 7eced415e5dd557aef2d78483b5a7785f0e13670
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*
* Copyright (c) 2002-2006 Neterion, Inc.
*/
#include "xgehal-mgmt.h"
#include "xgehal-driver.h"
#include "xgehal-device.h"
/**
* xge_hal_mgmt_about - Retrieve about info.
* @devh: HAL device handle.
* @about_info: Filled in by HAL. See xge_hal_mgmt_about_info_t{}.
* @size: Size of the @about_info buffer. HAL will return error if the
* size is smaller than sizeof(xge_hal_mgmt_about_info_t).
*
* Retrieve information such as PCI device and vendor IDs, board
* revision number, HAL version number, etc.
*
* Returns: XGE_HAL_OK - success;
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
* XGE_HAL_FAIL - Failed to retrieve the information.
*
* See also: xge_hal_mgmt_about_info_t{}.
*/
int size)
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (size != sizeof(xge_hal_mgmt_about_info_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
&about_info->vendor);
&about_info->device);
&about_info->board_rev);
sizeof(about_info->vendor_name));
sizeof(about_info->chip_name));
sizeof(about_info->media));
sizeof(about_info->hal_major));
sizeof(about_info->hal_minor));
sizeof(about_info->hal_fix));
sizeof(about_info->hal_build));
sizeof(about_info->ll_major));
sizeof(about_info->ll_minor));
sizeof(about_info->ll_fix));
sizeof(about_info->ll_build));
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_reg_read - Read Xframe register.
* @devh: HAL device handle.
* @bar_id: 0 - for BAR0, 1- for BAR1.
* @offset: Register offset in the Base Address Register (BAR) space.
* @value: Register value. Returned by HAL.
* Read Xframe register.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_INVALID_OFFSET - Register offset in the BAR space is not
* valid.
* XGE_HAL_ERR_INVALID_BAR_ID - BAR id is not valid.
*
* See also: xge_hal_aux_bar0_read(), xge_hal_aux_bar1_read().
*/
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (bar_id == 0) {
return XGE_HAL_ERR_INVALID_OFFSET;
}
} else if (bar_id == 1 &&
int i;
for (i=0; i<XGE_HAL_MAX_FIFO_NUM_HERC; i++) {
break;
}
}
if (i == XGE_HAL_MAX_FIFO_NUM_HERC) {
return XGE_HAL_ERR_INVALID_OFFSET;
}
} else if (bar_id == 1) {
/* FIXME: check TITAN BAR1 offsets */
return XGE_HAL_ERR_INVALID_DEVICE;
} else {
return XGE_HAL_ERR_INVALID_BAR_ID;
}
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_reg_write - Write Xframe register.
* @devh: HAL device handle.
* @bar_id: 0 - for BAR0, 1- for BAR1.
* @offset: Register offset in the Base Address Register (BAR) space.
* @value: Register value.
*
* Write Xframe register.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_INVALID_OFFSET - Register offset in the BAR space is not
* valid.
* XGE_HAL_ERR_INVALID_BAR_ID - BAR id is not valid.
*
* See also: xge_hal_aux_bar0_write().
*/
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (bar_id == 0) {
return XGE_HAL_ERR_INVALID_OFFSET;
}
} else if (bar_id == 1 &&
int i;
for (i=0; i<XGE_HAL_MAX_FIFO_NUM_HERC; i++) {
break;
}
}
if (i == XGE_HAL_MAX_FIFO_NUM_HERC) {
return XGE_HAL_ERR_INVALID_OFFSET;
}
} else if (bar_id == 1) {
/* FIXME: check TITAN BAR1 offsets */
return XGE_HAL_ERR_INVALID_DEVICE;
} else {
return XGE_HAL_ERR_INVALID_BAR_ID;
}
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_hw_stats - Get Xframe hardware statistics.
* @devh: HAL device handle.
* @hw_stats: Hardware statistics. Returned by HAL.
* See xge_hal_stats_hw_info_t{}.
* @size: Size of the @hw_stats buffer. HAL will return an error
* if the size is smaller than sizeof(xge_hal_stats_hw_info_t).
* Get Xframe hardware statistics.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
*
* See also: xge_hal_mgmt_sw_stats().
*/
int size)
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (size != sizeof(xge_hal_stats_hw_info_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
return status;
}
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_hw_stats_off - TBD.
* @devh: HAL device handle.
* @off: TBD
* @size: TBD
* @out: TBD
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
*
* See also: xge_hal_mgmt_sw_stats().
*/
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
size > 8) {
return XGE_HAL_ERR_INVALID_OFFSET;
}
return status;
}
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_pcim_stats - Get Titan hardware statistics.
* @devh: HAL device handle.
* @pcim_stats: PCIM statistics. Returned by HAL.
* See xge_hal_stats_hw_info_t{}.
* @size: Size of the @hw_stats buffer. HAL will return an error
* if the size is smaller than sizeof(xge_hal_stats_hw_info_t).
* Get Xframe hardware statistics.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
*
* See also: xge_hal_mgmt_sw_stats().
*/
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (size != sizeof(xge_hal_stats_pcim_info_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
return status;
}
sizeof(xge_hal_stats_pcim_info_t));
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_pcim_stats_off - TBD.
* @devh: HAL device handle.
* @off: TBD
* @size: TBD
* @out: TBD
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
*
* See also: xge_hal_mgmt_sw_stats().
*/
char *out)
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
size > 8) {
return XGE_HAL_ERR_INVALID_OFFSET;
}
return status;
}
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_sw_stats - Get per-device software statistics.
* @devh: HAL device handle.
* @sw_stats: Hardware statistics. Returned by HAL.
* See xge_hal_stats_sw_err_t{}.
* @size: Size of the @sw_stats buffer. HAL will return an error
* if the size is smaller than sizeof(xge_hal_stats_sw_err_t).
* Get device software statistics, including ECC and Parity error
* counters, etc.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
*
* See also: xge_hal_stats_sw_err_t{}, xge_hal_mgmt_hw_stats().
*/
int size)
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (size != sizeof(xge_hal_stats_sw_err_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
return XGE_HAL_INF_STATS_IS_NOT_READY;
}
/* Updating xpak stats value */
sizeof(xge_hal_stats_sw_err_t));
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_device_stats - Get HAL device statistics.
* @devh: HAL device handle.
* @device_stats: HAL device "soft" statistics. Maintained by HAL itself.
* (as opposed to xge_hal_mgmt_hw_stats() - those are
* maintained by the Xframe hardware).
* Returned by HAL.
* See xge_hal_stats_device_info_t{}.
* @size: Size of the @device_stats buffer. HAL will return an error
* if the size is smaller than sizeof(xge_hal_stats_device_info_t).
*
* Get HAL (layer) statistic counters.
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
* XGE_HAL_INF_STATS_IS_NOT_READY - Statistics information is not
* currently available.
*
*/
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (size != sizeof(xge_hal_stats_device_info_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
XGE_HAL_OK) {
return status;
}
sizeof(xge_hal_stats_device_info_t));
return XGE_HAL_OK;
}
/*
* __hal_update_ring_bump - Update the ring bump counter for the
* particular channel.
* @hldev: HAL device handle.
* @queue: the queue who's data is to be collected.
* @chinfo: pointer to the statistics structure of the given channel.
* Usage: See xge_hal_aux_stats_hal_read{}
*/
static void
{
void * addr;
(&bar0->ring_bump_counter1);
}
/**
* xge_hal_mgmt_channel_stats - Get HAL channel statistics.
* @channelh: HAL channel handle.
* @channel_stats: HAL channel statistics. Maintained by HAL itself
* (as opposed to xge_hal_mgmt_hw_stats() - those are
* maintained by the Xframe hardware).
* Returned by HAL.
* See xge_hal_stats_channel_info_t{}.
* @size: Size of the @channel_stats buffer. HAL will return an error
* if the size is smaller than sizeof(xge_hal_mgmt_channel_stats_t).
*
* Get HAL per-channel statistic counters.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
* XGE_HAL_INF_STATS_IS_NOT_READY - Statistics information is not
* currently available.
*
*/
{
if (size != sizeof(xge_hal_stats_channel_info_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
XGE_HAL_OK) {
return status;
}
}
sizeof(xge_hal_stats_channel_info_t));
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_pcireg_read - Read PCI configuration at a specified
* offset.
* @devh: HAL device handle.
* @offset: Offset in the 256 byte PCI configuration space.
* @value_bits: 8, 16, or 32 (bits) to read.
* @value: Value returned by HAL.
*
* Read PCI configuration, given device and offset in the PCI space.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_INVALID_OFFSET - Register offset in the BAR space is not
* valid.
* XGE_HAL_ERR_INVALID_VALUE_BIT_SIZE - Invalid bits size. Valid
* values(8/16/32).
*
*/
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
return XGE_HAL_ERR_INVALID_OFFSET;
}
if (value_bits == 8) {
} else if (value_bits == 16) {
} else if (value_bits == 32) {
} else {
}
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_device_config - Retrieve device configuration.
* @devh: HAL device handle.
* @dev_config: Device configuration, see xge_hal_device_config_t{}.
* @size: Size of the @dev_config buffer. HAL will return an error
* if the size is smaller than sizeof(xge_hal_mgmt_device_config_t).
*
* Get device configuration. Permits to retrieve at run-time configuration
* values that were used to initialize and configure the device.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
*
* See also: xge_hal_device_config_t{}, xge_hal_mgmt_driver_config().
*/
{
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (size != sizeof(xge_hal_mgmt_device_config_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
sizeof(xge_hal_device_config_t));
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_driver_config - Retrieve driver configuration.
* @drv_config: Device configuration, see xge_hal_driver_config_t{}.
* @size: Size of the @dev_config buffer. HAL will return an error
* if the size is smaller than sizeof(xge_hal_mgmt_driver_config_t).
*
* Get driver configuration. Permits to retrieve at run-time configuration
* values that were used to configure the device at load-time.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_DRIVER_NOT_INITIALIZED - HAL is not initialized.
* XGE_HAL_ERR_VERSION_CONFLICT - Version is not maching.
*
* See also: xge_hal_driver_config_t{}, xge_hal_mgmt_device_config().
*/
{
if (g_xge_hal_driver == NULL) {
}
if (size != sizeof(xge_hal_mgmt_driver_config_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
sizeof(xge_hal_mgmt_driver_config_t));
return XGE_HAL_OK;
}
/**
* xge_hal_mgmt_pci_config - Retrieve PCI configuration.
* @devh: HAL device handle.
* @pci_config: 256 byte long buffer for PCI configuration space.
* @size: Size of the @ buffer. HAL will return an error
* if the size is smaller than sizeof(xge_hal_mgmt_pci_config_t).
*
* Get PCI configuration. Permits to retrieve at run-time configuration
* values that were used to configure the device at load-time.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
* XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
*
*/
{
int i;
return XGE_HAL_ERR_INVALID_DEVICE;
}
if (size != sizeof(xge_hal_mgmt_pci_config_t)) {
return XGE_HAL_ERR_VERSION_CONFLICT;
}
/* refresh PCI config space */
for (i = 0; i < 0x68/4+1; i++) {
}
sizeof(xge_hal_mgmt_pci_config_t));
return XGE_HAL_OK;
}
#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
/**
* xge_hal_mgmt_trace_read - Read trace buffer contents.
* @buffer: Buffer to store the trace buffer contents.
* @buf_size: Size of the buffer.
* @offset: Offset in the internal trace buffer to read data.
* @read_length: Size of the valid data in the buffer.
*
* Read HAL trace buffer contents starting from the offset
* upto the size of the buffer or till EOF is reached.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_EOF_TRACE_BUF - No more data in the trace buffer.
*
*/
xge_hal_mgmt_trace_read (char *buffer,
unsigned buf_size,
unsigned *offset,
unsigned *read_length)
{
int data_offset;
int start_offset;
if ((g_xge_os_tracebuf == NULL) ||
return XGE_HAL_EOF_TRACE_BUF;
}
data_offset)) {
return XGE_HAL_EOF_TRACE_BUF;
}
if (*read_length >= buf_size) {
}
*read_length);
*offset += *read_length;
(*read_length) ++;
return XGE_HAL_OK;
}
#endif
/**
* xge_hal_restore_link_led - Restore link LED to its original state.
* @devh: HAL device handle.
*/
void
{
/*
* If the current link state is UP, switch on LED else make it
* off.
*/
/*
* For Xena 3 and lower revision cards, adapter control needs to be
*/
&bar0->adapter_control);
} else {
}
&bar0->adapter_control);
return;
}
/*
* Use beacon control register to control the LED.
* LED link output corresponds to bit 8 of the beacon control
* register. Note that, in the case of Xena, beacon control register
* represents the gpio control register. In the case of Herc, LED
* handling is done by beacon control register as opposed to gpio
* control register in Xena. Beacon control is used only to toggle
* and the value written into it does not depend on the link state.
* It is upto the ULD to toggle the LED even number of times which
* brings the LED to it's original state.
*/
&bar0->beacon_control);
val64 |= 0x0000800000000000ULL;
}
/**
* xge_hal_flick_link_led - Flick (blink) link LED.
* @devh: HAL device handle.
*
* Depending on the card revision flicker the link LED by using the
* beacon control or the adapter_control register.
*/
void
{
/*
* For Xena 3 and lower revision cards, adapter control needs to be
*/
&bar0->adapter_control);
&bar0->adapter_control);
return;
}
/*
* Use beacon control register to control the Link LED.
* Note that, in the case of Xena, beacon control register represents
* the gpio control register. In the case of Herc, LED handling is
* done by beacon control register as opposed to gpio control register
* in Xena.
*/
&bar0->beacon_control);
&bar0->beacon_control);
}
/**
* xge_hal_read_eeprom - Read 4 bytes of data from user given offset.
* @devh: HAL device handle.
* @off: offset at which the data must be written
* @data: output parameter where the data is stored.
*
* Read 4 bytes of data from the user given offset and return the
* read data.
* Note: will allow to read only part of the EEPROM visible through the
* I2C bus.
* Returns: -1 on failure, 0 on success.
*/
{
XGE_HAL_I2C_CONTROL_BYTE_CNT(0x3) |
while (exit_cnt < 5) {
if (XGE_HAL_I2C_CONTROL_CNTL_END(val64)) {
ret = XGE_HAL_OK;
break;
}
exit_cnt++;
}
return ret;
}
/*
* xge_hal_write_eeprom - actually writes the relevant part of the data
value.
* @devh: HAL device handle.
* @off: offset at which the data must be written
* @data : The data that is to be written
* @cnt : Number of bytes of the data that are actually to be written into
* the Eeprom. (max of 3)
*
* Actually writes the relevant part of the data value into the Eeprom
* through the I2C bus.
* Return value:
* 0 on success, -1 on failure.
*/
{
while (exit_cnt < 5) {
if (XGE_HAL_I2C_CONTROL_CNTL_END(val64)) {
if (!(val64 & XGE_HAL_I2C_CONTROL_NACK))
ret = XGE_HAL_OK;
break;
}
exit_cnt++;
}
return ret;
}
/*
* xge_hal_register_test - reads and writes into all clock domains.
* @hldev : private member of the device structure.
* xge_nic structure.
* @data : variable that returns the result of each of the test conducted b
* by the driver.
*
* Read and write into all clock domains. The NIC has 3 clock domains,
* see that registers in all the three regions are accessible.
* Return value:
* 0 on success.
*/
{
int fail = 0;
if (val64 != 0x123456789abcdefULL) {
fail = 1;
}
&bar0->rmac_pause_cfg);
if (val64 != 0xc000ffff00000000ULL) {
fail = 1;
}
&bar0->rx_queue_cfg);
if (val64 != 0x0808080808080808ULL) {
fail = 1;
}
&bar0->xgxs_efifo_cfg);
if (val64 != 0x000000001923141EULL) {
fail = 1;
}
val64 = 0x5A5A5A5A5A5A5A5AULL;
if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
fail = 1;
}
val64 = 0xA5A5A5A5A5A5A5A5ULL;
if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
fail = 1;
}
return XGE_HAL_OK;
}
/*
* xge_hal_rldram_test - offline test for access to the RldRam chip on
the NIC
* @devh: HAL device handle.
* @data: variable that returns the result of each of the test
* conducted by the driver.
*
* This is one of the offline test that tests the read and write
* access to the RldRam chip on the NIC.
* Return value:
* 0 on success.
*/
{
&bar0->adapter_control);
&bar0->adapter_control);
&bar0->mc_rldram_mrs);
while (iteration < 2) {
val64 = 0x55555555aaaa0000ULL;
if (iteration == 1) {
val64 ^= 0xFFFFFFFFFFFF0000ULL;
}
val64 = 0xaaaa5a5555550000ULL;
if (iteration == 1) {
val64 ^= 0xFFFFFFFFFFFF0000ULL;
}
val64 = 0x55aaaaaaaa5a0000ULL;
if (iteration == 1) {
val64 ^= 0xFFFFFFFFFFFF0000ULL;
}
val64 |=
if (val64 & XGE_HAL_MC_RLDRAM_TEST_DONE)
break;
xge_os_mdelay(200);
}
if (cnt == 5)
break;
if (val64 & XGE_HAL_MC_RLDRAM_TEST_DONE)
break;
xge_os_mdelay(500);
}
if (cnt == 5)
break;
if (val64 & XGE_HAL_MC_RLDRAM_TEST_PASS)
test_pass = 1;
iteration++;
}
if (!test_pass)
*data = 1;
else
*data = 0;
return XGE_HAL_OK;
}
/*
* xge_hal_pma_loopback - Enable or disable PMA loopback
* @devh: HAL device handle.
* @enable:Boolean set to 1 to enable and 0 to disable.
*
* Enable or disable PMA loopback.
* Return value:
* 0 on success.
*/
{
/*
* This code if for MAC loopbak
* Should be enabled through another parameter
*/
#if 0
if ( enable )
{
}
xge_os_mdelay(1);
#endif
#define _HAL_LOOPBK_PMA 1
if( enable )
data |= 1;
else
data &= 0xfe;
return XGE_HAL_OK;
}
{
u8 i = 0;
/* address transaction */
do
{
if (i++ > 10)
{
break;
}
/* Data transaction */
i = 0;
do
{
if (i++ > 10)
{
break;
}
return rval16;
}
{
u8 i = 0;
/* address transaction */
do
{
if (i++ > 10)
{
break;
}
/* Data transaction */
val64 = 0x0;
i = 0;
do
{
if (i++ > 10)
{
break;
}
return XGE_HAL_OK;
}
/*
* xge_hal_eeprom_test - to verify that EEprom in the xena can be
programmed.
* @devh: HAL device handle.
* @data:variable that returns the result of each of the test conducted by
* the driver.
*
* Verify that EEPROM in the xena can be programmed using I2C_CONTROL
* register.
* Return value:
* 0 on success.
*/
{
int fail = 0;
/* Test Write Error at offset 0 */
fail = 1;
/* Test Write at offset 4f0 */
fail = 1;
fail = 1;
if (ret_data != 0x01234567)
fail = 1;
/* Reset the EEPROM data go FFFF */
/* Test Write Request Error at offset 0x7c */
fail = 1;
/* Test Write Request at offset 0x7fc */
fail = 1;
fail = 1;
if (ret_data != 0x01234567)
fail = 1;
/* Reset the EEPROM data go FFFF */
/* Test Write Error at offset 0x80 */
fail = 1;
/* Test Write Error at offset 0xfc */
fail = 1;
/* Test Write Error at offset 0x100 */
fail = 1;
/* Test Write Error at offset 4ec */
fail = 1;
return XGE_HAL_OK;
}
/*
* xge_hal_bist_test - invokes the MemBist test of the card .
* @devh: HAL device handle.
* xge_nic structure.
* @data:variable that returns the result of each of the test conducted by
* the driver.
*
* This invokes the MemBist test of the card. We give around
* 2 secs time for the Test to complete. If it's still not complete
* within this peiod, we consider that the test failed.
* Return value:
* 0 on success and -1 on failure.
*/
{
int cnt = 0;
bist |= 0x40;
while (cnt < 20) {
if (!(bist & 0x40)) {
ret = XGE_HAL_OK;
break;
}
xge_os_mdelay(100);
cnt++;
}
return ret;
}
/*
* xge_hal_link_test - verifies the link state of the nic
* @devh: HAL device handle.
* @data: variable that returns the result of each of the test conducted by
* the driver.
*
* Verify the link state of the NIC and updates the input
* argument 'data' appropriately.
* Return value:
* 0 on success.
*/
{
&bar0->adapter_status);
*data = 1;
return XGE_HAL_OK;
}
/**
* xge_hal_getpause_data -Pause frame frame generation and reception.
* @devh: HAL device handle.
* @tx : A field to return the pause generation capability of the NIC.
* @rx : A field to return the pause reception capability of the NIC.
*
* Returns the Pause frame generation and reception capability of the NIC.
* Return value:
* void
*/
{
&bar0->rmac_pause_cfg);
if (val64 & XGE_HAL_RMAC_PAUSE_GEN_EN)
*tx = 1;
if (val64 & XGE_HAL_RMAC_PAUSE_RCV_EN)
*rx = 1;
}
/**
* @devh: HAL device handle.
* @tx: A field that indicates the pause generation capability to be
* set on the NIC.
* @rx: A field that indicates the pause reception capability to be
* set on the NIC.
*
* It can be used to set or reset Pause frame generation or reception
* support of the NIC.
* Return value:
* int, returns 0 on Success
*/
{
&bar0->rmac_pause_cfg);
if (tx)
else
if (rx)
else
return 0;
}
/**
* xge_hal_read_xfp_current_temp -
* @hldev: HAL device handle.
*
* This routine only gets the temperature for XFP modules. Also, updating of the
* NVRAM can sometimes fail and so the reading we might get may not be uptodate.
*/
{
/* First update the NVRAM table of XFP. */
/* Now wait for the transfer to complete */
do
{
if ( i++ > 10 )
{
// waited 500 ms which should be plenty of time.
break;
}
/* Now NVRAM table of XFP should be updated, so read the temp */
if (actual >= 32768)
return actual;
}
/**
* __hal_chk_xpak_counter - check the Xpak error count and log the msg.
* @hldev: pointer to xge_hal_device_t structure
* @type: xpak stats error type
* @value: xpak stats value
*
* It is used to log the error message based on the xpak stats value
* Return value:
* None
*/
{
/*
* If the value is high for three consecutive cylce,
* log a error message
*/
if(value == 3)
{
switch(type)
{
case 1:
excess_temp = 0;
/*
* Notify the ULD on Excess Xpak temperature alarm msg
*/
}
break;
case 2:
excess_bias_current = 0;
/*
* Notify the ULD on Excess xpak bias current alarm msg
*/
}
break;
case 3:
excess_laser_output = 0;
/*
* Notify the ULD on Excess Xpak Laser o/p power
* alarm msg
*/
}
break;
default:
"type ");
}
}
}
/**
* __hal_updt_stats_xpak - update the Xpak error count.
* @hldev: pointer to xge_hal_device_t structure
*
* It is used to update the xpak stats value
* Return value:
* None
*/
{
/* Check the communication with the MDIO slave */
addr = 0x0000;
val_1 = 0x0;
{
"Returned %x", val_1);
return;
}
/* Check for the expected value of 2040 at PMA address 0x0000 */
if(val_1 != 0x2040)
{
(unsigned long long)(unsigned long)val_1);
return;
}
/* Loading the DOM register to MDIO register */
addr = 0xA100;
/*
* Reading the Alarm flags
*/
addr = 0xA070;
val_1 = 0x0;
{
} else {
}
{
} else {
excess_bias_current = 0;
}
{
} else {
excess_laser_output = 0;
}
/*
* Reading the warning flags
*/
addr = 0xA074;
val_1 = 0x0;
}