xgehal-config.c revision 7eced415e5dd557aef2d78483b5a7785f0e13670
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*
* Copyright (c) 2002-2006 Neterion, Inc.
*/
#include "xgehal-config.h"
#include "xge-debug.h"
/*
* __hal_tti_config_check - Check tti configuration
* @new_config: tti configuration information
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*/
static xge_hal_status_e
{
return XGE_HAL_BADCFG_TX_URANGE_A;
}
return XGE_HAL_BADCFG_TX_UFC_A;
}
return XGE_HAL_BADCFG_TX_URANGE_B;
}
return XGE_HAL_BADCFG_TX_UFC_B;
}
return XGE_HAL_BADCFG_TX_URANGE_C;
}
return XGE_HAL_BADCFG_TX_UFC_C;
}
return XGE_HAL_BADCFG_TX_UFC_D;
}
return XGE_HAL_BADCFG_TX_TIMER_VAL;
}
return XGE_HAL_BADCFG_TX_TIMER_CI_EN;
}
return XGE_HAL_BADCFG_TX_TIMER_AC_EN;
}
return XGE_HAL_OK;
}
/*
* __hal_rti_config_check - Check rti configuration
* @new_config: rti configuration information
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*/
static xge_hal_status_e
{
return XGE_HAL_BADCFG_RX_URANGE_A;
}
return XGE_HAL_BADCFG_RX_UFC_A;
}
return XGE_HAL_BADCFG_RX_URANGE_B;
}
return XGE_HAL_BADCFG_RX_UFC_B;
}
return XGE_HAL_BADCFG_RX_URANGE_C;
}
return XGE_HAL_BADCFG_RX_UFC_C;
}
return XGE_HAL_BADCFG_RX_UFC_D;
}
return XGE_HAL_BADCFG_RX_TIMER_VAL;
}
return XGE_HAL_BADCFG_RX_TIMER_AC_EN;
}
return XGE_HAL_OK;
}
/*
* __hal_fifo_queue_check - Check fifo queue configuration
* @new_config: fifo queue configuration information
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*/
static xge_hal_status_e
{
int i;
}
/* FIXME: queue "grow" feature is not supported.
* Use "initial" queue size as the "maximum";
* Remove the next line when fixed. */
}
}
return XGE_HAL_BADCFG_FIFO_QUEUE_INTR;
}
}
for(i = 0; i < XGE_HAL_MAX_FIFO_TTI_NUM; i++) {
/*
* Validate the tti configuration parameters only if
* the TTI feature is enabled.
*/
if ((status = __hal_tti_config_check(
return status;
}
}
}
return XGE_HAL_OK;
}
/*
* __hal_ring_queue_check - Check ring queue configuration
* @new_config: ring queue configuration information
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*/
static xge_hal_status_e
{
}
/* FIXME: queue "grow" feature is not supported.
* Use "initial" queue size as the "maximum";
* Remove the next line when fixed. */
}
}
/*
* Herc has less DRAM; the check is done later inside
* device_initialize()
*/
return XGE_HAL_BADCFG_RING_QUEUE_SIZE;
if ((new_config->backoff_interval_us <
}
return XGE_HAL_BADCFG_MAX_FRM_LEN;
}
return XGE_HAL_BADCFG_RING_PRIORITY;
}
return XGE_HAL_BADCFG_RING_RTH_EN;
}
return XGE_HAL_BADCFG_RING_RTS_MAC_EN;
}
return XGE_HAL_BADCFG_RING_RTS_PORT_EN;
}
}
if (new_config->indicate_max_pkts <
}
}
/*
* __hal_mac_config_check - Check mac configuration
* @new_config: mac configuration information
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*/
static xge_hal_status_e
{
return XGE_HAL_BADCFG_TMAC_UTIL_PERIOD;
}
return XGE_HAL_BADCFG_RMAC_UTIL_PERIOD;
}
return XGE_HAL_BADCFG_RMAC_BCAST_EN;
}
return XGE_HAL_BADCFG_RMAC_PAUSE_GEN_EN;
}
return XGE_HAL_BADCFG_RMAC_PAUSE_RCV_EN;
}
return XGE_HAL_BADCFG_RMAC_HIGH_PTIME;
}
return XGE_HAL_BADCFG_MEDIA;
}
if ((new_config->mc_pause_threshold_q0q3 <
}
if ((new_config->mc_pause_threshold_q4q7 <
}
return XGE_HAL_OK;
}
/*
* __hal_fifo_config_check - Check fifo configuration
* @new_config: fifo configuration information
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*/
static xge_hal_status_e
{
int i;
int total_fifo_length = 0;
/*
* recompute max_frags to be multiple of 4,
* which means, multiple of 128 for TxDL
*/
return XGE_HAL_BADCFG_FIFO_FRAGS;
}
if ((new_config->reserve_threshold <
}
}
for(i = 0; i < XGE_HAL_MAX_FIFO_NUM; i++) {
continue;
return status;
}
}
}
return XGE_HAL_OK;
}
/*
* __hal_ring_config_check - Check ring configuration
* @new_config: Ring configuration information
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*/
static xge_hal_status_e
{
int i;
}
for(i = 0; i < XGE_HAL_MAX_RING_NUM; i++) {
continue;
!= XGE_HAL_OK) {
return status;
}
}
return XGE_HAL_OK;
}
/*
* __hal_device_config_check_common - Check device configuration.
* @new_config: Device configuration information
*
* Check part of configuration that is common to
* Xframe-I and Xframe-II.
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*
* See also: __hal_device_config_check_xena().
*/
{
return XGE_HAL_BADCFG_MAX_MTU;
}
return XGE_HAL_BADCFG_BIMODAL_INTR;
}
if (new_config->bimodal_interrupts &&
}
if (new_config->bimodal_interrupts &&
}
return XGE_HAL_BADCFG_NO_ISR_EVENTS;
}
return XGE_HAL_BADCFG_ISR_POLLING_CNT;
}
if (new_config->latency_timer &&
return XGE_HAL_BADCFG_LATENCY_TIMER;
}
}
if ((new_config->max_splits_trans <
return XGE_HAL_BADCFG_MAX_SPLITS_TRANS;
}
{
return XGE_HAL_BADCFG_MMRB_COUNT;
}
}
return XGE_HAL_BADCFG_SHARED_SPLITS;
}
if (new_config->stats_refresh_time_sec !=
if ((new_config->stats_refresh_time_sec <
}
}
return XGE_HAL_BADCFG_INTR_MODE;
}
return XGE_HAL_BADCFG_SCHED_TIMER_US;
}
if ((new_config->sched_timer_one_shot !=
}
/*
* Check adaptive schema parameters. Note that there are two
* configuration variables needs to be enabled in ULD:
*
* a) sched_timer_us should not be zero;
* b) rxufca_hi_lim should not be equal to rxufca_lo_lim.
*
* The code bellow checking for those conditions.
*/
if (new_config->sched_timer_us &&
if ((new_config->rxufca_intr_thres <
return XGE_HAL_BADCFG_RXUFCA_INTR_THRES;
}
return XGE_HAL_BADCFG_RXUFCA_HI_LIM;
}
return XGE_HAL_BADCFG_RXUFCA_LO_LIM;
}
if ((new_config->rxufca_lbolt_period <
}
}
return XGE_HAL_BADCFG_LINK_VALID_CNT;
}
return XGE_HAL_BADCFG_LINK_RETRY_CNT;
}
return XGE_HAL_BADCFG_LINK_VALID_CNT;
if ((new_config->link_stability_period <
}
}
if (new_config->device_poll_millis !=
if ((new_config->device_poll_millis <
}
}
return XGE_HAL_BADCFG_RTS_PORT_EN;
}
return XGE_HAL_BADCFG_RTS_QOS_EN;
}
#if defined(XGE_HAL_CONFIG_LRO)
if (new_config->lro_sg_size !=
return XGE_HAL_BADCFG_LRO_SG_SIZE;
}
}
if (new_config->lro_frm_len !=
return XGE_HAL_BADCFG_LRO_FRM_LEN;
}
}
#endif
!= XGE_HAL_OK) {
return status;
}
XGE_HAL_OK) {
return status;
}
XGE_HAL_OK) {
return status;
}
return XGE_HAL_OK;
}
/*
* __hal_device_config_check_xena - Check Xframe-I configuration
* @new_config: Device configuration.
*
* Check part of configuration that is relevant only to Xframe-I.
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*
* See also: __hal_device_config_check_common().
*/
{
return XGE_HAL_BADCFG_PCI_FREQ_MHERZ;
}
return XGE_HAL_OK;
}
/*
* __hal_device_config_check_herc - Check device configuration
* @new_config: Device configuration.
*
* Check part of configuration that is relevant only to Xframe-II.
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*
* See also: __hal_device_config_check_common().
*/
{
return XGE_HAL_OK;
}
/*
* __hal_driver_config_check - Check HAL configuration
* @new_config: Driver configuration information
*
* Returns: XGE_HAL_OK - success,
* otherwise one of the xge_hal_status_e{} enumerated error codes.
*/
{
if ((new_config->queue_size_initial <
}
return XGE_HAL_BADCFG_QUEUE_SIZE_MAX;
}
#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
return XGE_HAL_BADCFG_TRACEBUF_SIZE;
}
return XGE_HAL_BADCFG_TRACEBUF_SIZE;
}
#endif
return XGE_HAL_OK;
}