xgehal-types.h revision a23fd118e437af0a7877dd313db8fdaa3537c675
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/*
* Copyright (c) 2002-2005 Neterion, Inc.
* All right Reserved.
*
* FileName : xgehal-types.h
*
* Description: HAL commonly used types and enumerations
*
* Created: 19 May 2004
*/
#ifndef XGE_HAL_TYPES_H
#define XGE_HAL_TYPES_H
#include "xge-os-pal.h"
/*
* BIT(loc) - set bit at offset
*/
/*
* vBIT(val, loc, sz) - set bits at offset
*/
#define XGE_HAL_BASE_INF 100
#define XGE_HAL_BASE_ERR 200
#define XGE_HAL_BASE_BADCFG 300
#define XGE_HAL_ALL_FOXES 0xFFFFFFFFFFFFFFFFULL
/**
* enum xge_hal_status_e - HAL return codes.
* @XGE_HAL_OK: Success.
* @XGE_HAL_FAIL: Failure.
* @XGE_HAL_COMPLETIONS_REMAIN: There are more completions on a channel.
* (specific to polling mode completion processing).
* @XGE_HAL_INF_NO_MORE_COMPLETED_DESCRIPTORS: No more completed
* descriptors. See xge_hal_fifo_dtr_next_completed().
* @XGE_HAL_INF_OUT_OF_DESCRIPTORS: Out of descriptors. Channel
* descriptors
* are reserved (via xge_hal_fifo_dtr_reserve(),
* xge_hal_fifo_dtr_reserve())
* and not yet freed (via xge_hal_fifo_dtr_free(),
* xge_hal_ring_dtr_free()).
* @XGE_HAL_INF_CHANNEL_IS_NOT_READY: Channel is not ready for
* operation.
* @XGE_HAL_INF_MEM_STROBE_CMD_EXECUTING: Indicates that host needs to
* poll until PIO is executed.
* @XGE_HAL_INF_STATS_IS_NOT_READY: Cannot retrieve statistics because
* @XGE_HAL_INF_NO_MORE_FREED_DESCRIPTORS: No descriptors left to
* reserve. Internal use only.
* @XGE_HAL_INF_IRQ_POLLING_CONTINUE: Returned by the ULD channel
* callback when instructed to exit descriptor processing loop
* prematurely. Typical usage: polling mode of processing completed
* descriptors.
* Upon getting LRO_ISED, ll driver shall
* 1) initialise lro struct with mbuf if sg_num == 1.
* 2) else it will update m_data_ptr_of_mbuf to tcp pointer and
* append the new mbuf to the tail of mbuf chain in lro struct.
*
* @XGE_HAL_INF_LRO_BEGIN: Returned by ULD LRO module, when new LRO is
* being initiated.
* @XGE_HAL_INF_LRO_CONT: Returned by ULD LRO module, when new frame
* is appended at the end of existing LRO.
* @XGE_HAL_INF_LRO_UNCAPABLE: Returned by ULD LRO module, when new
* frame is not LRO capable.
* @XGE_HAL_INF_LRO_END_1: Returned by ULD LRO module, when new frame
* triggers LRO flush.
* @XGE_HAL_INF_LRO_END_2: Returned by ULD LRO module, when new
* frame triggers LRO flush. Lro frame should be flushed first then
* new frame should be flushed next.
* @XGE_HAL_INF_LRO_SESSIONS_XCDED: Returned by ULD LRO module, when no
* more LRO sessions can be added.
* @XGE_HAL_ERR_DRIVER_NOT_INITIALIZED: HAL is not initialized.
* @XGE_HAL_ERR_OUT_OF_MEMORY: Out of memory (example, when and
* allocating descriptors).
* @XGE_HAL_ERR_CHANNEL_NOT_FOUND: xge_hal_channel_open will return this
* error if corresponding channel is not configured.
* @XGE_HAL_ERR_WRONG_IRQ: Returned by HAL's ISR when the latter is
* invoked not because of the Xframe-generated interrupt.
* @XGE_HAL_ERR_OUT_OF_MAC_ADDRESSES: Returned when user tries to
* configure more than XGE_HAL_MAX_MAC_ADDRESSES mac addresses.
* @XGE_HAL_ERR_BAD_DEVICE_ID: Unknown device PCI ID.
* @XGE_HAL_ERR_OUT_ALIGNED_FRAGS: Too many unaligned fragments
* in a scatter-gather list.
* @XGE_HAL_ERR_DEVICE_NOT_INITIALIZED: Device is not initialized.
* Typically means wrong sequence of API calls.
* @XGE_HAL_ERR_SWAPPER_CTRL: Error during device initialization: failed
* to set Xframe byte swapper in accordnace with the host
* endian-ness.
* @XGE_HAL_ERR_DEVICE_IS_NOT_QUIESCENT: Failed to restore the device to
* a "quiescent" state.
* @XGE_HAL_ERR_INVALID_MTU_SIZE: Returned when MTU size specified by
* caller is not in the (64, 9600) range.
* @XGE_HAL_ERR_OUT_OF_MAPPING: Failed to map DMA-able memory.
* @XGE_HAL_ERR_BAD_SUBSYSTEM_ID: Bad PCI subsystem ID. (Currently we
* @XGE_HAL_ERR_INVALID_BAR_ID: Invalid BAR ID. Xframe supports two Base
* Address Register Spaces: BAR0 (id=0) and BAR1 (id=1).
* @XGE_HAL_ERR_INVALID_OFFSET: Invalid offset. Example, attempt to read
* register value (with offset) outside of the BAR0 space.
* @XGE_HAL_ERR_INVALID_DEVICE: Invalid device. The HAL device handle
* (passed by ULD) is invalid.
* @XGE_HAL_ERR_OUT_OF_SPACE: Out-of-provided-buffer-space. Returned by
* management "get" routines when the retrieved information does
* not fit into the provided buffer.
* @XGE_HAL_ERR_INVALID_VALUE_BIT_SIZE: Invalid bit size.
* @XGE_HAL_ERR_VERSION_CONFLICT: Upper-layer driver and HAL (versions)
* are not compatible.
* @XGE_HAL_ERR_INVALID_MAC_ADDRESS: Invalid MAC address.
* @XGE_HAL_ERR_SPDM_NOT_ENABLED: SPDM support is not enabled.
* @XGE_HAL_ERR_SPDM_TABLE_FULL: SPDM table is full.
* @XGE_HAL_ERR_SPDM_INVALID_ENTRY: Invalid SPDM entry.
* @XGE_HAL_ERR_SPDM_ENTRY_NOT_FOUND: Unable to locate the entry in the
* SPDM table.
* @XGE_HAL_ERR_SPDM_TABLE_DATA_INCONSISTENT: Local SPDM table is not in
* synch ith the actual one.
* @XGE_HAL_ERR_INVALID_PCI_INFO: Invalid or unrecognized PCI frequency,
* and or width, and or mode (Xframe-II only, see UG on PCI_INFO register).
* @XGE_HAL_ERR_CRITICAL: Critical error. Returned by HAL APIs
* (including xge_hal_device_handle_tcode()) on: ECC, parity, SERR.
* Also returned when PIO read does not go through ("all-foxes")
* because of "slot-freeze".
* @XGE_HAL_ERR_RESET_FAILED: Failed to soft-reset the device.
* Returned by xge_hal_device_reset(). One circumstance when it could
* happen: slot freeze by the system (see @XGE_HAL_ERR_CRITICAL).
* @XGE_HAL_BADCFG_TX_URANGE_A: Invalid Tx link utilization range A. See
* the structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_UFC_A: Invalid frame count for Tx link utilization
* range A. See the structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_URANGE_B: Invalid Tx link utilization range B. See
* the structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_UFC_B: Invalid frame count for Tx link utilization
* range B. See the strucuture xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_URANGE_C: Invalid Tx link utilization range C. See
* the structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_UFC_C: Invalid frame count for Tx link utilization
* range C. See the structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_URANGE_D: Invalid Tx link utilization range D. See
* the structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_UFC_D: Invalid frame count for Tx link utilization
* range D. See the structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_TIMER_VAL: Invalid Tx timer value. See the
* structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_TX_TIMER_CI_EN: Invalid Tx timer continuous interrupt
* enable. See the structure xge_hal_tti_config_t{} for valid values.
* @XGE_HAL_BADCFG_RX_URANGE_A: Invalid Rx link utilization range A. See
* the structure xge_hal_rti_config_t{} for valid values.
* @XGE_HAL_BADCFG_RX_UFC_A: Invalid frame count for Rx link utilization
* range A. See the structure xge_hal_rti_config_t{} for valid values.
* @XGE_HAL_BADCFG_RX_URANGE_B: Invalid Rx link utilization range B. See
* the structure xge_hal_rti_config_t{} for valid values.
* @XGE_HAL_BADCFG_RX_UFC_B: Invalid frame count for Rx link utilization
* range B. See the structure xge_hal_rti_config_t{} for valid values.
* @XGE_HAL_BADCFG_RX_URANGE_C: Invalid Rx link utilization range C. See
* the structure xge_hal_rti_config_t{} for valid values.
* @XGE_HAL_BADCFG_RX_UFC_C: Invalid frame count for Rx link utilization
* range C. See the structure xge_hal_rti_config_t{} for valid values.
* @XGE_HAL_BADCFG_RX_UFC_D: Invalid frame count for Rx link utilization
* range D. See the structure xge_hal_rti_config_t{} for valid values.
* @XGE_HAL_BADCFG_RX_TIMER_VAL: Invalid Rx timer value. See the
* structure xge_hal_rti_config_t{} for valid values.
* @XGE_HAL_BADCFG_FIFO_QUEUE_INITIAL_LENGTH: Invalid initial fifo queue
* length. See the structure xge_hal_fifo_queue_t for valid values.
* @XGE_HAL_BADCFG_FIFO_QUEUE_MAX_LENGTH: Invalid fifo queue max length.
* See the structure xge_hal_fifo_queue_t for valid values.
* @XGE_HAL_BADCFG_FIFO_QUEUE_INTR: Invalid fifo queue interrupt mode.
* See the structure xge_hal_fifo_queue_t for valid values.
* @XGE_HAL_BADCFG_RING_QUEUE_INITIAL_BLOCKS: Invalid Initial number of
* RxD blocks for the ring. See the structure xge_hal_ring_queue_t for
* valid values.
* @XGE_HAL_BADCFG_RING_QUEUE_MAX_BLOCKS: Invalid maximum number of RxD
* blocks for the ring. See the structure xge_hal_ring_queue_t for
* valid values.
* @XGE_HAL_BADCFG_RING_QUEUE_BUFFER_MODE: Invalid ring buffer mode. See
* the structure xge_hal_ring_queue_t for valid values.
* @XGE_HAL_BADCFG_RING_QUEUE_SIZE: Invalid ring queue size. See the
* structure xge_hal_ring_queue_t for valid values.
* @XGE_HAL_BADCFG_BACKOFF_INTERVAL_US: Invalid backoff timer interval
* for the ring. See the structure xge_hal_ring_queue_t for valid values.
* @XGE_HAL_BADCFG_MAX_FRM_LEN: Invalid ring max frame length. See the
* structure xge_hal_ring_queue_t for valid values.
* @XGE_HAL_BADCFG_RING_PRIORITY: Invalid ring priority. See the
* structure xge_hal_ring_queue_t for valid values.
* @XGE_HAL_BADCFG_TMAC_UTIL_PERIOD: Invalid tmac util period. See the
* structure xge_hal_mac_config_t{} for valid values.
* @XGE_HAL_BADCFG_RMAC_UTIL_PERIOD: Invalid rmac util period. See the
* structure xge_hal_mac_config_t{} for valid values.
* @XGE_HAL_BADCFG_RMAC_BCAST_EN: Invalid rmac brodcast enable. See the
* structure xge_hal_mac_config_t{} for valid values.
* @XGE_HAL_BADCFG_RMAC_HIGH_PTIME: Invalid rmac pause time. See the
* structure xge_hal_mac_config_t{} for valid values.
* @XGE_HAL_BADCFG_MC_PAUSE_THRESHOLD_Q0Q3: Invalid threshold for pause
* frame generation for queues 0 through 3. See the structure
* xge_hal_mac_config_t{} for valid values.
* @XGE_HAL_BADCFG_MC_PAUSE_THRESHOLD_Q4Q7:Invalid threshold for pause
* frame generation for queues 4 through 7. See the structure
* xge_hal_mac_config_t{} for valid values.
* @XGE_HAL_BADCFG_FIFO_FRAGS: Invalid fifo max fragments length. See
* the structure xge_hal_fifo_config_t{} for valid values.
* @XGE_HAL_BADCFG_FIFO_RESERVE_THRESHOLD: Invalid fifo reserve
* threshold. See the structure xge_hal_fifo_config_t{} for valid values.
* @XGE_HAL_BADCFG_FIFO_MEMBLOCK_SIZE: Invalid fifo descriptors memblock
* size. See the structure xge_hal_fifo_config_t{} for valid values.
* @XGE_HAL_BADCFG_RING_MEMBLOCK_SIZE: Invalid ring descriptors memblock
* size. See the structure xge_hal_ring_config_t{} for valid values.
* @XGE_HAL_BADCFG_MAX_MTU: Invalid max mtu for the device. See the
* structure xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_ISR_POLLING_CNT: Invalid isr polling count. See the
* structure xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_LATENCY_TIMER: Invalid Latency timer. See the
* structure xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_MAX_SPLITS_TRANS: Invalid maximum number of pci-x
* split transactions. See the structure xge_hal_device_config_t{} for valid
* values.
* @XGE_HAL_BADCFG_MMRB_COUNT: Invalid mmrb count. See the structure
* xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_SHARED_SPLITS: Invalid number of outstanding split
* transactions that is shared by Tx and Rx requests. See the structure
* xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_STATS_REFRESH_TIME: Invalid time interval for
* automatic statistics transfer to the host. See the structure
* xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_PCI_FREQ_MHERZ: Invalid pci clock frequency. See the
* structure xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_PCI_MODE: Invalid pci mode. See the structure
* xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_INTR_MODE: Invalid interrupt mode. See the structure
* xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_SCHED_TIMER_US: Invalid scheduled timer interval to
* generate interrupt. See the structure xge_hal_device_config_t{}
* for valid values.
* @XGE_HAL_BADCFG_SCHED_TIMER_ON_SHOT: Invalid scheduled timer one
* shot. See the structure xge_hal_device_config_t{} for valid values.
* @XGE_HAL_BADCFG_QUEUE_SIZE_INITIAL: Invalid driver queue initial
* size. See the structure xge_hal_driver_config_t{} for valid values.
* @XGE_HAL_BADCFG_QUEUE_SIZE_MAX: Invalid driver queue max size. See
* the structure xge_hal_driver_config_t{} for valid values.
* @XGE_HAL_BADCFG_RING_RTH_EN: Invalid value of RTH-enable. See
* the structure xge_hal_ring_queue_t for valid values.
* @XGE_HAL_BADCFG_RING_INDICATE_MAX_PKTS: Invalid value configured for
* indicate_max_pkts variable.
* @XGE_HAL_BADCFG_TX_TIMER_AC_EN: Invalid value for Tx timer
* auto-cancel. See xge_hal_tti_config_t{}.
* @XGE_HAL_BADCFG_RX_TIMER_AC_EN: Invalid value for Rx timer
* auto-cancel. See xge_hal_rti_config_t{}.
* @XGE_HAL_BADCFG_RXUFCA_INTR_THRES: TODO
* @XGE_HAL_BADCFG_RXUFCA_LO_LIM: TODO
* @XGE_HAL_BADCFG_RXUFCA_HI_LIM: TODO
* @XGE_HAL_BADCFG_RXUFCA_LBOLT_PERIOD: TODO
* @XGE_HAL_BADCFG_TRACEBUF_SIZE: Bad configuration: the size of the circular
* (in memory) trace buffer either too large or too small. See the
* the corresponding header file or README for the acceptable range.
* @XGE_HAL_BADCFG_LINK_VALID_CNT: Bad configuration: the link-valid
* counter cannot have the specified value. Note that the link-valid
* counting is done only at device-open time, to determine with the
* specified certainty that the link is up. See the
* the corresponding header file or README for the acceptable range.
* See also @XGE_HAL_BADCFG_LINK_RETRY_CNT.
* @XGE_HAL_BADCFG_LINK_RETRY_CNT: Bad configuration: the specified
* link-up retry count is out of the valid range. Note that the link-up
* retry counting is done only at device-open time.
* See also xge_hal_device_config_t{}.
* @XGE_HAL_BADCFG_LINK_STABILITY_PERIOD: Invalid link stability period.
* @XGE_HAL_BADCFG_DEVICE_POLL_MILLIS: Invalid device poll interval.
* See the structure xge_hal_device_config_t{} for valid values.
* @XGE_HAL_EOF_TRACE_BUF: End of the circular (in memory) trace buffer.
* Returned by xge_hal_mgmt_trace_read(), when user tries to read the trace
* past the buffer limits. Used to enable user to load the trace in two
* or more reads.
* @XGE_HAL_BADCFG_RING_RTS_MAC_EN: Invalid value of RTS_MAC_EN enable. See
* the structure xge_hal_ring_queue_t for valid values.
*
* Enumerates status and error codes returned by HAL public
* API functions.
*/
typedef enum xge_hal_status_e {
XGE_HAL_OK = 0,
XGE_HAL_FAIL = 1,
#define XGE_HAL_ETH_ALEN 6
#define XGE_HAL_PCI_XFRAME_CONFIG_SPACE_SIZE 0x100
/* frames sizes */
#define XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE 14
#define XGE_HAL_HEADER_802_2_SIZE 3
#define XGE_HAL_HEADER_SNAP_SIZE 5
#define XGE_HAL_HEADER_VLAN_SIZE 4
#define XGE_HAL_MAC_HEADER_MAX_SIZE \
/* 32bit alignments */
#define XGE_HAL_HEADER_ETHERNET_II_802_3_ALIGN 2
#define XGE_HAL_HEADER_802_2_SNAP_ALIGN 2
#define XGE_HAL_HEADER_802_2_ALIGN 3
#define XGE_HAL_HEADER_SNAP_ALIGN 1
#define XGE_HAL_L3_CKSUM_OK 0xFFFF
#define XGE_HAL_L4_CKSUM_OK 0xFFFF
#define XGE_HAL_MIN_MTU 46
#define XGE_HAL_MAX_MTU 9600
#define XGE_HAL_DEFAULT_MTU 1500
#define XGE_HAL_SEGEMENT_OFFLOAD_MAX_SIZE 81920
/* Highest level interrupt blocks */
#define XGE_HAL_TX_PIC_INTR (0x0001<<0)
#define XGE_HAL_ALL_INTRS (XGE_HAL_TX_PIC_INTR | \
XGE_HAL_MC_INTR | \
/* Interrupt masks for the general interrupt mask register */
#define XGE_HAL_ALL_INTRS_DIS 0xFFFFFFFFFFFFFFFFULL
#define XGE_HAL_TXPIC_INT_M BIT(0)
/* MSI level Interrupts */
#define XGE_HAL_MAX_MSIX_VECTORS (16)
/*
* xge_hal_msix_vector_t
*
* Represents MSI-X vector.
*
*/
typedef struct xge_hal_msix_vector_t {
int idx;
int num;
void *data;
char desc[16];
typedef struct xge_hal_ipv4 {
typedef struct xge_hal_ipv6 {
typedef union xge_hal_ipaddr_t {
/* DMA level Interrupts */
#define XGE_HAL_TXDMA_PFC_INT_M BIT(0)
/* PFC block interrupts */
full */
/* basic handles */
typedef void* xge_hal_device_h;
typedef void* xge_hal_dtr_h;
typedef void* xge_hal_channel_h;
/*
* I2C device id. Used in I2C control register for accessing EEPROM device
* memory.
*/
#define XGE_DEV_ID 5
#endif /* XGE_HAL_TYPES_H */