xgehal-device.h revision a23fd118e437af0a7877dd313db8fdaa3537c675
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright (c) 2002-2005 Neterion, Inc.
* All right Reserved.
*
* FileName : xgehal-device.h
*
* Description: HAL device object functionality
*
* Created: 14 May 2004
*/
#ifndef XGE_HAL_DEVICE_H
#define XGE_HAL_DEVICE_H
#include "xge-os-pal.h"
#include "xge-queue.h"
#include "xgehal-event.h"
#include "xgehal-config.h"
#include "xgehal-regs.h"
#include "xgehal-channel.h"
#include "xgehal-stats.h"
#define XGE_HAL_DEVICE_XMSI_WAIT_MAX_MILLIS 500
#define XGE_HAL_DEVICE_CMDMEM_WAIT_MAX_MILLIS 500
#define XGE_HAL_DEVICE_QUIESCENT_WAIT_MAX_MILLIS 500
#define XGE_HAL_DEVICE_FAULT_WAIT_MAX_MILLIS 50
#define XGE_HAL_DEVICE_RESET_WAIT_MAX_MILLIS 250
#define XGE_HAL_MAX_MSIX_MESSAGES 64
#define XGE_HAL_MAGIC 0x12345678
#define XGE_HAL_DEAD 0xDEADDEAD
#define XGE_HAL_DUMP_BUF_SIZE 0x4000
#define XGE_HAL_MAX_LRO_SESSIONS 15
/**
* enum xge_hal_card_e - Xframe adapter type.
* @XGE_HAL_CARD_UNKNOWN: Unknown device.
* @XGE_HAL_CARD_XENA: Xframe I device.
* @XGE_HAL_CARD_HERC: Xframe II (PCI-266Mhz) device.
*
* Enumerates Xframe adapter types. The corresponding PCI device
* IDs are listed in the file xgehal-defs.h.
* (See XGE_PCI_DEVICE_ID_XENA_1, etc.)
*
* See also: xge_hal_device_check_id().
*/
typedef enum xge_hal_card_e {
XGE_HAL_CARD_UNKNOWN = 0,
XGE_HAL_CARD_XENA = 1,
XGE_HAL_CARD_HERC = 2,
/**
* struct xge_hal_device_attr_t - Device memory spaces.
* @regh0: BAR0 mapped memory handle (Solaris), or simply PCI device @pdev
* (Linux and the rest.)
* @regh1: BAR1 mapped memory handle. Same comment as above.
* @bar0: BAR0 virtual address.
* @bar1: BAR1 virtual address.
* @bar2: BAR2 virtual address.
* @irqh: IRQ handle (Solaris).
* @cfgh: Configuration space handle (Solaris), or PCI device @pdev (Linux).
* @pdev: PCI device object.
*
* Device memory spaces. Includes configuration, BAR0, BAR1, etc. per device
* mapped memories. Also, includes a pointer to OS-specific PCI device object.
*/
typedef struct xge_hal_device_attr_t {
char *bar0;
char *bar1;
char *bar2;
/**
* enum xge_hal_device_link_state_e - Link state enumeration.
* @XGE_HAL_LINK_NONE: Invalid link state.
* @XGE_HAL_LINK_DOWN: Link is down.
* @XGE_HAL_LINK_UP: Link is up.
*
*/
typedef enum xge_hal_device_link_state_e {
/**
* enum xge_hal_pci_mode_e - PIC bus speed and mode specific enumeration.
* @XGE_HAL_PCI_33MHZ_MODE: 33 MHZ pci mode.
* @XGE_HAL_PCI_66MHZ_MODE: 66 MHZ pci mode.
* @XGE_HAL_PCIX_M1_66MHZ_MODE: PCIX M1 66MHZ mode.
* @XGE_HAL_PCIX_M1_100MHZ_MODE: PCIX M1 100MHZ mode.
* @XGE_HAL_PCIX_M1_133MHZ_MODE: PCIX M1 133MHZ mode.
* @XGE_HAL_PCIX_M2_66MHZ_MODE: PCIX M2 66MHZ mode.
* @XGE_HAL_PCIX_M2_100MHZ_MODE: PCIX M2 100MHZ mode.
* @XGE_HAL_PCIX_M2_133MHZ_MODE: PCIX M3 133MHZ mode.
* @XGE_HAL_PCIX_M1_RESERVED: PCIX M1 reserved mode.
* @XGE_HAL_PCIX_M1_66MHZ_NS: PCIX M1 66MHZ mode not supported.
* @XGE_HAL_PCIX_M1_100MHZ_NS: PCIX M1 100MHZ mode not supported.
* @XGE_HAL_PCIX_M1_133MHZ_NS: PCIX M1 133MHZ not supported.
* @XGE_HAL_PCIX_M2_RESERVED: PCIX M2 reserved.
* @XGE_HAL_PCIX_533_RESERVED: PCIX 533 reserved.
* @XGE_HAL_PCI_BASIC_MODE: PCI basic mode, XENA specific value.
* @XGE_HAL_PCIX_BASIC_MODE: PCIX basic mode, XENA specific value.
* @XGE_HAL_PCI_INVALID_MODE: Invalid PCI or PCIX mode.
*
*/
typedef enum xge_hal_pci_mode_e {
XGE_HAL_PCI_33MHZ_MODE = 0x0,
XGE_HAL_PCI_66MHZ_MODE = 0x1,
XGE_HAL_PCIX_M1_66MHZ_MODE = 0x2,
XGE_HAL_PCIX_M1_100MHZ_MODE = 0x3,
XGE_HAL_PCIX_M1_133MHZ_MODE = 0x4,
XGE_HAL_PCIX_M2_66MHZ_MODE = 0x5,
XGE_HAL_PCIX_M2_100MHZ_MODE = 0x6,
XGE_HAL_PCIX_M2_133MHZ_MODE = 0x7,
XGE_HAL_PCIX_M1_RESERVED = 0x8,
XGE_HAL_PCIX_M1_66MHZ_NS = 0xA,
XGE_HAL_PCIX_M1_100MHZ_NS = 0xB,
XGE_HAL_PCIX_M1_133MHZ_NS = 0xC,
XGE_HAL_PCIX_M2_RESERVED = 0xD,
XGE_HAL_PCIX_533_RESERVED = 0xE,
XGE_HAL_PCI_BASIC_MODE = 0x10,
XGE_HAL_PCIX_BASIC_MODE = 0x11,
XGE_HAL_PCI_INVALID_MODE = 0x12,
/**
* enum xge_hal_pci_bus_frequency_e - PCI bus frequency enumeration.
* @XGE_HAL_PCI_BUS_FREQUENCY_33MHZ: PCI bus frequency 33MHZ
* @XGE_HAL_PCI_BUS_FREQUENCY_66MHZ: PCI bus frequency 66MHZ
* @XGE_HAL_PCI_BUS_FREQUENCY_100MHZ: PCI bus frequency 100MHZ
* @XGE_HAL_PCI_BUS_FREQUENCY_133MHZ: PCI bus frequency 133MHZ
* @XGE_HAL_PCI_BUS_FREQUENCY_266MHZ: PCI bus frequency 266MHZ
* @XGE_HAL_PCI_BUS_FREQUENCY_UNKNOWN: Unrecognized PCI bus frequency value.
*
*/
typedef enum xge_hal_pci_bus_frequency_e {
/**
* enum xge_hal_pci_bus_width_e - PCI bus width enumeration.
* @XGE_HAL_PCI_BUS_WIDTH_64BIT: 64 bit bus width.
* @XGE_HAL_PCI_BUS_WIDTH_32BIT: 32 bit bus width.
* @XGE_HAL_PCI_BUS_WIDTH_UNKNOWN: unknown bus width.
*
*/
typedef enum xge_hal_pci_bus_width_e {
#if defined (XGE_HAL_CONFIG_LRO)
#define IP_TOTAL_LENGTH_OFFSET 2
#define IP_FAST_PATH_HDR_MASK 0x45
#define TCP_FAST_PATH_HDR_MASK1 0x50
#define TCP_FAST_PATH_HDR_MASK2 0x10
#define TCP_FAST_PATH_HDR_MASK3 0x18
#define IP_SOURCE_ADDRESS_OFFSET 12
#define IP_DESTINATION_ADDRESS_OFFSET 16
#define TCP_DESTINATION_PORT_OFFSET 2
#define TCP_SOURCE_PORT_OFFSET 0
#define TCP_DATA_OFFSET_OFFSET 12
#define TCP_WINDOW_OFFSET 14
#define TCP_SEQUENCE_NUMBER_OFFSET 4
#define TCP_ACKNOWLEDGEMENT_NUMBER_OFFSET 8
typedef struct tcplro {
} tcplro_t;
typedef struct iplro {
/*The options start here. */
} iplro_t;
/*
* LRO object, one per each LRO session.
*/
typedef struct lro {
/* non-linear: contains scatter-gather list of
xframe-mapped received buffers */
/* link layer header of the first frame;
remains intack throughout the processing */
/* IP header - gets _collapsed_ */
/* transport header - gets _collapsed_ */
/* Next tcp sequence number */
/* Current tcp seq & ack */
/* total number of accumulated (so far) frames */
int sg_num;
/* total data length */
int total_length;
/* receive side hash value, available from Hercules */
/* In use */
/* Total length of the fragments clubbed with the inital frame */
} lro_t;
#endif
/*
* xge_hal_spdm_entry_t
*
* Represents a single spdm entry in the SPDM table.
*/
typedef struct xge_hal_spdm_entry_t {
/*
* xge_hal_device_t
*
* HAL device object. Represents Xframe.
*/
typedef struct {
int magic;
char *bar0;
char *isrbar0;
char *bar1;
char *bar2;
#if defined(XGE_HAL_MSI_X)
#endif
volatile int is_initialized;
volatile int terminating;
volatile int mcast_refcnt;
int is_promisc;
volatile xge_hal_device_link_state_e link_state;
void *upper_layer_info;
int msi_enabled;
int hw_is_initialized;
char *spdm_mem_base;
#if defined(XGE_HAL_MSI)
#endif
#if defined(XGE_HAL_CONFIG_LRO)
#endif
char* dump_buf;
int mtu_first_time_set;
volatile int in_poll;
/* ========================== PRIVATE API ================================= */
void *addr);
void *addr);
int max_millis);
/* =========================== PUBLIC API ================================= */
unsigned int
unsigned int time_ival);
void
void
void
void
void
void
/**
* xge_hal_device_is_initialized - Returns 0 if device is not
* initialized, non-zero otherwise.
* @devh: HAL device handle.
*
* Returns 0 if device is not initialized, non-zero otherwise.
*/
static inline int
{
}
/**
* xge_hal_device_in_poll - non-zero, if xge_hal_device_poll() is executing.
* @devh: HAL device handle.
*
* Returns non-zero if xge_hal_device_poll() is executing, and 0 - otherwise.
*/
static inline int
{
}
/**
* xge_hal_device_inject_ecc - Inject ECC error.
* @devh: HAL device, pointer to xge_hal_device_t structure.
* @err_reg: Contains the error register.
*
* This function is used to inject ECC error into the driver flow.
* This facility can be used to test the driver flow in the
* case of ECC error is reported by the firmware.
*
* Returns: void
* See also: xge_hal_device_inject_serr(),
* xge_hal_device_inject_bad_tcode()
*/
static inline void
{
}
/**
* xge_hal_device_inject_serr - Inject SERR error.
* @devh: HAL device, pointer to xge_hal_device_t structure.
* @err_reg: Contains the error register.
*
* This function is used to inject SERR error into the driver flow.
* This facility can be used to test the driver flow in the
* case of SERR error is reported by firmware.
*
* Returns: void
* See also: xge_hal_device_inject_ecc(),
* xge_hal_device_inject_bad_tcode()
*/
static inline void
{
}
/**
* xge_hal_device_inject_bad_tcode - Inject Bad transfer code.
* @devh: HAL device, pointer to xge_hal_device_t structure.
* @t_code: Transfer code.
*
* into the driver flow.
*
* This facility can be used to test the driver flow in the
* transfer.
*
* Returns: void
* See also: xge_hal_device_inject_ecc(), xge_hal_device_inject_serr()
*/
static inline void
{
}
/*
* xge_hal_device_msi_mode - Is MSI enabled?
* @devh: HAL device handle.
*
* Returns 0 if MSI is enabled for the specified device,
* non-zero otherwise.
*/
static inline int
{
}
/**
* xge_hal_device_queue - Get per-device event queue.
* @devh: HAL device handle.
*
* Returns: event queue associated with the specified HAL device.
*/
static inline xge_queue_h
{
}
/**
* xge_hal_device_attr - Get original (user-specified) device
* attributes.
* @devh: HAL device handle.
*
* Returns: original (user-specified) device attributes.
*/
static inline xge_hal_device_attr_t*
{
}
/**
* xge_hal_device_private_set - Set ULD context.
* @devh: HAL device handle.
* @data: pointer to ULD context
*
* Use HAL device to set upper-layer driver (ULD) context.
*
* See also: xge_hal_device_from_private(), xge_hal_device_private()
*/
static inline void
{
}
/**
* xge_hal_device_private - Get ULD context.
* @devh: HAL device handle.
*
* Use HAL device to get upper-layer driver (ULD) context.
*
* Returns: ULD context.
*
* See also: xge_hal_device_from_private(), xge_hal_device_private_set()
*/
static inline void*
{
}
/**
* xge_hal_device_from_private - Get HAL device object from private.
* @info_ptr: ULD context.
*
* Use ULD context to get HAL device.
*
* Returns: Device handle.
*
* See also: xge_hal_device_private(), xge_hal_device_private_set()
*/
static inline xge_hal_device_h
{
}
/**
* xge_hal_device_mtu_check - check MTU value for ranges
* @hldev: the device
* @new_mtu: new MTU value to check
*
* Will do sanity check for new MTU value.
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_ERR_INVALID_MTU_SIZE - MTU is invalid.
*
* See also: xge_hal_device_mtu_set()
*/
static inline xge_hal_status_e
{
return XGE_HAL_ERR_INVALID_MTU_SIZE;
}
return XGE_HAL_OK;
}
int one_shot);
int
#if defined(XGE_HAL_MSI)
/* Some function protoypes for MSI implementation. */
msg_val);
void
void
#endif
#if defined(XGE_HAL_MSI_X)
#endif
#define __HAL_STATIC_DEVICE
#define __HAL_INLINE_DEVICE
char *bar1);
#if defined (XGE_HAL_CONFIG_LRO)
void
#endif
#else /* XGE_FASTPATH_EXTERN */
#define __HAL_STATIC_DEVICE static
#define __HAL_INLINE_DEVICE inline
#include "xgehal-device-fp.c"
#endif /* XGE_FASTPATH_INLINE */
#endif /* XGE_HAL_DEVICE_H */