wpireg.h revision 626dff7950e2fd00077128f6e79bacf668f45cf7
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Copyright (c) 2006
* Damien Bergamini <damien.bergamini@free.fr>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _WPIREG_H_
#define _WPIREG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define WPI_TX_RING_COUNT 256
#define WPI_SVC_RING_COUNT 256
#define WPI_CMD_RING_COUNT 256
#define WPI_RX_RING_COUNT 64
/*
* Rings must be aligned on a four 4K-pages boundary.
* I had a hard time figuring this out.
*/
#define WPI_RING_DMA_ALIGN 0x4000
/*
*/
#define WPI_MAX_SCATTER 4
/*
* Control and status registers.
*/
#define WPI_HWCONFIG 0x000
#define WPI_INTR 0x008
#define WPI_MASK 0x00c
#define WPI_INTR_STATUS 0x010
#define WPI_GPIO_STATUS 0x018
#define WPI_RESET 0x020
#define WPI_GPIO_CTL 0x024
#define WPI_EEPROM_CTL 0x02c
#define WPI_EEPROM_STATUS 0x030
#define WPI_UCODE_CLR 0x05c
#define WPI_TEMPERATURE 0x060
#define WPI_CHICKEN 0x100
#define WPI_PLL_CTL 0x20c
#define WPI_FW_TARGET 0x410
#define WPI_WRITE_MEM_ADDR 0x444
#define WPI_READ_MEM_ADDR 0x448
#define WPI_WRITE_MEM_DATA 0x44c
#define WPI_READ_MEM_DATA 0x450
#define WPI_TX_WIDX 0x460
#define WPI_RX_CONFIG 0xc00
#define WPI_RX_BASE 0xc04
#define WPI_RX_WIDX 0xc20
#define WPI_RX_RIDX_PTR 0xc24
#define WPI_RX_CTL 0xcc0
#define WPI_RX_STATUS 0xcc4
#define WPI_TX_BASE_PTR 0xe80
#define WPI_MSG_CONFIG 0xe88
#define WPI_TX_STATUS 0xe90
/*
* NIC internal memory offsets.
*/
#define WPI_MEM_MODE 0x2e00
#define WPI_MEM_RA 0x2e04
#define WPI_MEM_TXCFG 0x2e10
#define WPI_MEM_MAGIC4 0x2e14
#define WPI_MEM_MAGIC5 0x2e20
#define WPI_MEM_BYPASS1 0x2e2c
#define WPI_MEM_BYPASS2 0x2e30
#define WPI_MEM_CLOCK1 0x3004
#define WPI_MEM_CLOCK2 0x3008
#define WPI_MEM_POWER 0x300c
#define WPI_MEM_PCIDEV 0x3010
#define WPI_MEM_UCODE_CTL 0x3400
#define WPI_MEM_UCODE_SRC 0x3404
#define WPI_MEM_UCODE_DST 0x3408
#define WPI_MEM_UCODE_SIZE 0x340c
#define WPI_MEM_UCODE_BASE 0x3800
/*
* possible flags for register WPI_HWCONFIG
*/
/*
* possible flags for registers WPI_READ_MEM_ADDR/WPI_WRITE_MEM_ADDR
*/
/*
* possible values for WPI_FW_TARGET
*/
#define WPI_FW_TEXT 0x00000000
#define WPI_FW_DATA 0x00800000
/*
* possible flags for WPI_GPIO_STATUS
*/
/*
* possible flags for register WPI_RESET
*/
#define WPI_NEVO_RESET (1 << 0)
/*
* possible flags for register WPI_GPIO_CTL
*/
#define WPI_GPIO_CLOCK (1 << 0)
#define WPI_GPIO_PWR_STATUS 0x07000000
/*
* possible flags for register WPI_CHICKEN
*/
/*
* possible flags for register WPI_PLL_CTL
*/
/*
* possible flags for register WPI_UCODE_CLR
*/
/*
* possible flags for WPI_RX_STATUS
*/
/*
* possible flags for register WPI_UC_CTL
*/
/*
* possible flags for register WPI_INTR_CSR
*/
#define WPI_ALIVE_INTR (1 << 0)
#define WPI_INTR_MASK \
/*
* possible flags for register WPI_TX_STATUS
*/
/*
* possible flags for register WPI_EEPROM_CTL
*/
#define WPI_EEPROM_READY (1 << 0)
/*
* possible flags for register WPI_EEPROM_STATUS
*/
#define WPI_EEPROM_VERSION 0x00000007
#define WPI_EEPROM_LOCKED 0x00000180
typedef struct wpi_shared {
} wpi_shared_t;
#define WPI_MAX_SEG_LEN 65520
typedef struct wpi_tx_desc {
struct {
} segs[WPI_MAX_SCATTER];
typedef struct wpi_tx_stat {
typedef struct wpi_rx_desc {
#define WPI_UC_READY 1
#define WPI_RX_DONE 27
#define WPI_TX_DONE 28
#define WPI_START_SCAN 130
#define WPI_START_RESULT 131
#define WPI_STOP_SCAN 132
#define WPI_STATE_CHANGED 161
typedef struct wpi_rx_stat {
#define WPI_STAT_MAXLEN 20
#define WPI_RSSI_OFFSET 95
typedef struct wpi_rx_head {
typedef struct wpi_rx_tail {
#define WPI_RX_NO_CRC_ERR (1 << 0)
typedef struct wpi_tx_cmd {
#define WPI_CMD_CONFIGURE 16
#define WPI_CMD_ASSOCIATE 17
#define WPI_CMD_SET_WME 19
#define WPI_CMD_TSF 20
#define WPI_CMD_ADD_NODE 24
#define WPI_CMD_TX_DATA 28
#define WPI_CMD_MRR_SETUP 71
#define WPI_CMD_SET_LED 72
#define WPI_CMD_SET_POWER_MODE 119
#define WPI_CMD_SCAN 128
#define WPI_CMD_SET_BEACON 145
#define WPI_CMD_BLUETOOTH 155
#define WPI_CMD_TXPOWER 176
} wpi_tx_cmd_t;
/*
* structure for WPI_CMD_CONFIGURE
*/
typedef struct wpi_config {
#define WPI_MODE_HOSTAP 1
#define WPI_MODE_STA 3
#define WPI_MODE_IBSS 4
#define WPI_MODE_MONITOR 6
#define WPI_CONFIG_ASSOCIATED 4
#define WPI_CONFIG_24GHZ (1 << 0)
#define WPI_FILTER_PROMISC (1 << 0)
} wpi_config_t;
/*
* structure for command WPI_CMD_ASSOCIATE
*/
typedef struct wpi_assoc {
} wpi_assoc_t;
/*
* structure for command WPI_CMD_SET_WME
*/
typedef struct wpi_wme_setup {
struct {
} ac[WME_NUM_AC];
/*
* structure for command WPI_CMD_TSF
*/
typedef struct wpi_cmd_tsf {
/*
* structure for WPI_CMD_ADD_NODE
*/
typedef struct wpi_node {
#define WPI_NODE_UPDATE (1 << 0)
#define WPI_ID_BSS 0
#define WPI_ID_BROADCAST 24
} wpi_node_t;
/*
* structure for command WPI_CMD_TX_DATA
*/
typedef struct wpi_cmd_data {
/*
* structure for command WPI_CMD_SET_BEACON
*/
typedef struct wpi_cmd_beacon {
struct ieee80211_frame wh;
/*
* structure for WPI_CMD_MRR_SETUP
*/
typedef struct wpi_mrr_setup {
#define WPI_MRR_CTL 0
#define WPI_MRR_DATA 1
struct {
#define WPI_OFDM6 0
#define WPI_OFDM54 7
#define WPI_CCK1 8
#define WPI_CCK11 11
/*
* structure for WPI_CMD_SET_LED
*/
typedef struct wpi_cmd_led {
#define WPI_LED_ACTIVITY 1
#define WPI_LED_LINK 2
/*
* structure for WPI_CMD_SET_POWER_MODE
*/
typedef struct wpi_power {
} wpi_power_t;
/*
* structure for command WPI_CMD_SCAN
*/
typedef struct wpi_scan_hdr {
/* followed by probe request body */
/* followed by nchan x wpi_scan_chan */
typedef struct wpi_scan_chan {
/*
* structure for WPI_CMD_BLUETOOTH
*/
typedef struct wpi_bluetooth {
/*
* structure for command WPI_CMD_TXPOWER
*/
typedef struct wpi_txpower {
/*
* firmware image header
*/
typedef struct wpi_firmware_hdr {
/*
* structure for WPI_UC_READY notification
*/
typedef struct wpi_ucode_info {
/*
* structure for WPI_START_SCAN notification
*/
typedef struct wpi_start_scan {
/*
* structure for WPI_STOP_SCAN notification
*/
typedef struct wpi_stop_scan {
#define WPI_EEPROM_MAC 0x015
#define WPI_EEPROM_REVISION 0x035
#define WPI_EEPROM_CAPABILITIES 0x045
#define WPI_EEPROM_TYPE 0x04a
#define WPI_EEPROM_PWR1 0x1ae
#define WPI_EEPROM_PWR2 0x1bc
while (--c > 0) { \
p++; \
s += 4; \
} \
}
#ifdef __cplusplus
}
#endif
#endif /* _WPIREG_H_ */