f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * sfe_util.c: general ethernet mac driver framework version 2.6
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * Copyright (c) 2002-2008 Masayuki Murayama. All rights reserved.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Redistribution and use in source and binary forms, with or without
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * modification, are permitted provided that the following conditions are met:
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * 1. Redistributions of source code must retain the above copyright notice,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * this list of conditions and the following disclaimer.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * 2. Redistributions in binary form must reproduce the above copyright notice,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * this list of conditions and the following disclaimer in the documentation
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * and/or other materials provided with the distribution.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * 3. Neither the name of the author nor the names of its contributors may be
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * used to endorse or promote products derived from this software without
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * specific prior written permission.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Use is subject to license terms.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * System Header files.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffextern char ident[];
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* Debugging support */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define DPRINTF(n, args) if (gem_debug > (n)) cmn_err args
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define IOC_LINESIZE 0x40 /* Is it right for amd64? */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Useful macros and typedefs
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define GET_NET16(p) ((((uint8_t *)(p))[0] << 8)| ((uint8_t *)(p))[1])
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define GET_ETHERTYPE(p) GET_NET16(((uint8_t *)(p)) + ETHERADDRL*2)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define GET_IPTYPEv4(p) (((uint8_t *)(p))[sizeof (struct ether_header) + 9])
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define GET_IPTYPEv6(p) (((uint8_t *)(p))[sizeof (struct ether_header) + 6])
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff &(dp)->tx_buf[SLOT((dp)->tx_slots_base + (sn), (dp)->gc.gc_tx_buf_size)]
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (((flag) & GEM_TXFLAG_VTAG) >> GEM_TXFLAG_VTAG_SHIFT)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ((dp)->mtu + sizeof (struct ether_header) + VTAG_SIZE + ETHERFCSL)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define WATCH_INTERVAL_FAST drv_usectohz(100*1000) /* 100mS */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Macros to distinct chip generation.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Private functions
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* local buffer management */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff__INLINE__ static void gem_append_rxbuf(struct gem_dev *, struct rxbuf *);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int gem_mac_stop(struct gem_dev *dp, uint_t flags);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void gem_mac_ioctl(struct gem_dev *dp, queue_t *wq, mblk_t *mp);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Misc runtime routines
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Ether CRC calculation according to 21143 data sheet
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff CRC32(crc, addr, ETHERADDRL, 0xffffffffU, crc32_table);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_prop_get_int(struct gem_dev *dp, char *prop_template, int def_val)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < 32; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (x & (1 << i)) {
23d366e350386ec109bfa9b2cf91225729a1a26bduboffgem_dump_packet(struct gem_dev *dp, char *title, mblk_t *mp,
23d366e350386ec109bfa9b2cf91225729a1a26bduboff if (rest == 0) {
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* ethernet address */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff "ether: %02x:%02x:%02x:%02x:%02x:%02x"
23d366e350386ec109bfa9b2cf91225729a1a26bduboff " -> %02x:%02x:%02x:%02x:%02x:%02x",
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* vlag tag and etherrtype */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* ethernet packet length */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* ip address */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff sprintf(bp, ", ip: %d.%d.%d.%d -> %d.%d.%d.%d proto:%d iplen:%d",
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* cksum for psuedo header */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* tcp or udp protocol header */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff cmn_err(CE_CONT, "!%s: %s: %s", dp->name, title, msg);
23d366e350386ec109bfa9b2cf91225729a1a26bduboff#endif /* GEM_DEBUG_VLAN */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff#endif /* GEM_DEBUG_LEVEL */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * IO cache flush
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_rx_desc_dma_sync(struct gem_dev *dp, int head, int nslot, int how)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int rx_desc_unit_shift = dp->gc.gc_rx_desc_unit_shift;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* sync active descriptors */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* no rx descriptor ring */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((m = nslot - n) > 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_tx_desc_dma_sync(struct gem_dev *dp, int head, int nslot, int how)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int tx_desc_unit_shift = dp->gc.gc_tx_desc_unit_shift;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* sync active descriptors */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* no tx descriptor ring */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((m = nslot - n) > 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_rx_start_default(struct gem_dev *dp, int head, int nslot)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Buffer management
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_dump_txbuf(struct gem_dev *dp, int level, const char *title)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: tx_active: %d[%d] %d[%d] (+%d), "
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "tx_softq: %d[%d] %d[%d] (+%d), "
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "tx_free: %d[%d] %d[%d] (+%d), "
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "tx_desc: %d[%d] %d[%d] (+%d), "
23d366e350386ec109bfa9b2cf91225729a1a26bduboff "intr: %d[%d] (+%d), ",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * gem_get_rxbuf: supply a receive buffer which have been mapped into
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * DMA space.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(3, (CE_CONT, "!gem_get_rxbuf: called freecnt:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Get rx buffer management structure
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* get one from the recycle list */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Allocate a rx buffer management structure
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff rbp = kmem_zalloc(sizeof (*rbp), cansleep ? KM_SLEEP : KM_NOSLEEP);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* no memory */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Prepare a back pointer to the device structure which will be
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * refered on freeing the buffer later.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* allocate a dma handle for rx data buffer */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: ddi_dma_alloc_handle:1 failed, err=%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* allocate a bounce buffer for rx */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * if the nic requires a header at the top of receive buffers,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * it may access the rx buffer randomly.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: ddi_dma_mem_alloc: failed, err=%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Mapin the bounce buffer into the DMA space */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: ddi_dma_addr_bind_handle: failed, err=%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * we failed to allocate a dma resource
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * for the rx bounce buffer.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* correct the rest of the DMA mapping */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ddi_dma_nextcookie(rbp->rxb_dh, &rbp->rxb_dmacookie[i]);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Now we successfully prepared an rx buffer */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * memory resource management
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff req_size = dp->rx_desc_size + dp->tx_desc_size + dp->gc.gc_io_area_size;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Alloc RX/TX descriptors and a io area.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: ddi_dma_alloc_handle failed: %d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: ddi_dma_mem_alloc failed: "
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "ret %d, request size: %d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((err = ddi_dma_addr_bind_handle(dp->desc_dma_handle,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: ddi_dma_addr_bind_handle failed: %d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* set base of rx descriptor ring */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* set base of tx descriptor ring */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->tx_ring_dma = dp->rx_ring_dma + dp->rx_desc_size;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* set base of io area */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->io_area_dma = dp->tx_ring_dma + dp->tx_desc_size;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Prepare DMA resources for tx packets
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Special dma attribute for tx bounce buffers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Size for tx bounce buffers must be max tx packet size. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup bounce buffers for tx packets */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s ddi_dma_alloc_handle for bounce buffer failed:"
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff " err=%d, i=%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: ddi_dma_mem_alloc for bounce buffer failed"
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "ret %d, request size %d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: ddi_dma_addr_bind_handle for bounce buffer failed: %d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (0);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff while (i-- > 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Free TX/RX descriptors and tx padding buffer */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Free dma handles for Tx */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = dp->gc.gc_tx_buf_size, tbp = dp->tx_buf; i--; tbp++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Free bounce buffer associated to each txbuf */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Free rx buffer */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release DMA mapping */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* free dma handles for rx bbuf */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* it has dma mapping always */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* free the associated bounce buffer and dma handle */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* free the associated dma handle */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* free the base memory of rx buffer management */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Rx/Tx descriptor slot management
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Initialize an empty rx ring.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s ring_size:%d, buf_max:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* make a physical chain of rx descriptors */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < rx_ring_size; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gem_rx_desc_dma_sync(dp, 0, rx_ring_size, DDI_DMA_SYNC_FORDEV);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Prepare rx buffers and put them into the rx buffer/descriptor ring.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Now we have no active buffers in rx ring */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff nrbuf = min(dp->gc.gc_rx_ring_size, dp->gc.gc_rx_buf_max);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < nrbuf; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Reclaim active rx buffers in rx buffer ring.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * clean up HW descriptors
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < rx_ring_size; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gem_rx_desc_dma_sync(dp, 0, rx_ring_size, DDI_DMA_SYNC_FORDEV);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Reclaim allocated rx buffers
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* remove the first one from rx buffer list */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* recycle the rxbuf */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: %d buffers freeed, total: %d free",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Initialize an empty transmit buffer/descriptor ring
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, "!%s: %s: ring_size:%d, buf_size:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* initialize active list and free list */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SLOT(dp->tx_slots_base + dp->tx_softq_head, tx_buf_size);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < tx_ring_size; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gem_tx_desc_dma_sync(dp, 0, tx_ring_size, DDI_DMA_SYNC_FORDEV);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * reclaim active tx buffers and reset positions in tx rings.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * clean up all HW descriptors
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < tx_ring_size; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gem_tx_desc_dma_sync(dp, 0, tx_ring_size, DDI_DMA_SYNC_FORDEV);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* dequeue all active and loaded buffers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* ensure no dma resources for tx are not in use now */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "%s: %s: sn:%d[%d] mp:%p nfrags:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "gem_clean_tx_buf: tbp->txb_mp != NULL");
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* recycle buffers, now no active tx buffers in the ring */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(dp->tx_free_tail == dp->tx_free_head + dp->gc.gc_tx_buf_limit);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* fix positions in tx buffer rings */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Reclaim transmitted buffers from tx buffer/descriptor ring.
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* make non-zero timestamp */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "testing active_head:%d[%d], active_tail:%d[%d]",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* check tx buffer management consistency */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* EMPTY */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* sync all active HW descriptors */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff if (ndescs == 0) {
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* skip errored descriptors */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (txstat == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* not transmitted yet */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff if (!dp->tx_blocked && (tbp->txb_flag & GEM_TXFLAG_INTR)) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* free transmitted descriptors */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* we have reclaimed one or more tx buffers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* If we passed the next interrupt position, update it */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* free dma mapping resources associated with transmitted tx buffers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, "%s: freeing head:%d[%d], tail:%d[%d]",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (sn = head; sn != tail; sn++, tbp = tbp->txb_next) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* recycle the tx buffers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* we are the last thread who can update free tail */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* check all resouces have been deallocated */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff while (sn != dp->tx_active_head + dp->gc.gc_tx_buf_limit) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* in use */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(dp->tx_active_head + dp->gc.gc_tx_buf_limit == sn);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* someone may be waiting for me. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "free_head:%d free_tail:%d(+%d) added:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#pragma inline(gem_reclaim_txbuf)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Make tx descriptors in out-of-order manner
23d366e350386ec109bfa9b2cf91225729a1a26bduboff seqnum_t start_slot, seqnum_t end_slot, uint64_t flags)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* write a tx descriptor */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_setup_txbuf_copy(struct gem_dev *dp, mblk_t *mp, struct txbuf *tbp)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* we use bounce buffer for the packet */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* need to increase min packet size */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* copy the rest */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((len = (long)tp->b_wptr - (long)tp->b_rptr) > 0) {
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * Extend the packet to minimum packet size explicitly.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * For software vlan packets, we shouldn't use tx autopad
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * function because nics may not be aware of vlan.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * we must keep 46 octet of payload even if we use vlan.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (void) ddi_dma_sync(tbp->txb_bdh, (off_t)0, off, DDI_DMA_SYNC_FORDEV);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff tbp->txb_dmacookie[0].dmac_laddress = tbp->txb_buf_dma;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: copy: addr:0x%llx len:0x%x, vtag:0x%04x, min_pkt:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* save misc info */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* update HW descriptors from soft queue */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "%s: %s: called, softq %d %d[+%d], desc %d %d[+%d]",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(tbp_tail->txb_desc + tbp_tail->txb_ndescs == dp->tx_desc_tail);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff tbp_tail->txb_desc + tbp_tail->txb_ndescs - tbp_head->txb_desc);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* advance softq head and active tail */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#pragma inline(gem_tx_start_unit)
23d366e350386ec109bfa9b2cf91225729a1a26bduboff#define PKT_MIN_SIZE (sizeof (struct ether_header) + 10 + VTAG_SIZE)
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * check ether packet type and ip protocol
23d366e350386ec109bfa9b2cf91225729a1a26bduboffgem_txbuf_options(struct gem_dev *dp, mblk_t *mp, uint8_t *bp)
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * prepare continuous header of the packet for protocol analysis
23d366e350386ec109bfa9b2cf91225729a1a26bduboff if ((long)mp->b_wptr - (long)mp->b_rptr < PKT_MIN_SIZE) {
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* we use work buffer to copy mblk */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* we can use mblk without copy */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* process vlan tag for GLD v3 */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * gem_send_common is an exported function because hw depend routines may
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * use it for sending control frames like setup frames for 2114x chipset.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_send_common(struct gem_dev *dp, mblk_t *mp_head, uint32_t flags)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Aquire resources
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (!dp->mac_active && (flags & GEM_SEND_CTRL) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* don't send data packets while mac isn't active */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* XXX - should we discard packets? */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* allocate free slots */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: called, free_head:%d free_tail:%d(+%d) req:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (avail == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* no resources; short cut */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, "!%s: no resources", __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff load_flags = ((dp->tx_busy++) == 0) ? GEM_TXFLAG_HEAD : 0;
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* update last interrupt position if tx buffers exhaust. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* remove one from the mblk list */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* statistics for non-unicast packets */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (bcmp(bp, gem_etherbroadcastaddr.ether_addr_octet,
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* save misc info */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff txflag |= (flags & GEM_SEND_CTRL) << GEM_TXFLAG_PRIVATE_SHIFT;
23d366e350386ec109bfa9b2cf91225729a1a26bduboff txflag |= gem_txbuf_options(dp, mp, (uint8_t *)tbp->txb_buf);
23d366e350386ec109bfa9b2cf91225729a1a26bduboff (void) gem_tx_load_descs_oo(dp, head, head + nmblk, load_flags);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Append the tbp at the tail of the active tx buffer list */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* extend the tail of softq, as new packets have been ready. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (!dp->mac_active && (flags & GEM_SEND_CTRL) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * The device status has changed while we are
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * preparing tx buf.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * As we are the last one that make tx non-busy.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * wake up someone who may wait for us.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ========================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * error detection and restart routines
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ========================================================== */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* should we return GEM_FAILURE ? */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * We should avoid calling any routines except xxx_chip_reset
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * when we are resuming the system.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop rx gracefully */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* reset the chip. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup media mode if the link have been up */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup mac address and enable rx filter */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * XXX - a panic happened because of linkdown.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * We must check mii_state here, because the link can be down just
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * before the restart event happen. If the link is down now,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * gem_mac_start() will be called from gem_mii_link_check() when
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * the link become up later.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* restart the nic */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (!dp->mac_active || dp->mii_state != MII_STATE_LINKUP) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* reclaim transmitted buffers to check the trasmitter hangs or not. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* tx error happened, reset transmitter in the chip */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* check if the transmitter thread is stuck */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* no tx buffer is loaded to the nic */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff now - dp->tx_blocked > dp->gc.gc_tx_timeout_interval) {
23d366e350386ec109bfa9b2cf91225729a1a26bduboff "gem_tx_timeout: tx blocked");
23d366e350386ec109bfa9b2cf91225729a1a26bduboff gem_dump_txbuf(dp, CE_WARN, "gem_tx_timeout: tx timeout");
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* discard untransmitted packet and restart tx. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* restart the downstream if needed */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff "!%s: blocked:%d active_head:%d active_tail:%d desc_intr:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->tx_active_head, dp->tx_active_tail, dp->tx_desc_intr));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ================================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Interrupt handler
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ================================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_append_rxbuf(struct gem_dev *dp, struct rxbuf *rbp_head)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(3, (CE_CONT, "!%s: %s: slot_head:%d, slot_tail:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__, dp->rx_active_head, dp->rx_active_tail));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Add new buffers into active rx buffer list
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* need to notify the tail for the lower layer */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#pragma inline(gem_append_rxbuf)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_get_packet_default(struct gem_dev *dp, struct rxbuf *rbp, size_t len)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* allocate a new mblk */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * flush the range of the entire buffer to invalidate
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * all of corresponding dirty entries in iocache.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff int ethermax = dp->mtu + sizeof (struct ether_header);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(3, (CE_CONT, "!%s: gem_receive: rx_buf_head:%p",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (cnt == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* not received yet */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Remove the head of the rx buffer list */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(3, (CE_CONT, "!%s: %s: rxstat:0x%llx, len:0x%x",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Copy the packet
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((mp = dp->gc.gc_get_packet(dp, rbp, len)) == NULL) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* no memory, discard the packet */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Process VLAN tag
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* check packet size */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* append received packet to temporaly rx buffer list */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* append new one to temporal new buffer list */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* advance rx_active_head */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* terminate the working list */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * fillfull rx list with new buffers
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* save current tail */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* call hw depend start routine if we have. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SLOT(head, rx_ring_size), dp->rx_active_tail - head);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * send up received packets
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gem_rx_pkts[min(cnt, sizeof (gem_rx_pkts)/sizeof (uint_t)-1)]++;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, "!%s: gem_tx_done: tx_desc: %d %d",
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* XXX - we must not have any packets in soft queue */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * If we won't have chance to get more free tx buffers, and blocked,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * it is worth to reschedule the downstream i.e. tx side.
23d366e350386ec109bfa9b2cf91225729a1a26bduboff if (dp->tx_blocked && dp->tx_desc_intr == dp->tx_desc_head) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * As no further tx-done interrupts are scheduled, this
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * is the last chance to kick tx side, which may be
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * blocked now, otherwise the tx side never works again.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(4, (CE_CONT, "!%s: calling mac_tx_update", dp->name));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* schedule next call of tu_intr_watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff timeout((void (*)(void *))gem_intr_watcher, (void *)dp, 1);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ======================================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * MII support routines
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ======================================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* choose media mode */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((dp->mii_status & MII_STATUS_MFPRMBLSUPR) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_mii_write(struct gem_dev *dp, uint_t reg, uint16_t val)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((dp->mii_status & MII_STATUS_MFPRMBLSUPR) == 0) {
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore 0, /* none */
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore MII_ABILITY_PAUSE | MII_ABILITY_ASMPAUSE, /* rx-symmetric */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Configure bits in advertisement register
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* it's funny */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "!%s: wrong ability bits: mii_status:%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Do not change the rest of the ability bits in the advert reg */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = gem_mii_read(dp, MII_AN_ADVERT) & ~MII_ABILITY_ALL;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: 100T4:%d 100F:%d 100H:%d 10F:%d 10H:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* set flow control capability */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: setting MII_AN_ADVERT reg:%b, mii_mode:%d, fc:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__, val, MII_ABILITY_BITS, dp->gc.gc_mii_mode,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * 1000Base-T GMII support
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* enable manual configuration */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: setting MII_1000TC reg:%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define GEM_LINKUP(dp) mac_link_update((dp)->mh, LINK_STATE_UP)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff#define GEM_LINKDOWN(dp) mac_link_update((dp)->mh, LINK_STATE_DOWN)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic uint8_t gem_fc_result[4 /* my cap */ ][4 /* lp cap */] = {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* none symm tx rx/symm */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "with symmetric",
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * For NWAM, don't show linkdown state right
23d366e350386ec109bfa9b2cf91225729a1a26bduboff * after the system boots
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* link up timeout */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* power-up, DP83840 requires 32 sync bits */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* don't read phy registers in resetting */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Timer expired, ensure reset bit is not set */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* some phys need sync bits after reset */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: time:%ld resetting phy not complete."
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff " mii_control:0x%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* ensure neither isolated nor pwrdown nor auto-nego mode */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* XXX -- this operation is required for NS DP83840A. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* As resetting PHY has completed, configure PHY registers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* we failed to configure PHY. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* mii_config may disable autonegatiation */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* skip auto-negotiation phase */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Issue auto-negotiation command */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Autonegotiation is in progress
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * wait for a while, typically autonegotiation
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * completes in 2.3 - 2.5 sec.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* read PHY status */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: called: mii_state:%d MII_STATUS reg:%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * The link parnert told me something wrong happend.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * What do we do ?
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: auto-negotiation failed: remote fault",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Auto-negotiation was timed out,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * try again w/o resetting phy.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: auto-negotiation failed: timeout",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Auto-negotiation is in progress. Wait.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Auto-negotiation have completed.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Assume linkdown and fall through.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: auto-negotiation completed, MII_STATUS:%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Auto-negotiation have done. Now we can set up media.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* wait for a while */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * set up the result of auto negotiation
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Read registers required to determin current
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * duplex mode and media speed.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * As the link watcher context has been suspended,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * 'status' is invalid. We must status register here
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* some phys don't have exp register */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: auto-negotiation done, advert:%b, lpable:%b, exp:%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "! MII_1000TC:%b, MII_1000TS:%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: but the link partnar doesn't seem"
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff " to have auto-negotiation capability."
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff " please check the link configuration.",
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore * it should be result of parallel detection, which
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * cannot detect duplex mode.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * we prefer full duplex mode for 100Mbps
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * connection, if we can.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * as the link partnar isn't auto-negotiatable, use
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * fixed mode temporally.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff } else if (lpable == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * configure current link mode according to AN priority.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* 1000BaseT & full duplex */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* 1000BaseT & half duplex */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* 100BaseTx & full duplex */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* 100BaseT4 & full duplex */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* 100BaseTx & half duplex */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* 10BaseT & full duplex */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* 10BaseT & half duplex */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * It seems that the link partnar doesn't have
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * auto-negotiation capability and our PHY
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * could not report the correct current mode.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * We guess current mode by mii_control register.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* select 100m full or 10m half */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: auto-negotiation done but "
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "common ability not found.\n"
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "PHY state: control:%b advert:%b lpable:%b\n"
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "guessing %d Mbps %s duplex mode",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* FALLTHROUGH */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, "!%s: setup midia mode done", dp->name));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* use short interval */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * write specified mode to phy.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* FALLTHROUGH */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* for GEM_SPD_10, do nothing */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* notify the result of auto-negotiation to mac */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* for built-in sis900 */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* XXX - this code should be removed. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Link going up
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: link up detected: mii_stat:%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * MII_CONTROL_100MB and MII_CONTROL_FDUPLEX are
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * ignored when MII_CONTROL_ANE is set.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: Link up: %d Mbps %s duplex %s flow control",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mii_interval = dp->gc.gc_mii_link_watch_interval;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* XXX - we need other timer to watch statictics */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * link down timer expired.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * need to restart auto-negotiation.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* don't change mii_state */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Link going down
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: link down detected: mii_stat:%b",
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* drain tx */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* need to restart auto-negotiation */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* for built-in sis900 */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mii_interval = dp->gc.gc_mii_link_watch_interval;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* don't change mii_state */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mii_interval = dp->gc.gc_mii_link_watch_interval;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Actions on the end of state routine */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* PHY will restart autonego automatically */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* NOTREACHED */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, "!%s: auto-negotiation started", dp->name);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* start/restart auto nego */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ~(MII_CONTROL_ISOLATE | MII_CONTROL_PWRDN | MII_CONTROL_RESET);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* we must schedule next mii_watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* notify new mii link state */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* first linkup timeout */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, "%s: link watcher stopped", dp->name);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* kick potentially stopped downstream */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(3, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* ensure to send sync bits */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Try default phy first */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: failed to probe default internal and/or non-MII PHY",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: failed to probe default MII PHY at %d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Try all possible address */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (phy = dp->gc.gc_mii_addr_min; phy < 32; phy++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (phy = dp->gc.gc_mii_addr_min; phy < 32; phy++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->mii_phy_id = (gem_mii_read(dp, MII_PHYIDH) << 16) |
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, "!%s: using internal/non-MII PHY(0x%08x)",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, "!%s: MII PHY (0x%08x) found at %d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_CONT, "!%s: PHY control:%b, status:%b, advert:%b, lpar:%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* check if the phy can advertize pause abilities */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(3, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* make a first call of check link */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(3, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Ensure timer routine stopped */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(3, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Get ethernet address from .conf file
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < 2; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff d = c - '0';
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff v = (v << 4) | d;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (c != ':') {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (ored == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < ETHERADDRL; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: read mac addr: trying .conf: syntax err %s",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * internal start/stop interface
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * gem_mac_init: cold start
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* reset transmitter state */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * gem_mac_start: warm start
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* enable tx and rx */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* setup rx buffers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* load untranmitted packets to the nic */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* issue preloaded tx buffers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called, rx_buf_free:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Block transmits
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Wait for all tx buffers sent.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff 2 * (8 * MAXPKTBUF(dp) / gem_speed_value[dp->speed]) *
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "%s: %s: max drain time: %d uS",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* timeout */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: the nic have drained in %d uS, real %d mS",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Now we can stop the nic safely.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_NOTE, "%s: %s: resetting the chip to stop it",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Clear all rx buffers
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Update final statistics
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Clear all pended tx packets
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* restore active tx buffers */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_add_multicast(struct gem_dev *dp, const uint8_t *ep)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* append the new address at the end of the mclist */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* multicast address list overflow */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* tell new multicast list to the hardware */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_remove_multicast(struct gem_dev *dp, const uint8_t *ep)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < cnt; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* shrink the mclist by copying forward */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* multicast address list overflow */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* In gem v2, don't hold xmitlock on calling set_rx_filter */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * ND interface
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_param_get(queue_t *q, mblk_t *mp, caddr_t arg, cred_t *credp)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct gem_dev *dp = ((struct gem_nd_arg *)(void *)arg)->dp;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_status & MII_STATUS_CANAUTONEG);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = (dp->mii_xstatus & MII_XSTATUS_1000BASET_FD) ||
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_status & MII_STATUS_100_BASE_T4);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_status & MII_STATUS_100_BASEX_FD);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_status & MII_STATUS_100_BASEX);
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore val = BOOLEAN(dp->mii_lpable & MII_ABILITY_ASMPAUSE);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_stat1000 & MII_1000TS_LP_FULL);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_stat1000 & MII_1000TS_LP_HALF);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_100BASE_T4);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_100BASE_TX_FD);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_100BASE_TX);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_10BASE_T_FD);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_10BASE_T);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = (dp->flow_control == FLOW_CONTROL_SYMMETRIC) ||
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = (dp->flow_control == FLOW_CONTROL_SYMMETRIC) ||
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "%s: unimplemented ndd control (%d)",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (0);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_param_set(queue_t *q, mblk_t *mp, char *value, caddr_t arg, cred_t *credp)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct gem_dev *dp = ((struct gem_nd_arg *)(void *)arg)->dp;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (val && (dp->mii_status & MII_STATUS_CANAUTONEG) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (MII_XSTATUS_1000BASET | MII_XSTATUS_1000BASEX)) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (val && (dp->mii_status & MII_STATUS_100_BASE_T4) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (val && (dp->mii_status & MII_STATUS_100_BASEX_FD) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (val && (dp->mii_status & MII_STATUS_100_BASEX) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (val && (dp->mii_status & MII_STATUS_10_FD) == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* sync with PHY */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (dp->gc.gc_mii_hw_link_detection && dp->link_watcher_id == 0) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* XXX - Can we ignore the return code ? */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (0);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_nd_load(struct gem_dev *dp, char *name, ndgetf_t gf, ndsetf_t sf, int item)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff arg = &((struct gem_nd_arg *)(void *)dp->nd_arg_p)[item];
23d366e350386ec109bfa9b2cf91225729a1a26bduboff (void) nd_load(&dp->nd_data_p, name, gf, sf, (caddr_t)arg);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called, mii_status:0x%b",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->name, __func__, dp->mii_status, MII_STATUS_BITS));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff kmem_zalloc(sizeof (struct gem_nd_arg) * PARAM_COUNT, KM_SLEEP);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Our advertised capabilities */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (MII_XSTATUS_1000BASEX_FD | MII_XSTATUS_1000BASET_FD)),
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff SETFUNC((dp->mii_status & MII_STATUS_100_BASEX_FD) &&
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Partner's advertised capabilities */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Current operating modes */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_nd_ioctl(struct gem_dev *dp, queue_t *wq, mblk_t *mp, struct iocblk *iocp)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "%s: invalid cmd 0x%x", dp->name, iocp->ioc_cmd);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff kmem_free(dp->nd_arg_p, sizeof (struct gem_nd_arg) * PARAM_COUNT);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_mac_ioctl(struct gem_dev *dp, queue_t *wq, mblk_t *mp)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Validate the command before bothering with the mutex ...
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "%s: %s cmd:0x%x", dp->name, __func__, cmd));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Finally, decide how to reply
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Error, reply with a NAK and EINVAL or the specified error
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * OK, reply already sent
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * OK, reply with an ACK
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * OK, send prepared reply as ACK or NAK
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (MII_XSTATUS_1000BASET_FD | MII_XSTATUS_1000BASET)) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (MII_XSTATUS_1000BASEX_FD | MII_XSTATUS_1000BASEX)) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * GLDv3 interface
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ============================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int gem_m_start(void *);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic void gem_m_stop(void *);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic int gem_m_multicst(void *, boolean_t, const uint8_t *);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffstatic boolean_t gem_m_getcapab(void *, mac_capab_t, void *);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng#define GEM_M_CALLBACK_FLAGS (MC_IOCTL | MC_GETCAPAB)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* reset rx filter state */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup media mode if the link have been up */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup initial rx filter */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->timeout_id = timeout((void (*)(void *))gem_tx_timeout,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (0);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop rx */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop tx timeout watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* make the nic state inactive */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* we need deassert mac_active due to block interrupt handler */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* block interrupts */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_m_multicst(void *arg, boolean_t add, const uint8_t *ep)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = (dp->mii_xstatus & MII_XSTATUS_1000BASET_FD) ||
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_status & MII_STATUS_100_BASEX_FD);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_status & MII_STATUS_100_BASEX);
23d366e350386ec109bfa9b2cf91225729a1a26bduboff val = BOOLEAN(dp->mii_status & MII_STATUS_CANAUTONEG);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_stat1000 & MII_1000TS_LP_FULL);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_stat1000 & MII_1000TS_LP_HALF);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_100BASE_TX_FD);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_100BASE_TX);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_10BASE_T_FD);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_10BASE_T);
bdb9230ac765cb7af3fc1f4119caf2c5720dceb3Garrett D'Amore val = BOOLEAN(dp->mii_lpable & MII_ABILITY_ASMPAUSE);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_AN_ADVERT_REMFAULT);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_status & MII_STATUS_100_BASE_T4);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = BOOLEAN(dp->mii_lpable & MII_ABILITY_100BASE_T4);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "%s: unrecognized parameter value = %d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff return (0);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff bcopy(mac, dp->cur_addr.ether_addr_octet, ETHERADDRL);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * gem_m_tx is used only for sending data packets into ethernet wire.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Some nics hate to send packets when the link is down. */
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng/* ARGSUSED */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_m_getcapab(void *arg, mac_capab_t cap, void *cap_data)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_gld3_init(struct gem_dev *dp, mac_register_t *macp)
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ======================================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff/* ======================================================================== */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(1, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Get media mode infomation from .conf file
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_autoneg = gem_prop_get_int(dp, "adv_autoneg_cap", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_1000fdx = gem_prop_get_int(dp, "adv_1000fdx_cap", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_1000hdx = gem_prop_get_int(dp, "adv_1000hdx_cap", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_100t4 = gem_prop_get_int(dp, "adv_100T4_cap", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_100fdx = gem_prop_get_int(dp, "adv_100fdx_cap", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_100hdx = gem_prop_get_int(dp, "adv_100hdx_cap", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_10fdx = gem_prop_get_int(dp, "adv_10fdx_cap", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_10hdx = gem_prop_get_int(dp, "adv_10hdx_cap", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->full_duplex = gem_prop_get_int(dp, "full-duplex", 1) != 0;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: property %s: illegal value:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff val = gem_prop_get_int(dp, "flow-control", dp->gc.gc_flow_control);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (val > FLOW_CONTROL_RX_PAUSE || val < FLOW_CONTROL_NONE) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: property %s: illegal value:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_NOTE, "!%s: polling mode enabled", dp->name);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->txthr = gem_prop_get_int(dp, "txthr", dp->txthr);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->rxthr = gem_prop_get_int(dp, "rxthr", dp->rxthr);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->txmaxdma = gem_prop_get_int(dp, "txmaxdma", dp->txmaxdma);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->rxmaxdma = gem_prop_get_int(dp, "rxmaxdma", dp->rxmaxdma);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Gem kstat support
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (sizeof (struct gem_dev) + \
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff struct gem_conf *gc, void *base, ddi_acc_handle_t *regs_handlep,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, "!gem%d: gem_do_attach: called cmd:ATTACH",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Allocate soft data structure
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* ddi_set_driver_private(dip, dp); */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* link to private area */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (void) sprintf(dp->name, gc->gc_name, nports * unit + port);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Get iblock cookie
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if (ddi_get_iblock_cookie(dip, 0, &c) != DDI_SUCCESS) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: gem_do_attach: ddi_get_iblock_cookie: failed",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Initialize mutex's for this device.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mutex_init(&dp->intrlock, NULL, MUTEX_DRIVER, (void *)c);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff mutex_init(&dp->xmitlock, NULL, MUTEX_DRIVER, (void *)c);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * configure gem parameter
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* patch for simplify dma resource management */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* fix copy threadsholds */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gc->gc_tx_copy_thresh = max(ETHERMIN, gc->gc_tx_copy_thresh);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gc->gc_rx_copy_thresh = max(ETHERMIN, gc->gc_rx_copy_thresh);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* fix rx buffer boundary for iocache line size */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(gc->gc_dma_attr_txbuf.dma_attr_align-1 == gc->gc_tx_buf_align);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ASSERT(gc->gc_dma_attr_rxbuf.dma_attr_align-1 == gc->gc_rx_buf_align);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gc->gc_rx_buf_align = max(gc->gc_rx_buf_align, IOC_LINESIZE - 1);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff gc->gc_dma_attr_rxbuf.dma_attr_align = gc->gc_rx_buf_align + 1;
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* fix descriptor boundary for cache line size */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff max(gc->gc_dma_attr_desc.dma_attr_align, IOC_LINESIZE);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* patch get_packet method */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* patch get_rx_start method */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* calculate descriptor area */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ROUNDUP(gc->gc_rx_ring_size << gc->gc_rx_desc_unit_shift,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff ROUNDUP(gc->gc_tx_ring_size << gc->gc_tx_desc_unit_shift,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* link tx buffers */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff dp->poll_pkt_delay = 8; /* typical coalease for rx packets */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* performance tuning parameters */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Get media mode information from .conf file
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* rx_buf_len is required buffer length without padding for alignment */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->rx_buf_len = MAXPKTBUF(dp) + dp->gc.gc_rx_header_len;
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Reset the chip
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * HW dependant paremeter initialization
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* allocate tx and rx resources */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: at 0x%x, %02x:%02x:%02x:%02x:%02x:%02x",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* copy mac address */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Probe MII phy (scan phy) */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* mask unsupported abilities */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff dp->anadv_autoneg &= BOOLEAN(dp->mii_status & MII_STATUS_CANAUTONEG);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff (MII_XSTATUS_1000BASEX_FD | MII_XSTATUS_1000BASET_FD));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_100t4 &= BOOLEAN(dp->mii_status & MII_STATUS_100_BASE_T4);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_100fdx &= BOOLEAN(dp->mii_status & MII_STATUS_100_BASEX_FD);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_100hdx &= BOOLEAN(dp->mii_status & MII_STATUS_100_BASEX);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_10fdx &= BOOLEAN(dp->mii_status & MII_STATUS_10_FD);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->anadv_10hdx &= BOOLEAN(dp->mii_status & MII_STATUS_10);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* initialize MII phy if required */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * initialize kstats including mii statistics
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Add interrupt to system.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "!%s: mac_register failed, error:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff cmn_err(CE_WARN, "!%s: ddi_add_intr failed", dp->name);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Dont use interrupt.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * schedule first call of gem_intr_watcher
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* link this device to dev_info */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->next = (struct gem_dev *)ddi_get_driver_private(dip);
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* reset mii phy and start mii link watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, "!gem_do_attach: return: success"));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release NDD resources */
23d366e350386ec109bfa9b2cf91225729a1a26bduboff /* unregister with gld v3 */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* ensure any rx buffers are not used */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* resource is busy */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s: %s: rxbuf is busy: allocated:%d, freecnt:%d",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* NOT REACHED */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop mii link watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* unregister interrupt handler */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop interrupt watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release NDD resources */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release buffers, descriptors and dma resources */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release locks and condition variables */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release basic memory resources */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff kmem_free((caddr_t)dp, GEM_LOCAL_DATA_SIZE(&dp->gc));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release common private memory for the nic */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* release register mapping resources */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(2, (CE_CONT, "!%s%d: gem_do_detach: return: success",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * stop the device
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop mii link watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop interrupt watcher for no-intr mode */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* stop tx timeout watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* make the nic state inactive */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* no further register access */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* XXX - power down the nic */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * restart the device
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff DPRINTF(0, (CE_CONT, "!%s: %s: called", dp->name, __func__));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Bring up the nic after power up
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* gem_xxx.c layer to setup power management state. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* reset the chip, because we are just after power up. */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* initialize mii phy because we are just after power up */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * schedule first call of gem_intr_watcher
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * instead of interrupts.
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* restart mii link watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* restart mac */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* setup media mode if the link have been up */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* enable mac address and rx filter */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* restart tx timeout watcher */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff dp->timeout_id = timeout((void (*)(void *))gem_tx_timeout,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* now the nic is fully functional */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * misc routines for PCI
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* search power management capablities */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pci_cap_ptr = pci_config_get8(conf_handle, PCI_CONF_CAP_PTR);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* read pci capability header */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pci_cap = pci_config_get32(conf_handle, pci_cap_ptr);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* found */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* get next_ptr */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* search power management capablities */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pci_cap_ptr = gem_search_pci_cap(dip, conf_handle, PCI_CAP_ID_PM);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s%d: doesn't have pci power management capability",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* read power management capabilities */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pmcsr = pci_config_get32(conf_handle, pci_cap_ptr + PCI_PMCSR);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s%d: pmc found at 0x%x: pmcsr: 0x%08x",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * Is the resuested power mode supported?
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* not yet */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * move to new mode
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff pci_config_put32(conf_handle, pci_cap_ptr + PCI_PMCSR, pmcsr);
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * select suitable register for by specified address space or register
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff * offset in PCI config space
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboffgem_pci_regs_map_setup(dev_info_t *dip, uint32_t which, uint32_t mask,
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* Search IO-range or memory-range to be mapped */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s%d: failed to get reg property (ret:%d)",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff n = len / (sizeof (struct pci_phys_spec) / sizeof (int));
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < n; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s%d: regs[%d]: %08x.%08x.%08x.%08x.%08x",
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff for (i = 0; i < n; i++) {
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff /* it's the requested space */
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff if ((ret = ddi_regs_map_setup(dip, i, basep, 0, 0, attrp, hp))
f8919bdadda3ebb97bd55cc14a16e0271ed57615duboff "!%s%d: ddi_regs_map_setup failed (ret:%d)",