sa2400reg.h revision a72f7ea693101cc48bafbb4db6bb437d828011c4
/*
* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Copyright (c) 2005 David Young. All rights reserved.
*
* This code was written by David Young.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
* Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#ifndef _SA2400REG_H_
#define _SA2400REG_H_
/*
* Serial bus format for Philips SA2400 Single-chip Transceiver.
*/
/*
* Registers for Philips SA2400 Single-chip Transceiver.
*/
#define SA2400_SYNA 0 /* Synthesizer Register A */
/*
* fractional modulus select,
* 0: /8 (default)
* 1: /5
*/
/*
* fractional increment value,
* 0 to 7, default 4
*/
/*
* main divider division ratio,
* 512 to 65535, default 615
*/
/*
* reference divider ratio,
* 4 to 1023, default 11
*/
/*
* 0: inverted chip mode control
* 1: as defined by chip mode (see SA2400_OPMODE)
*/
/*
* fractional compensation
* charge pump current DAC,
* 0 to 255, default 80.
*/
/*
* comparison divider select,
* 0 to 4, extra division
* ratio is 2**SM.
*/
/*
* T[phpsu], 1: disable
* PHP speedup pump,
* overrides SA2400_SYND_TSPU
*/
/*
* T[spu], 1: speedup on,
* 0: speedup off
*/
/*
* Operating mode, filter tuner,
* other controls
*/
#define SA2400_OPMODE 4
/*
* 1: in Rx mode, RSSI-ADC always on
* 0: RSSI-ADC only on during AGC
*/
/*
* read-only filter tuner error:
* 1 if tuner out of range
*/
/*
* Rx & Tx filter tuning, write tuning value (test mode only) or
* read tuner setting (in normal mode).
*/
/*
* external reference voltage
* (pad v2p5) on
*/
/*
* xtal input frequency,
* 0: 44 MHz
* 1: 22 MHz
*/
/*
* Rx output common mode voltage,
* 0: V[DD]/2
* 1: 1.25V
*/
/*
* make internal vco
* available at vco pads (vcoextout)
*/
/* main operating mode */
#define SA2400_OPMODE_DEFAULTS \
/*
* fine-tune AGC target:
* -7dB to 7dB, sign bit ...
*/
/*
* maximum AGC gain, 0 to 31, (yields 54dB to 85dB)
*/
/*
* write: settling time after baseband gain switching, units of
* 182 nanoseconds.
*/
/*
* write: settling time after LNA gain switching, units of
* 182 nanoseconds
* read: 2nd sample of RSSI in AGC cycle
*/
/*
* write: time between turning on Rx and AGCSET, units of
* 182 nanoseconds
* read: 1st sample of RSSI in AGC cycle
*/
/*
* 1: AGC w/ high S/N---switch LNA at
* step 52 (recommended)
* 0: switch LNA at step 60
*/
/*
* If _RXOSQON, Q offset is
* (_RXOSQSIGN ? -1 : 1) * (1 + _RXOSQ_MASK) * 8 millivolts,
* otherwise, Q offset is 0.
*
* Ditto I offset.
*/
/*
* use 10MHz offset cancellation cornerpoint for brief period
* after each gain change
*/
/*
* DC offset cancellation cornerpoint select
* write: in RXMGC, set the cornerpoint
* read: in other modes, read AGC-controlled cornerpoint
*/
/*
* write: in RXMGC mode, sets receiver gain
* read: in other modes, read AGC-controlled gain
*/
/*
* Tx offsets
* write: in test mode, sets the offsets
* read: in normal mode, returns automatic settings
*/
/*
* Ramp-up delay,
* 0: 1us
* 1: 2us
* 2: 3us
* 3: 4us
* datasheet says, "ramp-up
* time always 1us". huh?
*/
/*
* Transmitter gain settings
* for TXHI output
*/
/*
* Transmitter gain settings
* for TXLO output
*/
/*
* VCO calibration error flag---no
* band with low enough frequency
* could be found
*/
/*
* VCO band,
* write: in test mode, sets
* VCO band
* read: in normal mode,
* the result of
* calibration (VCOCAL).
* 0 = highest
* frequencies
*/
#endif /* _SA2400REG_H_ */