9aa73b6813b3fd35e78fcc44fd17535e765e504cQin Michael Li * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * Use is subject to license terms.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * Copyright (c) 2004, 2005 David Young. All rights reserved.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * Programmed for NetBSD by David Young.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * Redistribution and use in source and binary forms, with or without
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * modification, are permitted provided that the following conditions
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * are met:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * 1. Redistributions of source code must retain the above copyright
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * notice, this list of conditions and the following disclaimer.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * 2. Redistributions in binary form must reproduce the above copyright
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * notice, this list of conditions and the following disclaimer in the
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * documentation and/or other materials provided with the distribution.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * 3. The name of David Young may not be used to endorse or promote
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * products derived from this software without specific prior
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * written permission.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * OF SUCH DAMAGE.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * Control the Philips SA2400 RF front-end and the baseband processor
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * built into the Realtek RTL8180.
a72f7ea693101cc48bafbb4db6bb437d828011c4qlstatic int rtw_max2820_pwrstate(struct rtw_rf *, enum rtw_pwrstate);
a72f7ea693101cc48bafbb4db6bb437d828011c4qlstatic int rtw_sa2400_pwrstate(struct rtw_rf *, enum rtw_pwrstate);
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_rf_init(struct rtw_rf *rf, uint_t freq, uint8_t opaque_txpower,
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_rfbus_write(struct rtw_rfbus *bus, enum rtw_rfchipid rfchipid, uint_t addr,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (*bus->b_write)(bus->b_regs, rfchipid, addr, val);
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_bbp_preinit(struct rtw_regs *regs, uint_t antatten0, int dflantb,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_bbp_write(regs, RTW_BBP_ANTATTEN, antatten));
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_bbp_init(struct rtw_regs *regs, struct rtw_bbpset *bb, int antdiv,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql RTW_BBP_WRITE_OR_RETURN(RTW_BBP_IFAGCINI, bb->bb_ifagcini);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql RTW_BBP_WRITE_OR_RETURN(RTW_BBP_IFAGCLIMIT, bb->bb_ifagclimit);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql RTW_BBP_WRITE_OR_RETURN(RTW_BBP_IFAGCDET, bb->bb_ifagcdet);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_bbp_preinit(regs, bb->bb_antatten, dflantb, freq)) != 0)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql RTW_BBP_WRITE_OR_RETURN(RTW_BBP_CHESTLIM, bb->bb_chestlim);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql RTW_BBP_WRITE_OR_RETURN(RTW_BBP_CHSQLIM, bb->bb_chsqlim);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (0);
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_sa2400_txpower(struct rtw_rf *rf, uint8_t opaque_txpower)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(bus, RTW_RFCHIPID_PHILIPS, SA2400_TX,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * make sure we're using the same settings as the reference driver
a72f7ea693101cc48bafbb4db6bb437d828011c4qlstatic void
a72f7ea693101cc48bafbb4db6bb437d828011c4ql switch (freq) {
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2412:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2417:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2422:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2427:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2432:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2437:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2442:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2447:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2452:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2457:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2462:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2467:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2472:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql case 2484:
a72f7ea693101cc48bafbb4db6bb437d828011c4ql#endif /* _RTW_FUTURE_DEBUG_ */
a72f7ea693101cc48bafbb4db6bb437d828011c4ql/* freq is in MHz */
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * XO = 44MHz, R = 11, hence N is in units of XO / R = 4MHz.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * The channel spacing (5MHz) is not divisible by 4MHz, so
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * we set the fractional part of N to compensate.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql syna = LSHIFT(nf, SA2400_SYNA_NF_MASK) | LSHIFT(n, SA2400_SYNA_N_MASK);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql /* verify_syna(freq, syna); */
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * Divide the 44MHz crystal down to 4MHz. Set the fractional
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * compensation charge pump value to agree with the fractional
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * modulus.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql synb = LSHIFT(11, SA2400_SYNB_R_MASK) | SA2400_SYNB_L_NORMAL |
a72f7ea693101cc48bafbb4db6bb437d828011c4ql LSHIFT(80, SA2400_SYNB_FC_MASK); /* agrees w/ SA2400_SYNA_FM = 0 */
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_rfbus_write(bus, RTW_RFCHIPID_PHILIPS, SA2400_SYNA,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_rfbus_write(bus, RTW_RFCHIPID_PHILIPS, SA2400_SYNB,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_rfbus_write(bus, RTW_RFCHIPID_PHILIPS, SA2400_SYNC,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(bus, RTW_RFCHIPID_PHILIPS, SA2400_SYND, 0x0));
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_sa2400_pwrstate(struct rtw_rf *rf, enum rtw_pwrstate power)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql switch (power) {
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(bus, RTW_RFCHIPID_PHILIPS, SA2400_OPMODE,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * we are not supposed to be in RXMGC mode when we do
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(&sa->sa_bus, RTW_RFCHIPID_PHILIPS, SA2400_MANRX,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(&sa->sa_bus, RTW_RFCHIPID_PHILIPS,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * calibrate VCO
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * XXX superfluous: SA2400 automatically entered SLEEP mode.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql opmode = SA2400_OPMODE_DEFAULTS | SA2400_OPMODE_MODE_FCALIB;
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(&sa->sa_bus, RTW_RFCHIPID_PHILIPS,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql dccal = SA2400_OPMODE_DEFAULTS | SA2400_OPMODE_MODE_TXRX;
a72f7ea693101cc48bafbb4db6bb437d828011c4ql rc = rtw_rfbus_write(&sa->sa_bus, RTW_RFCHIPID_PHILIPS, SA2400_OPMODE,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if (rc != 0)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql DELAY(5); /* DCALIB after being in Tx mode for 5 microseconds */
a72f7ea693101cc48bafbb4db6bb437d828011c4ql rc = rtw_rfbus_write(&sa->sa_bus, RTW_RFCHIPID_PHILIPS, SA2400_OPMODE,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if (rc != 0)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql DELAY(20); /* calibration takes at most 20 microseconds */
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (0);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(&sa->sa_bus, RTW_RFCHIPID_PHILIPS, SA2400_AGC,
a72f7ea693101cc48bafbb4db6bb437d828011c4qlstatic void
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * XXX reference driver calibrates VCO twice. Is it a bug?
a72f7ea693101cc48bafbb4db6bb437d828011c4ql for (i = 0; i < 2; i++) {
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * VCO calibration erases synthesizer registers, so re-tune
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * analog PHY needs DC calibration
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (0);
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_sa2400_init(struct rtw_rf *rf, uint_t freq, uint8_t opaque_txpower,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * skip configuration if it's time to sleep or to power-down.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * go to sleep for configuration
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * enter Tx/Rx mode
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_sa2400_create(struct rtw_regs *regs, rtw_rf_write_t rf_write, int digphy)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql sa = (struct rtw_sa2400 *)kmem_zalloc(sizeof (*sa), KM_SLEEP);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * XXX magic
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * freq is in MHz
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (-1);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(bus, RTW_RFCHIPID_MAXIM, MAX2820_CHANNEL,
a72f7ea693101cc48bafbb4db6bb437d828011c4qlstatic void
a72f7ea693101cc48bafbb4db6bb437d828011c4ql/*ARGSUSED*/
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_max2820_init(struct rtw_rf *rf, uint_t freq, uint8_t opaque_txpower,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_rfbus_write(bus, RTW_RFCHIPID_MAXIM, MAX2820_TEST,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_rfbus_write(bus, RTW_RFCHIPID_MAXIM, MAX2820_ENABLE,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * skip configuration if it's time to sleep or to power-down.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (0);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_rfbus_write(bus, RTW_RFCHIPID_MAXIM, MAX2820_SYNTH,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * XXX The MAX2820 datasheet indicates that 1C and 2C should not
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * be changed from 7, however, the reference driver sets them
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * to 4 and 1, respectively.
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_rfbus_write(bus, RTW_RFCHIPID_MAXIM, MAX2820_RECEIVE,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rtw_rfbus_write(bus, RTW_RFCHIPID_MAXIM, MAX2820_TRANSMIT,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql/*ARGSUSED*/
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_max2820_txpower(struct rtw_rf *rf, uint8_t opaque_txpower)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (0);
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_max2820_pwrstate(struct rtw_rf *rf, enum rtw_pwrstate power)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql switch (power) {
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_max2820_create(struct rtw_regs *regs, rtw_rf_write_t rf_write, int is_a)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql mx = (struct rtw_max2820 *)kmem_zalloc(sizeof (*mx), KM_SLEEP);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * XXX magic
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * freq is in MHz
a72f7ea693101cc48bafbb4db6bb437d828011c4qlrtw_phy_init(struct rtw_regs *regs, struct rtw_rf *rf, uint8_t opaque_txpower,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql uint8_t cs_threshold, uint_t freq, int antdiv, int dflantb,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * XXX is this really necessary?
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_bbp_preinit(regs, rf->rf_bbpset.bb_antatten, dflantb,
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql * initialize RF
a72f7ea693101cc48bafbb4db6bb437d828011c4ql if ((rc = rtw_rf_init(rf, freq, opaque_txpower, power)) != 0)
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql /* what is this redundant tx power setting here for? */
a72f7ea693101cc48bafbb4db6bb437d828011c4ql return (rc);
a72f7ea693101cc48bafbb4db6bb437d828011c4ql#endif /* _RTW_FUTURE_DEBUG */