ff3124eff995e6cd8ebd8c6543648e0670920034ff * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * Use is subject to license terms.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * Copyright (c) 2005, 2006
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * Damien Bergamini <damien.bergamini@free.fr>
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * Permission to use, copy, modify, and distribute this software for any
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * purpose with or without fee is hereby granted, provided that the above
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * copyright notice and this permission notice appear in all copies.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#pragma ident "%Z%%M% %I% %E% SMI"
e07d9cb85217949d497b02d7211de8a197d2f2ebzfextern "C" {
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_TX_DESC_SIZE (sizeof (struct rt2560_tx_desc))
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_RX_DESC_SIZE (sizeof (struct rt2560_rx_desc))
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * Control and status registers.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_CSR12 0x0030 /* Synchronization configuration 0 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_CSR13 0x0034 /* Synchronization configuration 1 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_TXCSR2 0x0068 /* TX descriptor configuration */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_TXCSR4 0x0070 /* TX ATIM ring base address */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_TXCSR5 0x0074 /* TX PRIO ring base address */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_RXCSR1 0x0084 /* RX descriptor configuration */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_ARSP_PLCP_0 0x0098 /* Auto Responder PLCP address */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_ARSP_PLCP_1 0x009c /* Auto Responder Basic Rate mask */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PWRCSR0 0x00c4 /* Power mode configuration */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PSCSR0 0x00c8 /* Power state transition time */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PSCSR1 0x00cc /* Power state transition time */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PSCSR2 0x00d0 /* Power state transition time */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PSCSR3 0x00d4 /* Power state transition time */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PWRCSR1 0x00d8 /* Manual power control/status */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_RALINKCSR 0x00e8 /* Ralink RX auto-reset BBCR */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_BCNCSR 0x00ec /* Beacon interval control */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_DMACSR0 0x0100 /* Current RX ring address */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_DMACSR1 0x0104 /* Current Tx ring address */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_DMACSR2 0x0104 /* Current Priority ring address */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_DMACSR3 0x0104 /* Current ATIM ring address */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PLCP1MCSR 0x013c /* Signal/Service/Length of ACK @1M */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PLCP2MCSR 0x0140 /* Signal/Service/Length of ACK @2M */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PLCP5p5MCSR 0x0144 /* Signal/Service/Length of ACK @5.5M */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_PLCP11MCSR 0x0148 /* Signal/Service/Length of ACK @11M */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_ACKPCTCSR 0x014c /* ACK/CTS padload consume time */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_ARTCSR1 0x0150 /* ACK/CTS padload consume time */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_ARTCSR2 0x0154 /* ACK/CTS padload consume time */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* possible flags for register RXCSR0 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* possible flags for register CSR1 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* possible flags for register CSR14 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* possible flags for register CSR21 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* possible flags for register TXCSR0 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* possible flags for register SECCSR0 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* possible flags for register SECCSR1 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* possible flags for register CSR7 */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf (~(RT2560_BEACON_EXPIRE | RT2560_WAKEUP_EXPIRE | RT2560_TX_DONE | \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf RT2560_PRIO_DONE | RT2560_RX_DONE | RT2560_DECRYPTION_DONE | \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf (RT2560_BEACON_EXPIRE | RT2560_WAKEUP_EXPIRE | RT2560_TX_DONE | \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf RT2560_PRIO_DONE | RT2560_RX_DONE | RT2560_DECRYPTION_DONE | \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* Tx descriptor */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* Rx descriptor */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf/* dual-band RF */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#define RT2560_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * control and status registers access macros
ff3124eff995e6cd8ebd8c6543648e0670920034ff ddi_get32((sc)->sc_ioh, (uint32_t *)((uintptr_t)(sc)->sc_rbase + (reg)))
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * EEPROM access macro
e07d9cb85217949d497b02d7211de8a197d2f2ebzf} while (/* CONSTCOND */0)
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * Default values for MAC registers; values taken from the reference driver.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * Default values for BBP registers; values taken from the reference driver.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * Default values for RF register R2 indexed by channel numbers; values taken
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * from the reference driver.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d \
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * For dual-band RF, RF registers R1 and R4 also depend on channel number;
e07d9cb85217949d497b02d7211de8a197d2f2ebzf * values taken from the reference driver.
e07d9cb85217949d497b02d7211de8a197d2f2ebzf#endif /* _RT2560_REG_H */