pci_cap.c revision 911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * CDDL HEADER START
27255037bba8df933008f7bd2112201bef2e2429pjha *
27255037bba8df933008f7bd2112201bef2e2429pjha * The contents of this file are subject to the terms of the
27255037bba8df933008f7bd2112201bef2e2429pjha * Common Development and Distribution License (the "License").
27255037bba8df933008f7bd2112201bef2e2429pjha * You may not use this file except in compliance with the License.
27255037bba8df933008f7bd2112201bef2e2429pjha *
27255037bba8df933008f7bd2112201bef2e2429pjha * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
27255037bba8df933008f7bd2112201bef2e2429pjha * or http://www.opensolaris.org/os/licensing.
27255037bba8df933008f7bd2112201bef2e2429pjha * See the License for the specific language governing permissions
27255037bba8df933008f7bd2112201bef2e2429pjha * and limitations under the License.
27255037bba8df933008f7bd2112201bef2e2429pjha *
27255037bba8df933008f7bd2112201bef2e2429pjha * When distributing Covered Code, include this CDDL HEADER in each
27255037bba8df933008f7bd2112201bef2e2429pjha * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
27255037bba8df933008f7bd2112201bef2e2429pjha * If applicable, add the following below this CDDL HEADER, with the
27255037bba8df933008f7bd2112201bef2e2429pjha * fields enclosed by brackets "[]" replaced with your own identifying
27255037bba8df933008f7bd2112201bef2e2429pjha * information: Portions Copyright [yyyy] [name of copyright owner]
27255037bba8df933008f7bd2112201bef2e2429pjha *
27255037bba8df933008f7bd2112201bef2e2429pjha * CDDL HEADER END
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/note.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/conf.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/debug.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/sunddi.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/pci.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/pcie.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/bitmap.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/autoconf.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/sysmacros.h>
27255037bba8df933008f7bd2112201bef2e2429pjha#include <sys/pci_cap.h>
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
27255037bba8df933008f7bd2112201bef2e2429pjha * Use is subject to license terms.
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha#pragma ident "%Z%%M% %I% %E% SMI"
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * Generic PCI Capabilites Interface for all pci platforms
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha#ifdef DEBUG
27255037bba8df933008f7bd2112201bef2e2429pjhauint_t pci_cap_debug = 0;
27255037bba8df933008f7bd2112201bef2e2429pjha#endif
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/* Cap Base Macro */
27255037bba8df933008f7bd2112201bef2e2429pjha#define PCI_CAP_BASE(h, id, base_p) (*base_p ? DDI_SUCCESS : \
27255037bba8df933008f7bd2112201bef2e2429pjha (id ? PCI_CAP_LOCATE(h, id, base_p) : DDI_FAILURE))
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * pci_cap_probe: returns the capid and base based upon a given index
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjhaint
27255037bba8df933008f7bd2112201bef2e2429pjhapci_cap_probe(ddi_acc_handle_t h, uint16_t index,
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t *id_p, uint16_t *base_p)
27255037bba8df933008f7bd2112201bef2e2429pjha{
27255037bba8df933008f7bd2112201bef2e2429pjha int i, search_ext = 0;
27255037bba8df933008f7bd2112201bef2e2429pjha uint16_t base, pcix_cmd, status;
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t id, xcaps_hdr; /* Extended Caps Header Word */
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha status = pci_config_get16(h, PCI_CONF_STAT);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (status == 0xffff || !(status & PCI_STAT_CAP))
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha /* PCIE and PCIX Version 2 contain Extended Config Space */
27255037bba8df933008f7bd2112201bef2e2429pjha for (i = 0, base = pci_config_get8(h, PCI_CONF_CAP_PTR);
27255037bba8df933008f7bd2112201bef2e2429pjha base && i < index; base = pci_config_get8(h, base
27255037bba8df933008f7bd2112201bef2e2429pjha + PCI_CAP_NEXT_PTR), i++) {
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if ((id = pci_config_get8(h, base)) == 0xff)
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (id == PCI_CAP_ID_PCI_E)
27255037bba8df933008f7bd2112201bef2e2429pjha search_ext = 1;
27255037bba8df933008f7bd2112201bef2e2429pjha else if (id == PCI_CAP_ID_PCIX) {
27255037bba8df933008f7bd2112201bef2e2429pjha if ((pcix_cmd = pci_config_get16(h, base +
27255037bba8df933008f7bd2112201bef2e2429pjha PCI_PCIX_COMMAND)) != 0xffff)
27255037bba8df933008f7bd2112201bef2e2429pjha continue;
27255037bba8df933008f7bd2112201bef2e2429pjha if ((pcix_cmd & PCI_PCIX_VER_MASK) == PCI_PCIX_VER_2)
27255037bba8df933008f7bd2112201bef2e2429pjha search_ext = 1;
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (base && i == index) {
27255037bba8df933008f7bd2112201bef2e2429pjha if ((id = pci_config_get8(h, base)) != 0xff)
27255037bba8df933008f7bd2112201bef2e2429pjha goto found;
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (!search_ext)
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha for (base = PCIE_EXT_CAP; base && i < index; i++) {
27255037bba8df933008f7bd2112201bef2e2429pjha if ((xcaps_hdr = pci_config_get32(h, base)) == 0xffffffff)
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha id = (xcaps_hdr >> PCIE_EXT_CAP_ID_SHIFT)
27255037bba8df933008f7bd2112201bef2e2429pjha & PCIE_EXT_CAP_ID_MASK;
27255037bba8df933008f7bd2112201bef2e2429pjha base = (xcaps_hdr >> PCIE_EXT_CAP_NEXT_PTR_SHIFT)
27255037bba8df933008f7bd2112201bef2e2429pjha & PCIE_EXT_CAP_NEXT_PTR_MASK;
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (!base || i < index)
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if ((xcaps_hdr = pci_config_get32(h, base)) == 0xffffffff)
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha id = ((xcaps_hdr >> PCIE_EXT_CAP_ID_SHIFT) & PCIE_EXT_CAP_ID_MASK) |
27255037bba8df933008f7bd2112201bef2e2429pjha PCI_CAP_XCFG_FLAG;
27255037bba8df933008f7bd2112201bef2e2429pjhafound:
27255037bba8df933008f7bd2112201bef2e2429pjha PCI_CAP_DBG("pci_cap_probe: index=%x, id=%x, base=%x\n",
27255037bba8df933008f7bd2112201bef2e2429pjha index, id, base);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha *id_p = id;
27255037bba8df933008f7bd2112201bef2e2429pjha *base_p = base;
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_SUCCESS);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha}
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * pci_lcap_locate: Helper function locates a base in conventional config space.
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjhaint
27255037bba8df933008f7bd2112201bef2e2429pjhapci_lcap_locate(ddi_acc_handle_t h, uint8_t id, uint16_t *base_p)
27255037bba8df933008f7bd2112201bef2e2429pjha{
27255037bba8df933008f7bd2112201bef2e2429pjha uint16_t status, base;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha status = pci_config_get16(h, PCI_CONF_STAT);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (status == 0xffff || !(status & PCI_STAT_CAP))
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha for (base = pci_config_get8(h, PCI_CONF_CAP_PTR); base;
27255037bba8df933008f7bd2112201bef2e2429pjha base = pci_config_get8(h, base + PCI_CAP_NEXT_PTR)) {
27255037bba8df933008f7bd2112201bef2e2429pjha if (pci_config_get8(h, base) == id) {
27255037bba8df933008f7bd2112201bef2e2429pjha *base_p = base;
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_SUCCESS);
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha *base_p = PCI_CAP_NEXT_PTR_NULL;
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha}
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * pci_xcap_locate: Helper function locates a base in extended config space.
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjhaint
27255037bba8df933008f7bd2112201bef2e2429pjhapci_xcap_locate(ddi_acc_handle_t h, uint16_t id, uint16_t *base_p)
27255037bba8df933008f7bd2112201bef2e2429pjha{
27255037bba8df933008f7bd2112201bef2e2429pjha uint16_t status, base;
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t xcaps_hdr;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha status = pci_config_get16(h, PCI_CONF_STAT);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (status == 0xffff || !(status & PCI_STAT_CAP))
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha for (base = PCIE_EXT_CAP; base; base = (xcaps_hdr >>
27255037bba8df933008f7bd2112201bef2e2429pjha PCIE_EXT_CAP_NEXT_PTR_SHIFT) & PCIE_EXT_CAP_NEXT_PTR_MASK) {
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if ((xcaps_hdr = pci_config_get32(h, base)) == 0xffffffff)
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (((xcaps_hdr >> PCIE_EXT_CAP_ID_SHIFT) &
27255037bba8df933008f7bd2112201bef2e2429pjha PCIE_EXT_CAP_ID_MASK) == id) {
27255037bba8df933008f7bd2112201bef2e2429pjha *base_p = base;
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_SUCCESS);
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha *base_p = PCI_CAP_NEXT_PTR_NULL;
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha}
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * pci_cap_get: This function uses the base or capid to get a byte, word,
27255037bba8df933008f7bd2112201bef2e2429pjha * or dword. If access by capid is requested, the function uses the capid to
27255037bba8df933008f7bd2112201bef2e2429pjha * locate the base. Access by a base results in better performance
27255037bba8df933008f7bd2112201bef2e2429pjha * because no cap list traversal is required.
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjhauint32_t
27255037bba8df933008f7bd2112201bef2e2429pjhapci_cap_get(ddi_acc_handle_t h, pci_config_size_t size,
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t id, uint16_t base, uint16_t offset)
27255037bba8df933008f7bd2112201bef2e2429pjha{
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t data;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (PCI_CAP_BASE(h, id, &base) != DDI_SUCCESS)
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha return (0xffffffff);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha /*
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha * Each access to a PCI Configuration Space should be checked
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha * by the calling function. A returned value of the 2's complement
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha * of -1 indicates that either the device is offlined or it does not
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha * exist.
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjha offset += base;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha switch (size) {
27255037bba8df933008f7bd2112201bef2e2429pjha case PCI_CAP_CFGSZ_8:
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha data = pci_config_get8(h, offset);
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha case PCI_CAP_CFGSZ_16:
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha data = pci_config_get16(h, offset);
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha case PCI_CAP_CFGSZ_32:
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha data = pci_config_get32(h, offset);
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha default:
911fc2e57de04c6f6a4da8afebbafbcc3e3c4ee5pjha data = 0xffffffff;
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha PCI_CAP_DBG("pci_cap_get: %p[x%x]=x%x\n", (void *)h, offset, data);
27255037bba8df933008f7bd2112201bef2e2429pjha return (data);
27255037bba8df933008f7bd2112201bef2e2429pjha}
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * pci_cap_put: This function uses the caps ptr or capid to put a byte, word,
27255037bba8df933008f7bd2112201bef2e2429pjha * or dword. If access by capid is requested, the function uses the capid to
27255037bba8df933008f7bd2112201bef2e2429pjha * locate the base. Access by base results in better performance
27255037bba8df933008f7bd2112201bef2e2429pjha * because no cap list traversal is required.
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjhaint
27255037bba8df933008f7bd2112201bef2e2429pjhapci_cap_put(ddi_acc_handle_t h, pci_config_size_t size,
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t id, uint16_t base, uint16_t offset,
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t data)
27255037bba8df933008f7bd2112201bef2e2429pjha{
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha /*
27255037bba8df933008f7bd2112201bef2e2429pjha * use the pci_config_size_t to switch for the appropriate read
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjha if (PCI_CAP_BASE(h, id, &base) != DDI_SUCCESS)
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha offset += base;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha switch (size) {
27255037bba8df933008f7bd2112201bef2e2429pjha case PCI_CAP_CFGSZ_8:
27255037bba8df933008f7bd2112201bef2e2429pjha pci_config_put8(h, offset, data);
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha case PCI_CAP_CFGSZ_16:
27255037bba8df933008f7bd2112201bef2e2429pjha pci_config_put16(h, offset, data);
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha case PCI_CAP_CFGSZ_32:
27255037bba8df933008f7bd2112201bef2e2429pjha pci_config_put32(h, offset, data);
27255037bba8df933008f7bd2112201bef2e2429pjha break;
27255037bba8df933008f7bd2112201bef2e2429pjha default:
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha PCI_CAP_DBG("pci_cap_put: data=%x\n", data);
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_SUCCESS);
27255037bba8df933008f7bd2112201bef2e2429pjha}
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha/*
27255037bba8df933008f7bd2112201bef2e2429pjha * Cache the entire Cap Structure. The caller is required to allocate and free
27255037bba8df933008f7bd2112201bef2e2429pjha * buffer.
27255037bba8df933008f7bd2112201bef2e2429pjha */
27255037bba8df933008f7bd2112201bef2e2429pjhaint
27255037bba8df933008f7bd2112201bef2e2429pjhapci_cap_read(ddi_acc_handle_t h, uint32_t id, uint16_t base,
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t *buf_p, uint32_t nwords)
27255037bba8df933008f7bd2112201bef2e2429pjha{
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha int i;
27255037bba8df933008f7bd2112201bef2e2429pjha uint32_t *ptr;
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha ASSERT(nwords < 1024);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha if (PCI_CAP_BASE(h, id, &base) != DDI_SUCCESS)
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha for (ptr = buf_p, i = 0; i < nwords; i++, base += 4) {
27255037bba8df933008f7bd2112201bef2e2429pjha if ((*ptr++ = pci_config_get32(h, base)) == 0xffffffff)
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_FAILURE);
27255037bba8df933008f7bd2112201bef2e2429pjha }
27255037bba8df933008f7bd2112201bef2e2429pjha
27255037bba8df933008f7bd2112201bef2e2429pjha return (DDI_SUCCESS);
27255037bba8df933008f7bd2112201bef2e2429pjha}