nxge_txc.c revision 52ccf843e173e2a4a657360b0a22853fd413905f
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
static nxge_status_t
static void
{
/*
* Enable the TXC controller.
*/
goto fail;
}
/* Enable this port within the TXC. */
goto fail;
}
/* Bind DMA channels to this port. */
goto fail;
}
/* Unmask all TXC interrupts */
return (NXGE_OK);
fail:
"nxge_txc_init: Failed to initialize txc on port %d",
port));
return (NXGE_ERROR | rs);
}
{
/*
* disable the TXC controller.
*/
goto fail;
}
/* disable this port within the TXC. */
goto fail;
}
/* unbind DMA channels to this port. */
goto fail;
}
return (NXGE_OK);
fail:
"nxge_txc_init: Failed to initialize txc on port %d",
port));
return (NXGE_ERROR | rs);
}
/*
* nxge_txc_tdc_bind
*
* Bind a TDC to a port.
*
* Arguments:
* nxgep
* channel The channel to bind.
*
* Notes:
*
* npi_txc_control()
* npi_txc_global_imask_set()
* npi_txc_port_dma_enable()
*
* Registers accessed:
* TXC_CONTROL
* TXC_PORT_DMA
* TXC_INT_MASK
*
* Context:
* Service domain
*/
int channel)
{
/* Get the current value of TXC_CONTROL. */
/* Mask all TXC interrupts for <port>. */
}
/* Bind <channel> to <port>. */
/* Read in the old bitmap. */
&bitmap);
"nxge_txc_tdc_bind: channel %d already bound on port %d",
} else {
/* Bind the new channel. */
"==> nxge_txc_tdc_bind(): bitmap = %lx", bitmap));
/* Write out the new bitmap. */
goto fail;
}
}
/* Enable this port, if necessary. */
goto fail;
}
}
/*
* Enable the TXC controller, if necessary.
*/
goto fail;
}
}
/* Unmask all TXC interrupts on <port> */
return (NXGE_OK);
fail:
return (NXGE_ERROR | rs);
}
/*
* nxge_txc_tdc_unbind
*
* Unbind a TDC from a port.
*
* Arguments:
* nxgep
* channel The channel to unbind.
*
* Notes:
*
* npi_txc_control()
* npi_txc_global_imask_set()
* npi_txc_port_dma_enable()
*
* Registers accessed:
* TXC_CONTROL
* TXC_PORT_DMA
* TXC_INT_MASK
*
* Context:
* Service domain
*/
int channel)
{
/* Mask all TXC interrupts for <port>. */
/* Unbind <channel>. */
/* Read in the old bitmap. */
&bitmap);
/* Write out the new bitmap. */
"npi_txc_port_dma_enable(%d, %d) failed: %x",
}
/* Unmask all TXC interrupts on <port> */
if (bitmap)
return (NXGE_OK);
fail:
return (NXGE_ERROR | rs);
}
void
{
nxgep->function_num));
"packets to MAC %d",
"\n\tTXC ass packets %d reorder packets %d",
}
{
case 0:
err_portn = 0;
}
break;
case 1:
err_portn = 1;
}
break;
case 2:
err_portn = 2;
}
break;
case 3:
err_portn = 3;
}
break;
default:
return (NXGE_ERROR);
}
" nxge_txc_handle_sys_errors: errored port %d",
err_portn));
if (my_err) {
}
return (status);
}
static nxge_status_t
{
if ((err_status & TXC_INT_STAT_RO_CORR_ERR) ||
return (NXGE_ERROR | rs);
}
if (err_status & TXC_INT_STAT_RO_CORR_ERR) {
statsp->ro_correct_err++;
"nxge_txc_err_evnts: "
"RO FIFO correctable error"));
}
if (err_status & TXC_INT_STAT_RO_UNCORR_ERR) {
"nxge_txc_err_evnts: "
"RO FIFO uncorrectable error"));
}
if (err_status & TXC_INT_STAT_REORDER_ERR) {
statsp->reorder_err++;
"nxge_txc_err_evnts: "
"fatal error: Reorder error"));
}
if ((err_status & TXC_INT_STAT_RO_CORR_ERR) ||
!= NPI_SUCCESS)
return (NXGE_ERROR | rs);
/*
* Making sure that error source is cleared if this is
* an injected error.
*/
portn, 0);
}
}
if ((err_status & TXC_INT_STAT_SF_CORR_ERR) ||
return (NXGE_ERROR | rs);
}
if (err_status & TXC_INT_STAT_SF_CORR_ERR) {
statsp->sf_correct_err++;
"nxge_txc_err_evnts: "
"SF FIFO correctable error"));
}
if (err_status & TXC_INT_STAT_SF_UNCORR_ERR) {
"nxge_txc_err_evnts: "
"SF FIFO uncorrectable error"));
}
!= NPI_SUCCESS)
return (NXGE_ERROR | rs);
/*
* Making sure that error source is cleared if this is
* an injected error.
*/
}
/* Clear corresponding errors */
switch (portn) {
case 0:
break;
case 1:
break;
case 2:
break;
case 3:
break;
default:
return (NXGE_ERROR);
}
if (txport_fatal) {
" nxge_txc_handle_port_errors:"
" fatal Error on Port#%d\n",
portn));
}
}
return (status);
}
void
{
switch (err_id) {
ro_ecc_ctl.value = 0;
else
#if defined(__i386)
#else
#endif
break;
sf_ecc_ctl.value = 0;
else
#if defined(__i386)
#else
#endif
break;
#if defined(__i386)
#else
#endif
break;
default:
"nxge_txc_inject_err: Unknown err_id"));
}
}
static void
{
switch (portn) {
case 0:
break;
case 1:
break;
case 2:
break;
case 3:
break;
default:
;
}
}