nxge_mac.c revision 0d2a8e5eea8ac6ea0f5c517f0c481329b57d5459
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
extern uint32_t nxge_no_link_notify;
extern uint32_t nxge_lb_dbg;
extern nxge_os_mutex_t nxge_mdio_lock;
extern nxge_os_mutex_t nxge_mii_lock;
extern boolean_t nxge_jumbo_enable;
/*
* Ethernet broadcast address definition.
*/
static ether_addr_st etherbroadcastaddr =
{{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}};
static ether_addr_st etherzeroaddr =
{{0x0, 0x0, 0x0, 0x0, 0x0, 0x0}};
/* Initialize the entire MAC and physical layer */
{
/* Initialize XIF to configure a network mode */
goto fail;
}
goto fail;
}
/* Initialize TX and RX MACs */
/*
* Always perform XIF init first, before TX and RX MAC init
*/
goto fail;
goto fail;
goto fail;
goto fail;
goto fail;
goto fail;
return (NXGE_OK);
fail:
"nxge_mac_init: failed to initialize MAC port<%d>",
portn));
return (status);
}
/* Initialize the Ethernet Link */
{
#ifdef NXGE_DEBUG
#endif
/* Workaround to get link up in both NIU ports */
goto fail;
}
NXGE_DELAY(200000);
/* Initialize internal serdes */
goto fail;
NXGE_DELAY(200000);
goto fail;
return (NXGE_OK);
fail:
"nxge_link_init: ",
"failed to initialize Ethernet link on port<%d>",
portn));
return (status);
}
/* Initialize the XIF sub-block within the MAC */
{
if (portt == PORT_TYPE_XMAC) {
/* Setup XIF Configuration for XMAC */
if ((portmode == PORT_10G_FIBER) ||
(portmode == PORT_10G_COPPER))
if (portmode == PORT_1G_COPPER) {
}
/* Set MAC Internal Loopback if necessary */
if (portmode == PORT_10G_FIBER) {
} else {
}
}
if (rs != NPI_SUCCESS)
goto fail;
/* Set Port Mode */
if ((portmode == PORT_10G_FIBER) ||
(portmode == PORT_10G_COPPER)) {
MAC_XGMII_MODE, rs);
if (rs != NPI_SUCCESS)
goto fail;
goto fail;
} else {
goto fail;
}
} else if ((portmode == PORT_1G_FIBER) ||
(portmode == PORT_1G_COPPER)) {
MAC_GMII_MODE, rs);
} else {
MAC_MII_MODE, rs);
}
if (rs != NPI_SUCCESS)
goto fail;
} else {
"nxge_xif_init: Unknown port mode (%d)"
goto fail;
}
} else if (portt == PORT_TYPE_BMAC) {
/* Setup XIF Configuration for BMAC */
if (portmode == PORT_1G_COPPER) {
}
if (rs != NPI_SUCCESS)
goto fail;
}
return (NXGE_OK);
fail:
"nxge_xif_init: Failed to initialize XIF port<%d>",
portn));
return (NXGE_ERROR | rs);
}
/* Initialize the PCS sub-block in the MAC */
{
if (portmode == PORT_1G_FIBER) {
/* Initialize port's PCS */
goto fail;
} else if ((portmode == PORT_10G_FIBER) ||
(portmode == PORT_10G_COPPER)) {
/* Use internal XPCS, bypass 1G PCS */
val &= ~XMAC_XIF_XPCS_BYPASS;
goto fail;
/* Set XPCS Internal Loopback if necessary */
XPCS_REG_CONTROL1, &val))
!= NPI_SUCCESS)
goto fail;
val |= XPCS_CTRL1_LOOPBK;
else
val &= ~XPCS_CTRL1_LOOPBK;
!= NPI_SUCCESS)
goto fail;
/* Clear descw errors */
!= NPI_SUCCESS)
goto fail;
/* Clear symbol errors */
!= NPI_SUCCESS)
goto fail;
!= NPI_SUCCESS)
goto fail;
} else if (portmode == PORT_1G_COPPER) {
if (portn < 4) {
}
goto fail;
} else {
goto fail;
}
pass:
return (NXGE_OK);
fail:
"nxge_pcs_init: Failed to initialize PCS port<%d>",
portn));
return (NXGE_ERROR | rs);
}
/* Initialize the Internal Serdes */
{
#ifdef NXGE_DEBUG
#endif
#ifdef NXGE_DEBUG
"==> nxge_serdes_init port<%d>", portn));
#endif
goto fail;
!= NXGE_OK)
goto fail;
} else {
goto fail;
}
portn));
return (NXGE_OK);
fail:
"nxge_serdes_init: Failed to initialize serdes for port<%d>",
portn));
return (status);
}
/* Initialize the TI Hedwig Internal Serdes (N2-NIU only) */
{
int chan;
portn));
/* 0x0E01 */
/* 0x9101 */
/* 0x0008 */
/* Set loopback mode if necessary */
!= NXGE_OK)
goto fail;
}
/* Use default PLL value */
/* 0x0E21 */
/* 0x9121 */
/* 0x8 */
/* MPY = 0x100 */
/* Set PLL */
!= NXGE_OK)
goto fail;
} else {
goto fail;
}
/* MIF_REG_WR(handle, MIF_MASK_REG, ~mask); */
NXGE_DELAY(20);
/* init TX channels */
!= NXGE_OK)
goto fail;
!= NXGE_OK)
goto fail;
}
/* init RX channels */
!= NXGE_OK)
goto fail;
!= NXGE_OK)
goto fail;
}
portn));
return (NXGE_OK);
fail:
"nxge_n2_serdes_init: Failed to initialize N2 serdes for port<%d>",
portn));
return (status);
}
/* Initialize Neptune Internal Serdes (Neptune only) */
{
int chan;
return (NXGE_OK);
portn));
switch (portn) {
case 0:
(0x5 << ESR_CTL_OUT_EMPH_0_SHIFT) |
(0x5 << ESR_CTL_OUT_EMPH_1_SHIFT) |
(0x5 << ESR_CTL_OUT_EMPH_2_SHIFT) |
(0x5 << ESR_CTL_OUT_EMPH_3_SHIFT) |
(0x5 << ESR_CTL_OUT_EMPH_3_SHIFT) |
(0x1 << ESR_CTL_LOSADJ_0_SHIFT) |
(0x1 << ESR_CTL_LOSADJ_1_SHIFT) |
(0x1 << ESR_CTL_LOSADJ_2_SHIFT) |
(0x1 << ESR_CTL_LOSADJ_3_SHIFT));
/* Set Serdes0 Internal Loopback if necessary */
} else {
}
break;
case 1:
(0x5 << ESR_CTL_OUT_EMPH_0_SHIFT) |
(0x5 << ESR_CTL_OUT_EMPH_1_SHIFT) |
(0x5 << ESR_CTL_OUT_EMPH_2_SHIFT) |
(0x5 << ESR_CTL_OUT_EMPH_3_SHIFT) |
(0x5 << ESR_CTL_OUT_EMPH_3_SHIFT) |
(0x1 << ESR_CTL_LOSADJ_0_SHIFT) |
(0x1 << ESR_CTL_LOSADJ_1_SHIFT) |
(0x1 << ESR_CTL_LOSADJ_2_SHIFT) |
(0x1 << ESR_CTL_LOSADJ_3_SHIFT));
/* Set Serdes1 Internal Loopback if necessary */
} else {
}
break;
default:
/* Nothing to do here */
goto done;
}
/* init TX RX channels */
goto fail;
goto fail;
goto fail;
goto fail;
goto fail;
goto fail;
goto fail;
goto fail;
}
/* Apply Tx core reset */
goto fail;
goto fail;
NXGE_DELAY(200);
/* Apply Rx core reset */
goto fail;
NXGE_DELAY(200);
goto fail;
NXGE_DELAY(200);
goto fail;
goto fail;
"Failed to reset port<%d> XAUI Serdes",
portn));
}
if (portn == 0) {
if ((val & ESR_SIG_P0_BITS_MASK) !=
goto fail;
}
} else if (portn == 1) {
if ((val & ESR_SIG_P1_BITS_MASK) !=
goto fail;
}
}
} else if (portmode == PORT_1G_FIBER) {
val &= ~ESR_PLL_CFG_FBDIV_2;
switch (portn) {
case 0:
break;
case 1:
break;
case 2:
break;
case 3:
break;
default:
goto fail;
}
}
done:
portn));
return (NXGE_OK);
fail:
"nxge_neptune_serdes_init: "
"Failed to initialize Neptune serdes for port<%d>",
portn));
return (status);
}
/* Look for transceiver type */
{
return (NXGE_ERROR);
} else
return (NXGE_ERROR);
/*
* For Altas, Xcvr port numbers are swapped with ethernet
* port number. This is designed for better signal
* integrity in routing.
*/
switch (portn) {
case 0:
break;
case 1:
break;
case 2:
break;
case 3:
break;
default:
return (NXGE_ERROR);
}
} else {
return (NXGE_ERROR);
}
return (NXGE_OK);
}
/* Initialize transceiver */
{
#ifdef NXGE_DEBUG
#endif
#ifdef NXGE_DEBUG
#endif
/*
* Initialize the xcvr statistics.
*/
/*
* Initialize the link statistics.
*/
case PORT_10G_FIBER:
/* Disable Link LEDs */
goto fail;
/* Set Clause 45 */
/* Reset the transceiver */
goto fail;
goto fail;
do {
drv_usecwait(500);
goto fail;
delay++;
if (delay == 100) {
"nxge_xcvr_init: "
"failed to reset Transceiver on port<%d>",
portn));
status = NXGE_ERROR;
goto fail;
}
/* Set to 0x7FBF */
!= NXGE_OK)
goto fail;
/* Set to 0x164 */
!= NXGE_OK)
goto fail;
/*
* According to Broadcom's instruction, SW needs to read
* back these registers twice after written.
*/
!= NXGE_OK)
goto fail;
!= NXGE_OK)
goto fail;
!= NXGE_OK)
goto fail;
!= NXGE_OK)
goto fail;
/* Enable Tx and Rx LEDs to be driven by traffic */
goto fail;
goto fail;
NXGE_DELAY(1000000);
/* Set BCM8704 Internal Loopback mode if necessary */
goto fail;
else
goto fail;
goto fail;
"BCM8704 port<%d> Dev 1 Reg 0xA = 0x%x\n",
goto fail;
"BCM8704 port<%d> Dev 3 Reg 0x20 = 0x%x\n",
goto fail;
"BCM8704 port<%d> Dev 4 Reg 0x18 = 0x%x\n",
#ifdef NXGE_DEBUG
/* Diagnose link issue if link is not up */
&val);
goto fail;
&val);
goto fail;
&val1);
goto fail;
&val1);
goto fail;
if (val != 0x3FC) {
"Cable not connected to peer or bad"
" cable on port<%d>\n", portn));
} else if (val == 0x639C) {
"Optical module (XFP) is bad or absence"
" on port<%d>\n", portn));
}
}
#endif
break;
case PORT_10G_COPPER:
break;
case PORT_1G_FIBER:
case PORT_1G_COPPER:
/* Set Clause 22 */
/* Set capability flags */
goto fail;
break;
default:
goto fail;
}
return (NXGE_OK);
fail:
"nxge_xcvr_init: failed to initialize transceiver for port<%d>",
portn));
return (status);
}
/* Initialize the TxMAC sub-block */
{
portn));
/* Set Max and Min Frame Size */
} else {
}
if (rs != NPI_SUCCESS)
goto fail;
else
if (portt == PORT_TYPE_XMAC) {
0)) != NPI_SUCCESS)
goto fail;
if ((portmode == PORT_10G_FIBER) ||
(portmode == PORT_10G_COPPER)) {
if (rs != NPI_SUCCESS)
goto fail;
} else {
if (rs != NPI_SUCCESS)
goto fail;
}
goto fail;
!= NPI_SUCCESS)
goto fail;
} else {
0)) != NPI_SUCCESS)
goto fail;
rs);
if (rs != NPI_SUCCESS)
goto fail;
if (rs != NPI_SUCCESS)
goto fail;
goto fail;
}
portn));
return (NXGE_OK);
fail:
"nxge_tx_mac_init: failed to initialize port<%d> TXMAC",
portn));
return (NXGE_ERROR | rs);
}
/* Initialize the RxMAC sub-block */
{
uint32_t i;
portn));
rs);
if (rs != NPI_SUCCESS)
goto fail;
if (rs != NPI_SUCCESS)
goto fail;
if (rs != NPI_SUCCESS)
goto fail;
/*
* Load the multicast hash filter bits.
*/
for (i = 0; i < MAC_MAX_HASH_ENTRY; i++) {
if (hash_filter != NULL) {
(NMCFILTER_REGS - 1) - i];
} else {
hashtab_e = 0;
}
goto fail;
}
if (portt == PORT_TYPE_XMAC) {
0)) != NPI_SUCCESS)
goto fail;
(void) nxge_fflp_init_hostinfo(nxgep);
xconfig)) != NPI_SUCCESS)
goto fail;
/* Comparison of mac unique address is always enabled on XMAC */
!= NPI_SUCCESS)
goto fail;
} else {
(void) nxge_fflp_init_hostinfo(nxgep);
0) != NPI_SUCCESS)
goto fail;
bconfig)) != NPI_SUCCESS)
goto fail;
/* Always enable comparison of mac unique address */
!= NPI_SUCCESS)
goto fail;
}
portn));
return (NXGE_OK);
fail:
"nxge_rx_mac_init: Failed to Initialize port<%d> RxMAC",
portn));
return (NXGE_ERROR | rs);
}
/* Enable TXMAC */
{
goto fail;
/* based on speed */
CFG_XMAC_TX)) != NPI_SUCCESS)
goto fail;
} else {
CFG_BMAC_TX)) != NPI_SUCCESS)
goto fail;
}
return (NXGE_OK);
fail:
"nxgep_tx_mac_enable: Failed to enable port<%d> TxMAC",
if (rs != NPI_SUCCESS)
return (NXGE_ERROR | rs);
else
return (status);
}
/* Disable TXMAC */
{
goto fail;
} else {
goto fail;
}
return (NXGE_OK);
fail:
"nxge_tx_mac_disable: Failed to disable port<%d> TxMAC",
return (NXGE_ERROR | rs);
}
/* Enable RXMAC */
{
portn));
goto fail;
CFG_XMAC_RX)) != NPI_SUCCESS)
goto fail;
} else {
CFG_BMAC_RX)) != NPI_SUCCESS)
goto fail;
}
portn));
return (NXGE_OK);
fail:
"nxgep_rx_mac_enable: Failed to enable port<%d> RxMAC",
portn));
if (rs != NPI_SUCCESS)
return (NXGE_ERROR | rs);
else
return (status);
}
/* Disable RXMAC */
{
portn));
CFG_XMAC_RX)) != NPI_SUCCESS)
goto fail;
} else {
CFG_BMAC_RX)) != NPI_SUCCESS)
goto fail;
}
portn));
return (NXGE_OK);
fail:
"nxgep_rx_mac_disable: ",
"Failed to disable port<%d> RxMAC",
portn));
return (NXGE_ERROR | rs);
}
/* Reset TXMAC */
{
portn));
!= NPI_SUCCESS)
goto fail;
} else {
!= NPI_SUCCESS)
goto fail;
}
portn));
return (NXGE_OK);
fail:
"nxge_tx_mac_reset: Failed to Reset TxMAC port<%d>",
portn));
return (NXGE_ERROR | rs);
}
/* Reset RXMAC */
{
portn));
!= NPI_SUCCESS)
goto fail;
} else {
!= NPI_SUCCESS)
goto fail;
}
portn));
return (NXGE_OK);
fail:
"nxge_rx_mac_reset: Failed to Reset RxMAC port<%d>",
portn));
return (NXGE_ERROR | rs);
}
{
if (enable == LINK_INTR_START) {
if (portmode == PORT_10G_FIBER) {
if ((rs = npi_xmac_xpcs_link_intr_enable(
portn)) != NPI_SUCCESS)
goto fail;
} else if (portmode == PORT_1G_FIBER) {
if ((rs = npi_mac_pcs_link_intr_enable(
portn)) != NPI_SUCCESS)
goto fail;
} else if (portmode == PORT_1G_COPPER) {
if ((rs = npi_mac_mif_link_intr_enable(
goto fail;
} else
goto fail;
} else if (enable == LINK_INTR_STOP) {
if (portmode == PORT_10G_FIBER) {
if ((rs = npi_xmac_xpcs_link_intr_disable(
portn)) != NPI_SUCCESS)
goto fail;
} else if (portmode == PORT_1G_FIBER) {
if ((rs = npi_mac_pcs_link_intr_disable(
portn)) != NPI_SUCCESS)
goto fail;
} else if (portmode == PORT_1G_COPPER) {
if ((rs = npi_mac_mif_link_intr_disable(
portn)) != NPI_SUCCESS)
goto fail;
} else
goto fail;
}
return (NXGE_OK);
fail:
"nxge_link_intr: Failed to set port<%d> mif intr mode",
portn));
return (NXGE_ERROR | rs);
}
/* Initialize 1G Fiber / Copper transceiver using Clause 22 */
{
/*
* Reset the transceiver.
*/
delay = 0;
goto fail;
do {
drv_usecwait(500);
!= NXGE_OK)
goto fail;
delay++;
if (delay == 1000) {
goto fail;
}
goto fail;
/*
* Initialize the xcvr statistics.
*/
/*
* Initialise the xcvr advertised capability statistics.
*/
/*
* Check for extended status just in case we're
* running a Gigibit phy.
*/
!= NXGE_OK)
goto fail;
} else {
}
/*
* Initialize 1G Statistics once the capability is established.
*/
/*
* Initialise the link statistics.
*/
/*
* Switch off Auto-negotiation, 100M and full duplex.
*/
goto fail;
} else {
}
bcm5464r_aux.value = 0;
!= NXGE_OK)
goto fail;
}
"Restarting Auto-negotiation."));
/*
* Setup our Auto-negotiation advertisement register.
*/
}
!= NXGE_OK)
goto fail;
!= NXGE_OK)
goto fail;
}
} else {
!= NXGE_OK)
goto fail;
} else
} else
} else {
} else
}
}
/* BCM5464R 1000mbps external loopback mode */
!= NXGE_OK)
goto fail;
== nxge_lb_ext100) {
/* BCM5464R 100mbps external loopback mode */
== nxge_lb_ext10) {
/* BCM5464R 10mbps external loopback mode */
}
}
}
goto fail;
goto fail;
/*
* Initialize the xcvr status kept in the context structure.
*/
goto fail;
fail:
"<== nxge_mii_xcvr_init status 0x%x", status));
return (status);
}
/* Read from a MII compliant register */
{
goto fail;
goto fail;
} else
goto fail;
"xcvr_reg<%d> value=0x%x",
return (NXGE_OK);
fail:
"nxge_mii_read: Failed to read mii on xcvr %d",
xcvr_portn));
return (NXGE_ERROR | rs);
}
/* Write to a MII compliant Register */
{
value));
goto fail;
goto fail;
} else
goto fail;
return (NXGE_OK);
fail:
"nxge_mii_write: Failed to write mii on xcvr %d",
xcvr_portn));
return (NXGE_ERROR | rs);
}
/* Perform read from Clause45 serdes / transceiver device */
{
xcvr_portn));
goto fail;
xcvr_portn));
return (NXGE_OK);
fail:
"nxge_mdio_read: Failed to read mdio on xcvr %d",
xcvr_portn));
return (NXGE_ERROR | rs);
}
/* Perform write to Clause45 serdes / transceiver device */
{
xcvr_portn));
goto fail;
xcvr_portn));
return (NXGE_OK);
fail:
"nxge_mdio_write: Failed to write mdio on xcvr %d",
xcvr_portn));
return (NXGE_ERROR | rs);
}
/* Check MII to see if there is any link status change */
{
} else {
"Link down cable problem"));
*link_up = LINK_IS_DOWN;
}
}
else
}
}
} else
goto fail;
goto fail;
goto fail;
!= NXGE_OK)
goto fail;
} else if (
}
}
} else {
goto fail;
}
}
== 1))
= 0;
else
= 1;
else
}
}
*link_up = LINK_IS_UP;
}
if (nxgep->link_notify) {
}
return (NXGE_OK);
fail:
"nxge_mii_check: Unable to check MII"));
return (status);
}
/* Add a multicast address entry into the HW hash table */
{
uint_t j;
"Allocating hash filter storage."));
KM_SLEEP);
}
j = mchash / HASH_REG_WIDTH;
}
if (rx_init) {
goto fail;
goto fail;
}
return (NXGE_OK);
fail:
"Unable to add multicast address"));
return (status);
}
/* Remove a multicast address entry from the HW hash table */
{
uint_t j;
"Hash filter already de_allocated."));
return (NXGE_OK);
}
j = mchash / HASH_REG_WIDTH;
}
if (hash_filter->hash_ref_cnt == 0) {
"De-allocating hash filter storage."));
}
if (rx_init) {
goto fail;
goto fail;
}
return (NXGE_OK);
fail:
"Unable to remove multicast address"));
return (status);
}
/* Set MAC address into MAC address HW registers */
{
/*
* Exit if the address is same as ouraddr or multicast or broadcast
*/
goto nxge_set_mac_addr_exit;
}
/*
* Set new interface local address and re-init device.
* This is destructive to any other streams attached
* to this device.
*/
goto fail;
goto fail;
goto nxge_set_mac_addr_end;
return (NXGE_OK);
fail:
"Unable to set mac address"));
return (status);
}
/* Check status of MII (MIF or PCS) link */
{
portn));
goto nxge_check_mii_link_exit;
goto fail;
goto fail;
goto fail;
}
}
/* Workaround for link down issue */
goto nxge_check_mii_link_exit;
}
!= NXGE_OK)
goto fail;
if (link_up == LINK_IS_UP) {
} else if (link_up == LINK_IS_DOWN) {
}
portn));
return (NXGE_OK);
fail:
"nxge_check_mii_link: Failed to check link port<%d>",
portn));
return (status);
}
/*ARGSUSED*/
{
portn));
goto fail;
if (link_up) {
if (nxgep->link_notify ||
goto fail;
}
} else {
if (nxgep->link_notify ||
goto fail;
"Link down cable problem"));
}
}
portn));
return (NXGE_OK);
fail:
"nxge_check_10g_link: Failed to check link port<%d>",
portn));
return (status);
}
/* Declare link down */
void
{
}
/* Declare link up */
void
{
(void) nxge_xif_init(nxgep);
/* Clean up symbol errors incurred during link transition */
}
}
/*
* Calculate the bit in the multicast address filter
* that selects the given * address.
* Note: For GEM, the last 8-bits are used.
*/
{
uint32_t c;
int byte;
int bit;
else
c >>= 1;
}
}
}
/* Reset serdes */
{
drv_usecwait(500);
return (NXGE_OK);
}
/* Monitor link status using interrupt or polling */
{
/*
* Make sure that we don't check the link if this happen to
* be not port0 or 1 and it is not BMAC port.
*/
return (NXGE_OK);
/* stats has not been allocated. */
return (NXGE_OK);
}
/* Don't check link if we're not in internal loopback mode */
return (NXGE_OK);
"==> nxge_link_monitor port<%d> enable=%d",
if (enable == LINK_MONITOR_START) {
!= NXGE_OK)
goto fail;
} else {
case PORT_10G_FIBER:
break;
case PORT_1G_COPPER:
case PORT_1G_FIBER:
break;
default:
;
}
}
} else {
!= NXGE_OK)
goto fail;
} else {
if (nxgep->nxge_link_poll_timerid != 0) {
nxgep->nxge_link_poll_timerid = 0;
}
}
}
"<== nxge_link_monitor port<%d> enable=%d",
return (NXGE_OK);
fail:
return (status);
}
/* Set promiscous mode */
{
"==> nxge_set_promisc: on %d", on));
goto fail;
}
goto fail;
}
if (on)
else
return (NXGE_OK);
fail:
"Unable to set promisc (%d)", on));
return (status);
}
/*ARGSUSED*/
{
#ifdef NXGE_DEBUG
#endif
#if NXGE_MIF
#endif
#ifdef NXGE_MIF
}
#endif
return (DDI_INTR_CLAIMED);
return (DDI_INTR_UNCLAIMED);
}
/*ARGSUSED*/
{
}
/*
* This interrupt handler is for a specific
* mac port.
*/
"==> nxge_mac_intr: reading mac stats: port<%d>", portn));
(xmac_tx_iconfig_t *)&status);
if (rs != NPI_SUCCESS)
goto npi_fail;
if (status & ICFG_XMAC_TX_ALL) {
if (status & ICFG_XMAC_TX_UNDERRUN) {
}
if (status & ICFG_XMAC_TX_MAX_PACKET_ERR) {
}
if (status & ICFG_XMAC_TX_OVERFLOW) {
}
if (status & ICFG_XMAC_TX_FIFO_XFR_ERR) {
}
if (status & ICFG_XMAC_TX_BYTE_CNT_EXP) {
}
if (status & ICFG_XMAC_TX_FRAME_CNT_EXP) {
}
}
(xmac_rx_iconfig_t *)&status);
if (rs != NPI_SUCCESS)
goto npi_fail;
if (status & ICFG_XMAC_RX_ALL) {
if (status & ICFG_XMAC_RX_OVERFLOW)
if (status & ICFG_XMAC_RX_UNDERFLOW) {
}
if (status & ICFG_XMAC_RX_CRC_ERR_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_LEN_ERR_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_VIOL_ERR_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_OCT_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_HST_CNT1_EXP) {
}
if (status & ICFG_XMAC_RX_HST_CNT2_EXP) {
}
if (status & ICFG_XMAC_RX_HST_CNT3_EXP) {
}
if (status & ICFG_XMAC_RX_HST_CNT4_EXP) {
}
if (status & ICFG_XMAC_RX_HST_CNT5_EXP) {
}
if (status & ICFG_XMAC_RX_HST_CNT6_EXP) {
}
if (status & ICFG_XMAC_RX_BCAST_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_MCAST_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_FRAG_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_ALIGNERR_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_LINK_FLT_CNT_EXP) {
}
if (status & ICFG_XMAC_RX_REMOTE_FLT_DET) {
}
if (status & ICFG_XMAC_RX_LOCAL_FLT_DET) {
}
}
(xmac_ctl_iconfig_t *)&status);
if (rs != NPI_SUCCESS)
goto npi_fail;
if (status & ICFG_XMAC_CTRL_ALL) {
if (status & ICFG_XMAC_CTRL_PAUSE_RCVD)
if (status & ICFG_XMAC_CTRL_PAUSE_STATE)
}
(bmac_tx_iconfig_t *)&status);
if (rs != NPI_SUCCESS)
goto npi_fail;
if (status & ICFG_BMAC_TX_ALL) {
if (status & ICFG_BMAC_TX_UNDERFLOW) {
}
if (status & ICFG_BMAC_TX_MAXPKTSZ_ERR) {
}
if (status & ICFG_BMAC_TX_BYTE_CNT_EXP) {
}
if (status & ICFG_BMAC_TX_FRAME_CNT_EXP) {
}
}
(bmac_rx_iconfig_t *)&status);
if (rs != NPI_SUCCESS)
goto npi_fail;
if (status & ICFG_BMAC_RX_ALL) {
if (status & ICFG_BMAC_RX_OVERFLOW) {
}
if (status & ICFG_BMAC_RX_FRAME_CNT_EXP) {
}
if (status & ICFG_BMAC_RX_CRC_ERR_CNT_EXP) {
}
if (status & ICFG_BMAC_RX_LEN_ERR_CNT_EXP) {
}
}
if (status & ICFG_BMAC_RX_BYTE_CNT_EXP) {
}
if (status & ICFG_BMAC_RX_ALIGNERR_CNT_EXP) {
}
(bmac_ctl_iconfig_t *)&status);
if (rs != NPI_SUCCESS)
goto npi_fail;
if (status & ICFG_BMAC_CTL_ALL) {
if (status & ICFG_BMAC_CTL_RCVPAUSE)
if (status & ICFG_BMAC_CTL_INPAUSE_ST)
}
}
}
return (DDI_INTR_CLAIMED);
return (DDI_INTR_UNCLAIMED);
}
{
#ifdef NXGE_DEBUG_SYMBOL_ERR
#endif
#ifdef NXGE_DEBUG_SYMBOL_ERR
/* Check Device 3 Register Device 3 0xC809 */
if ((val_debug & ~0x200) != 0) {
&val_debug);
}
if (val != 0)
if (val != 0)
if (val != 0)
#endif
/* Check from BCM8704 if 10G link is up or down */
/* Check Device 1 Register 0xA bit0 */
&val1);
goto fail;
/* Check Device 3 Register 0x20 bit0 */
&val2)) != NPI_SUCCESS)
goto fail;
/* Check Device 4 Register 0x18 bit12 */
&val3);
goto fail;
#ifdef NXGE_DEBUG_ALIGN_ERR
/* Temp workaround for link down issue */
if (pcs_blk_lock == B_FALSE) {
if (val2 != 0x4) {
"!LINK DEBUG: port%d PHY Dev3 "
"Reg 0x20 = 0x%x\n",
}
}
if (link_align == B_FALSE) {
if (val3 != 0x140f) {
link_align = B_TRUE;
"!LINK DEBUG: port%d PHY Dev4 "
"Reg 0x18 = 0x%x\n",
}
}
"!LINK DEBUG: port %d Dev3 or Dev4 read zero\n",
}
}
#endif
return (NXGE_OK);
fail:
return (status);
}
{
char *phy_type;
char *prop_val;
"10G Fiber Xcvr"));
"1G Copper Xcvr"));
"1G Fiber Xcvr"));
"10G Copper Xcvr"));
} else {
"Unknown phy-type: %s", prop_val));
return (NXGE_ERROR);
}
(void) ddi_prop_update_string(DDI_DEV_T_NONE,
return (status);
} else {
"Exiting...phy-type property not found"));
return (NXGE_ERROR);
}
}
/*
* read the phy type from the SEEPROM - NCR registers
*/
"[%s] invalid...please update",
return (status);
}
"Reading phy type from expansion ROM"));
/*
* Try to read the phy type from the vpd data read off the
* expansion ROM.
*/
} else {
"nxge_get_xcvr_type: Unknown phy type [%c%c%c] in EEPROM",
/*
* read the phy type from the SEEPROM - NCR registers
*/
"[%s] invalid...please update",
}
return (status);
}
{
!= NPI_SUCCESS)
return (NXGE_ERROR);
else
return (NXGE_OK);
}
{
!= NPI_SUCCESS)
return (NXGE_ERROR);
else
return (NXGE_OK);
}
{
return (B_FALSE);
else
return (B_TRUE);
}