mr_sas.c revision a3db1ba6847706f55b646f53f6bceb2bf8e468e5
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * mr_sas.c: source for mr_sas driver
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * MegaRAID device driver for SAS2.0 controllers
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * Copyright (c) 2008-2010, LSI Logic Corporation.
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * All rights reserved.
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * Arun Chandrashekhar
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * Rajesh Prabhakaran
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * Seokmann Ju
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * Redistribution and use in source and binary forms, with or without
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * modification, are permitted provided that the following conditions are met:
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * 1. Redistributions of source code must retain the above copyright notice,
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * this list of conditions and the following disclaimer.
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * 2. Redistributions in binary form must reproduce the above copyright notice,
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * this list of conditions and the following disclaimer in the documentation
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * and/or other materials provided with the distribution.
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * 3. Neither the name of the author nor the names of its contributors may be
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * used to endorse or promote products derived from this software without
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * specific prior written permission.
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
7b77b0178ffc12e4b7f782b15747abb8ece8a563jimand * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * FMA header files
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * Local static data
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsenstatic volatile boolean_t mrsas_relaxed_ordering = B_TRUE;
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen/* Default Timeout value to issue online controller reset */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen/* Simulate consecutive firmware fault */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsenstatic volatile int debug_fw_faults_after_ocr_g = 0;
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen/* Simulate three consecutive timeout for an IO */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsenstatic volatile int debug_consecutive_timeout_after_ocr_g = 0;
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen 0, /* low DMA address range */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen 0 /* bus specific DMA flags */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * cb_ops contains base level routines
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen 0, /* streamtab */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * dev_ops contains configuration routines
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen 0, /* refcnt */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen#else /* __sparc */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen#endif /* __sparc */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen#else /* __sparc */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen#endif /* __sparc */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * ************************************************************************** *
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * common entry points - for loadable kernel modules *
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * ************************************************************************** *
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen sizeof (struct mrsas_instance), 0);
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen con_log(CL_ANN, (CE_WARN, "mr_sas: could not init state"));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen if ((ret = scsi_hba_init(&modlinkage)) != DDI_SUCCESS) {
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen con_log(CL_ANN, (CE_WARN, "mr_sas: could not init scsi hba"));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen con_log(CL_ANN, (CE_WARN, "mr_sas: mod_install failed"));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS)
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * ************************************************************************** *
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * common entry points - for autoconfiguration *
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * ************************************************************************** *
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen /* CONSTCOND */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen * check to see whether this device is in a DMA-capable slot.
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen "mr_sas%d: Device in slave-only slot, unused",
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen con_log(CL_DLEVEL1, (CE_NOTE, "mr_sas: DDI_ATTACH"));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen /* allocate the soft state for the instance */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen if (ddi_soft_state_zalloc(mrsas_state, instance_no)
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen "mr_sas%d: Failed to allocate soft state",
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen instance = (struct mrsas_instance *)ddi_get_soft_state
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen sizeof (struct mrsas_instance));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen /* Setup the PCI configuration space handles */
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen if (pci_config_setup(dip, &instance->pci_handle) !=
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen "mr_sas%d: pci config setup failed ",
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen sizeof (struct mrsas_func_ptr));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen "mr_sas: failed to get registers."));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen sizeof (struct mrsas_func_ptr));
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen "0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s",
09fe1b16b0d85a4b43987628152f516df3ae9838dnielsen /* enable bus-mastering */
sizeof (struct mrsas_func_ptr));
return (DDI_FAILURE);
return (DDI_FAILURE);
!= DDI_SUCCESS) {
goto fail_attach;
msi_enable = 0;
msi_enable));
msi_enable));
goto fail_attach;
intr_types));
goto fail_attach;
goto fail_attach;
msi_enable = 0;
goto fail_attach;
goto fail_attach;
ctio_enable = 0;
ctio_enable));
ctio_enable));
goto fail_attach;
DDI_SUCCESS) {
goto fail_attach;
goto fail_attach;
!= DDI_SUCCESS) {
goto fail_attach;
goto fail_attach;
DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
DDI_FAILURE) {
goto fail_attach;
goto fail_attach;
goto fail_attach;
goto fail_initiate_aen;
DDI_SUCCESS) {
goto fail_attach;
DDI_SUCCESS) {
goto fail_attach;
KM_SLEEP);
case DDI_PM_RESUME:
case DDI_RESUME:
return (DDI_FAILURE);
return (DDI_SUCCESS);
if (create_devctl_node_f) {
if (create_scsi_node_f) {
if (create_ioc_node_f) {
if (tran_alloc_f) {
if (added_soft_isr_f) {
if (added_isr_f) {
return (DDI_FAILURE);
int rval;
switch (cmd) {
case DDI_INFO_DEVT2DEVINFO:
case DDI_INFO_DEVT2INSTANCE:
return (rval);
int instance_no;
if (!instance) {
instance_no));
return (DDI_FAILURE);
switch (cmd) {
case DDI_DETACH:
instance_no));
return (DDI_FAILURE);
return (DDI_FAILURE);
* sizeof (struct mrsas_ld));
sizeof (struct mrsas_func_ptr));
case DDI_PM_SUSPEND:
case DDI_SUSPEND:
return (DDI_FAILURE);
return (DDI_SUCCESS);
int rval = 0;
return (EPERM);
return (EINVAL);
== NULL) {
return (ENXIO);
if (scsi_hba_open) {
return (rval);
int rval = 0;
if (scsi_hba_close) {
return (rval);
int *rvalp)
int rval = 0;
return (ENXIO);
KM_SLEEP);
case MRSAS_IOCTL_FIRMWARE:
return (EFAULT);
case MRSAS_IOCTL_AEN:
return (EFAULT);
return (rval);
#ifdef __sparc
int instance_no;
if (!instance) {
return (DDI_FAILURE);
instance_no));
return (DDI_SUCCESS);
int instance_no;
if (!instance) {
return (DDI_FAILURE);
return (DDI_FAILURE);
instance_no));
return (DDI_FAILURE);
return (DDI_SUCCESS);
return (DDI_FAILURE);
return (DDI_SUCCESS);
static dev_info_t *
DDI_SUCCESS) {
(void *)child));
return (child);
return (DDI_FAILURE);
return (DDI_FAILURE);
return (DDI_SUCCESS);
static struct scsi_pkt *
return (NULL);
/* step #2 : dma allocation/move */
if (new_pkt) {
return (pkt);
if (pkt) {
return (TRAN_FATAL_ERROR);
return (TRAN_BUSY);
if (cmd_done) {
return (TRAN_ACCEPT);
return (TRAN_BUSY);
return (TRAN_BUSY);
case MFI_STAT_OK:
return (TRAN_ACCEPT);
return (DDI_FAILURE);
return (DDI_FAILURE);
int rval = 0;
case SCSI_CAP_DMA_MAX:
case SCSI_CAP_MSG_OUT:
case SCSI_CAP_DISCONNECT:
rval = 0;
case SCSI_CAP_SYNCHRONOUS:
rval = 0;
case SCSI_CAP_WIDE_XFER:
case SCSI_CAP_TAGGED_QING:
case SCSI_CAP_UNTAGGED_QING:
case SCSI_CAP_PARITY:
case SCSI_CAP_INITIATOR_ID:
case SCSI_CAP_ARQ:
case SCSI_CAP_LINKED_CMDS:
rval = 0;
case SCSI_CAP_GEOMETRY:
return (rval);
case SCSI_CAP_DMA_MAX:
case SCSI_CAP_MSG_OUT:
case SCSI_CAP_PARITY:
case SCSI_CAP_LINKED_CMDS:
case SCSI_CAP_DISCONNECT:
case SCSI_CAP_SYNCHRONOUS:
case SCSI_CAP_UNTAGGED_QING:
case SCSI_CAP_WIDE_XFER:
case SCSI_CAP_INITIATOR_ID:
case SCSI_CAP_ARQ:
case SCSI_CAP_TAGGED_QING:
case SCSI_CAP_SECTOR_SIZE:
case SCSI_CAP_TOTAL_SECTORS:
return (rval);
static uint_t
int need_softintr;
return (DDI_INTR_UNCLAIMED);
0, 0, DDI_DMA_SYNC_FORCPU);
!= DDI_SUCCESS) {
return (DDI_INTR_CLAIMED);
return (DDI_INTR_CLAIMED);
#ifdef OCRDEBUG
return (DDI_INTR_CLAIMED);
return (DDI_INTR_CLAIMED);
if (hdr) {
if (pkt) {
consumer++;
consumer = 0;
0, 0, DDI_DMA_SYNC_FORDEV);
need_softintr = 0;
if (need_softintr) {
return (DDI_INTR_CLAIMED);
static struct mrsas_cmd *
return (cmd);
static struct mrsas_cmd *
return (cmd);
if (hdr) {
gethrtime()));
if (pkt) {
gethrtime()));
while (flag) {
flag = 0;
if (cmd) {
if (hdr) {
(unsigned int)debug_timeout_g;
(void *)hdr));
if (pkt) {
(void *)pkt));
return (DDI_SUCCESS);
if (cmd) {
= CMD_DEV_GONE;
= STAT_DISCON;
return (DDI_SUCCESS);
if (cmd) {
return (DDI_FAILURE);
if (pkt) {
(void *)pkt,
gethrtime()));
return (DDI_SUCCESS);
int cookie_cnt;
return (DDI_FAILURE);
return (ENOMEM);
return (DDI_SUCCESS);
return (DDI_FAILURE);
return (DDI_FAILURE);
sizeof (struct mrsas_evt_detail));
return (DDI_SUCCESS);
sizeof (struct mrsas_cmd));
KM_SLEEP);
return (DDI_FAILURE);
return (DDI_FAILURE);
return (DDI_SUCCESS);
int ret = 0;
if (!cmd) {
return (DDI_FAILURE);
if (!ci) {
return (DDI_FAILURE);
sizeof (struct mrsas_ctrl_info));
sizeof (struct mrsas_ctrl_info));
ret = 0;
return (ret);
int ret = 0;
if (!cmd) {
return (DDI_FAILURE);
ret = 0;
return (ret);
goto fail_ready_state;
goto fail_alloc_fw_space;
sizeof (struct mrsas_init_queue_info));
goto fail_fw_init;
goto fail_fw_init;
if (ctio_enable &&
return (DDI_SUCCESS);
return (DDI_FAILURE);
if (!cmd) {
return (DDI_FAILURE);
sizeof (struct mrsas_init_queue_info));
return (DDI_FAILURE);
return (DDI_SUCCESS);
fw_state =
switch (fw_state) {
case MFI_STATE_FAULT:
return (ENODEV);
case MFI_STATE_WAIT_HANDSHAKE:
case MFI_STATE_OPERATIONAL:
case MFI_STATE_UNDEFINED:
case MFI_STATE_BB_INIT:
case MFI_STATE_FW_INIT:
case MFI_STATE_DEVICE_SCAN:
return (ENODEV);
return (ENODEV);
return (ENODEV);
return (DDI_SUCCESS);
if (!cmd) {
return (ENOMEM);
return (DDI_FAILURE);
sizeof (struct mrsas_evt_log_info));
sizeof (struct mrsas_evt_log_info));
sizeof (struct mrsas_evt_log_info));
return (ret);
int ret = 0;
if (ret) {
return (ret);
if (!cmd) {
int rval = 0;
int tgt = 0;
case MR_EVT_CFG_CLEARED: {
case MR_EVT_LD_DELETED: {
case MR_EVT_LD_CREATED: {
seq_num++;
sizeof (struct mrsas_evt_detail));
(void *)cmd));
static uint32_t
return (ADAPTER_RESET_NOT_REQUIRED);
return (ADAPTER_RESET_REQUIRED);
return (ADAPTER_RESET_NOT_REQUIRED);
static uint_t
return (DDI_INTR_CLAIMED);
0, 0, DDI_DMA_SYNC_FORCPU);
DDI_SUCCESS) {
return (DDI_INTR_CLAIMED);
case MFI_CMD_OP_PD_SCSI:
case MFI_CMD_OP_LD_SCSI:
case MFI_CMD_OP_LD_READ:
case MFI_CMD_OP_LD_WRITE:
DTYPE_DIRECT) {
case MFI_STAT_OK:
((struct scsi_status *)
(uint8_t *)
case MFI_STAT_LD_OFFLINE:
((struct scsi_status *)
case MFI_CMD_OP_SMP:
case MFI_CMD_OP_STP:
case MFI_CMD_OP_DCMD:
case MFI_CMD_OP_ABORT:
gethrtime()));
return (DDI_INTR_CLAIMED);
if (i != DDI_SUCCESS) {
case DDI_DMA_BADATTR :
case DDI_DMA_NORESOURCES :
return (cookie_cnt);
return (DDI_FAILURE);
return (DDI_FAILURE);
return (DDI_SUCCESS);
int dma_flags;
case DDI_DMA_BADATTR:
return (DDI_FAILURE);
case DDI_DMA_NORESOURCES:
return (DDI_FAILURE);
return (DDI_FAILURE);
case DDI_DMA_PARTIAL_MAP:
goto no_dma_cookies;
DDI_FAILURE) {
goto no_dma_cookies;
DDI_FAILURE) {
goto no_dma_cookies;
goto get_dma_cookies;
case DDI_DMA_MAPPED:
return (DDI_SUCCESS);
case DDI_DMA_NORESOURCES:
case DDI_DMA_NOMAPPING:
case DDI_DMA_TOOBIG:
case DDI_DMA_INUSE:
return (DDI_FAILURE);
return (DDI_SUCCESS);
return (DDI_FAILURE);
DDI_FAILURE) {
return (DDI_FAILURE);
return (DDI_SUCCESS);
static struct mrsas_cmd *
uint32_t i;
*cmd_done = 0;
return (NULL);
case SCMD_READ:
case SCMD_WRITE:
case SCMD_READ_G1:
case SCMD_WRITE_G1:
case SCMD_MODE_SENSE:
case SCMD_MODE_SENSE_G1: {
switch (page_code) {
return (NULL);
#ifdef lint
return (cmd);
#ifndef __sparc
for (i = 0; i < wait_time; i++) {
void *ubuf;
return (DDI_FAILURE);
#ifdef _ILP32
if (xferlen) {
return (DDI_FAILURE);
for (i = 0; i < xferlen; i++) {
return (DDI_FAILURE);
for (i = 0; i < xferlen; i++) {
if (ddi_copyout(
return (DDI_FAILURE);
if (xferlen) {
return (DDI_FAILURE);
return (DDI_SUCCESS);
void *ubuf;
return (DDI_FAILURE);
#ifdef _ILP32
if (xferlen) {
return (DDI_FAILURE);
for (i = 0; i < xferlen; i++) {
return (DDI_FAILURE);
for (i = 0; i < xferlen; i++) {
if (ddi_copyout(
return (DDI_FAILURE);
if (xferlen) {
return (DDI_FAILURE);
return (DDI_SUCCESS);
void *request_ubuf;
void *response_ubuf;
#ifndef _ILP32
return (DDI_FAILURE);
#ifdef _ILP32
if (request_xferlen) {
return (DDI_FAILURE);
for (i = 0; i < request_xferlen; i++) {
return (DDI_FAILURE);
if (response_xferlen) {
return (DDI_FAILURE);
for (i = 0; i < response_xferlen; i++) {
return (DDI_FAILURE);
sizeof (uint64_t));
#ifdef _ILP32
if (request_xferlen) {
for (i = 0; i < request_xferlen; i++) {
if (ddi_copyout(
return (DDI_FAILURE);
if (response_xferlen) {
for (i = 0; i < response_xferlen; i++) {
if (ddi_copyout(
return (DDI_FAILURE);
if (request_xferlen) {
return (DDI_FAILURE);
if (response_xferlen) {
return (DDI_FAILURE);
return (DDI_SUCCESS);
void *fis_ubuf;
void *data_ubuf;
return (DDI_FAILURE);
#ifdef _ILP32
if (fis_xferlen) {
return (DDI_FAILURE);
for (i = 0; i < fis_xferlen; i++) {
return (DDI_FAILURE);
if (data_xferlen) {
return (DDI_FAILURE);
for (i = 0; i < data_xferlen; i++) {
return (DDI_FAILURE);
if (fis_xferlen) {
for (i = 0; i < fis_xferlen; i++) {
if (ddi_copyout(
return (DDI_FAILURE);
if (data_xferlen) {
for (i = 0; i < data_xferlen; i++) {
if (ddi_copyout(
return (DDI_FAILURE);
if (fis_xferlen) {
return (DDI_FAILURE);
if (data_xferlen) {
return (DDI_FAILURE);
return (DDI_SUCCESS);
int mode)
void *ubuf;
#ifdef _ILP32
for (i = 0; i < (sizeof (struct mrsas_pci_information) -
pci_conf_buf[i] =
return (rval);
int mode)
if (!cmd) {
return (DDI_FAILURE);
case MFI_CMD_OP_DCMD:
case MFI_CMD_OP_SMP:
case MFI_CMD_OP_STP:
case MFI_CMD_OP_LD_SCSI:
case MFI_CMD_OP_PD_SCSI:
return (rval);
int rval = 0;
return (rval);
int ret_val;
if (aen_cmd) {
if (ret_val) {
return (ret_val);
if (!cmd) {
return (ENOMEM);
sizeof (struct mrsas_evt_detail));
sizeof (struct mrsas_evt_detail));
sizeof (struct mrsas_evt_detail));
int len;
const char *const scsi_device_types[] = {
len = 0;
scsi_inq[i]);
scsi_inq[i]);
scsi_inq[i]);
int time = 0;
int counter = 0;
if (time <= 0) {
(void *)cmd));
counter++;
if (counter) {
(void *)cmd));
if (pkt) {
if (pkt) {
gethrtime()));
return (DDI_SUCCESS);
return (DDI_SUCCESS);
return (DDI_FAILURE);
for (i = 0; i < msecs && (
== MFI_CMD_STATUS_POLL_MODE); i++) {
== MFI_CMD_STATUS_POLL_MODE) {
return (DDI_FAILURE);
return (DDI_SUCCESS);
#ifdef lint
return (ret);
return (ret);
return (DDI_FAILURE);
return (DDI_SUCCESS);
return (DDI_FAILURE);
return (DDI_FAILURE);
return (DDI_FAILURE);
#ifdef OCRDEBUG
< MAX_FW_RESET_COUNT) {
goto retry_reset;
return (DDI_FAILURE);
return (DDI_SUCCESS);
DDI_SUCCESS) {
!= DDI_SUCCESS) {
DDI_SUCCESS) {
return (ret);
return (DDI_FAILURE);
return (DDI_FAILURE);
intr_type));
return (DDI_FAILURE);
return (DDI_FAILURE);
return (DDI_FAILURE);
for (i = 0; i < actual; i++) {
return (DDI_FAILURE);
for (i = 0; i < actual; i++) {
return (DDI_FAILURE);
for (i = 0; i < actual; i++) {
for (i = 0; i < actual; i++) {
return (DDI_FAILURE);
ret));
for (i = 0; i < actual; i++) {
(void) ddi_intr_remove_handler(
return (DDI_FAILURE);
return (DDI_SUCCESS);
int config;
int rval;
return (NDI_FAILURE);
switch (op) {
case BUS_CONFIG_ONE: {
ptr++;
if (lun == 0) {
case BUS_CONFIG_DRIVER:
case BUS_CONFIG_ALL: {
rval));
return (rval);
return (rval);
char *addr;
long num;
return (DDI_FAILURE);
int rval;
if (ldip) {
return (NDI_SUCCESS);
rval));
return (rval);
int ncompatible = 0;
char *childname;
int rval;
goto finish;
goto finish;
goto finish;
goto finish;
if (dipp) {
return (rval);
return (ENOMEM);
DDI_SUCCESS) {
return (DDI_FAILURE);
return (DDI_SUCCESS);
int circ1 = 0;
char *devname;
case MRSAS_EVT_CONFIG_TGT:
0, NULL);
case MRSAS_EVT_UNCONFIG_TGT:
if (dip) {
return (NULL);
switch (page_code) {
return (NULL);