ixgbe_sw.h revision 5b6dd21f5401160f9a62ac2e76a858c2bc105370
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
*/
/*
*/
#ifndef _IXGBE_SW_H
#define _IXGBE_SW_H
#ifdef __cplusplus
extern "C" {
#endif
#include <sys/mac_provider.h>
#include <sys/mac_ether.h>
#include <sys/ethernet.h>
#include "ixgbe_api.h"
#define IXGBE_FAILURE DDI_FAILURE
#define IXGBE_UNKNOWN 0x00
#define IXGBE_INITIALIZED 0x01
#define IXGBE_STARTED 0x02
#define IXGBE_SUSPENDED 0x04
#define IXGBE_STALL 0x08
#define IXGBE_OVERTEMP 0x20
#define IXGBE_INTR_ADJUST 0x40
#define IXGBE_ERROR 0x80
#define MAX_NUM_UNICAST_ADDRESSES 0x80
#define MAX_NUM_MULTICAST_ADDRESSES 0x1000
#define IXGBE_INTR_NONE 0
#define IXGBE_INTR_MSIX 1
#define IXGBE_INTR_MSI 2
#define IXGBE_INTR_LEGACY 3
#define IXGBE_POLL_NULL -1
#define MAX_COOKIE 18
#define MIN_NUM_TX_DESC 2
#define IXGBE_RX_STOPPED 0x1
#define IXGBE_PKG_BUF_16k 16384
/*
* MAX_xx_QUEUE_NUM and MAX_INTR_VECTOR values need to be the maximum of all
* supported silicon types.
*/
#define MAX_TX_QUEUE_NUM 128
#define MAX_RX_QUEUE_NUM 128
#define MAX_INTR_VECTOR 64
/*
* Maximum values for user configurable parameters
*/
#define MAX_TX_RING_SIZE 4096
#define MAX_RX_RING_SIZE 4096
#define MAX_RX_LIMIT_PER_INTR 4096
#define MAX_RX_COPY_THRESHOLD 9216
#define MAX_TX_COPY_THRESHOLD 9216
/*
* Minimum values for user configurable parameters
*/
#define MIN_TX_RING_SIZE 64
#define MIN_RX_RING_SIZE 64
#define MIN_RX_LIMIT_PER_INTR 16
#define MIN_TX_COPY_THRESHOLD 0
#define MIN_RX_COPY_THRESHOLD 0
/*
* Default values for user configurable parameters
*/
#define DEFAULT_TX_RING_SIZE 1024
#define DEFAULT_RX_RING_SIZE 1024
#define DEFAULT_MTU ETHERMTU
#define DEFAULT_RX_LIMIT_PER_INTR 256
#define DEFAULT_RX_COPY_THRESHOLD 128
#define DEFAULT_TX_COPY_THRESHOLD 512
#define DEFAULT_TX_RESCHED_THRESHOLD 128
#define DEFAULT_FCRTH 0x20000
#define DEFAULT_FCRTL 0x10000
#define DEFAULT_FCPAUSE 0xFFFF
#define DEFAULT_TX_HCKSUM_ENABLE B_TRUE
#define DEFAULT_RX_HCKSUM_ENABLE B_TRUE
#define DEFAULT_LSO_ENABLE B_TRUE
#define DEFAULT_LRO_ENABLE B_FALSE
#define DEFAULT_MR_ENABLE B_TRUE
#define DEFAULT_TX_HEAD_WB_ENABLE B_TRUE
#define DEFAULT_RELAX_ORDER_ENABLE B_TRUE
#define IXGBE_LSO_MAXLEN 65535
#define TX_DRAIN_TIME 200
#define RX_DRAIN_TIME 200
/*
* Extra register bit masks for 82598
*/
#define IXGBE_PCS1GANA_FDC 0x20
#define IXGBE_PCS1GANLP_LPFD 0x20
#define IXGBE_PCS1GANLP_LPHD 0x40
/*
* Defined for IP header alignment.
*/
#define IPHDR_ALIGN_ROOM 2
/*
* Bit flags for attach_progress
*/
#define PROP_DEFAULT_MTU "default_mtu"
#define PROP_FLOW_CONTROL "flow_control"
#define PROP_TX_QUEUE_NUM "tx_queue_number"
#define PROP_TX_RING_SIZE "tx_ring_size"
#define PROP_RX_QUEUE_NUM "rx_queue_number"
#define PROP_RX_RING_SIZE "rx_ring_size"
#define PROP_RX_GROUP_NUM "rx_group_number"
#define PROP_INTR_FORCE "intr_force"
#define PROP_TX_HCKSUM_ENABLE "tx_hcksum_enable"
#define PROP_RX_HCKSUM_ENABLE "rx_hcksum_enable"
#define PROP_LSO_ENABLE "lso_enable"
#define PROP_LRO_ENABLE "lro_enable"
#define PROP_MR_ENABLE "mr_enable"
#define PROP_RELAX_ORDER_ENABLE "relax_order_enable"
#define PROP_TX_HEAD_WB_ENABLE "tx_head_wb_enable"
#define PROP_TX_COPY_THRESHOLD "tx_copy_threshold"
#define PROP_TX_RECYCLE_THRESHOLD "tx_recycle_threshold"
#define PROP_TX_OVERLOAD_THRESHOLD "tx_overload_threshold"
#define PROP_TX_RESCHED_THRESHOLD "tx_resched_threshold"
#define PROP_RX_COPY_THRESHOLD "rx_copy_threshold"
#define PROP_RX_LIMIT_PER_INTR "rx_limit_per_intr"
#define PROP_INTR_THROTTLING "intr_throttling"
#define PROP_FM_CAPABLE "fm_capable"
#define IXGBE_LB_NONE 0
#define IXGBE_LB_EXTERNAL 1
#define IXGBE_LB_INTERNAL_MAC 2
#define IXGBE_LB_INTERNAL_PHY 3
#define IXGBE_LB_INTERNAL_SERDES 4
/*
* capability/feature flags
* Flags named _CAPABLE are set when the NIC hardware is capable of the feature.
* Separately, the flag named _ENABLED is set when the feature is enabled.
*/
/*
* Classification mode
*/
#define IXGBE_CLASSIFY_NONE 0
#define IXGBE_CLASSIFY_RSS 1
#define IXGBE_CLASSIFY_VMDQ 2
#define IXGBE_CLASSIFY_VMDQ_RSS 3
/* adapter-specific info for each supported device type */
typedef struct adapter_info {
/*
* Interrupt throttling is in unit of 256 nsec
*/
/* bits representing all interrupt types other than tx & rx */
#define IXGBE_OTHER_INTR 0x3ff00000
#define IXGBE_82599_OTHER_INTR 0x86100000
enum ioc_reply {
IOC_DONE, /* OK, reply sent */
IOC_ACK, /* OK, just send ACK */
IOC_REPLY /* OK, just send reply */
};
0, 0, (flag)))
/*
* Defined for ring index operations
* ASSERT(index < limit)
* ASSERT(step < limit)
* ASSERT(index1 < limit)
* ASSERT(index2 < limit)
*/
#define LINK_LIST_INIT(_LH) \
#define LIST_POP_HEAD(_LH) \
{ \
} \
}
} else { \
} \
typedef struct single_link {
struct single_link *link;
typedef struct link_list {
} link_list_t;
/*
* Property lookups
*/
DDI_PROP_DONTPASS, (n))
DDI_PROP_DONTPASS, (n), -1)
typedef union ixgbe_ether_addr {
struct {
} reg;
struct {
} mac;
typedef enum {
} tx_type_t;
typedef struct ixgbe_tx_context {
/*
*/
typedef struct sw_desc {
} sw_desc_t;
/*
* Handles and addresses of DMA buffer
*/
typedef struct dma_buffer {
} dma_buffer_t;
/*
* Tx Control Block
*/
typedef struct tx_control_block {
/*
* RX Control Block
*/
typedef struct rx_control_block {
struct ixgbe_rx_data *rx_data;
int lro_next; /* Index of next rcb */
int lro_prev; /* Index of previous rcb */
/*
* Software Data Structure for Tx Ring
*/
typedef struct ixgbe_tx_ring {
/*
* Mutexes
*/
/*
* Tx descriptor ring definitions
*/
union ixgbe_adv_tx_desc *tbd_ring;
/*
* Tx control block list definitions
*/
/*
* and LSO.
*/
/*
* Tx ring settings and status
*/
#ifdef IXGBE_DEBUG
/*
* Debug statistics
*/
#endif
/*
* Pointer to the ixgbe struct
*/
/*
* Software Receive Ring
*/
typedef struct ixgbe_rx_data {
/*
* Rx descriptor ring definitions
*/
/*
* Rx control block list definitions
*/
/*
* Rx sw ring settings and status
*/
/*
* Software Data Structure for Rx Ring
*/
typedef struct ixgbe_rx_ring {
#ifdef IXGBE_DEBUG
/*
* Debug statistics
*/
#endif
/*
* Software Receive Ring Group
*/
typedef struct ixgbe_rx_group {
/*
* structure to map interrupt cleanup to msi-x vector
*/
typedef struct ixgbe_intr_vector {
int rxr_cnt; /* count rx rings */
int txr_cnt; /* count tx rings */
int other_cnt; /* count other interrupt */
/*
* Software adapter state
*/
typedef struct ixgbe {
int instance;
struct ixgbe_osdep osdep;
/*
* Each msi-x vector: map vector to interrupt cleanup
*/
/*
* Receive Rings
*/
/*
* Receive Groups
*/
/*
* Transmit Rings
*/
int fm_capabilities; /* FMA capabilities */
int intr_type;
int intr_cnt;
int intr_cap;
/*
* Kstat definitions
*/
param_pad_to_32:12;
} ixgbe_t;
typedef struct ixgbe_stat {
} ixgbe_stat_t;
/*
* Function prototypes in ixgbe_buf.c
*/
int ixgbe_alloc_dma(ixgbe_t *);
void ixgbe_free_dma(ixgbe_t *);
void ixgbe_set_fma_flags(int);
void ixgbe_free_dma_buffer(dma_buffer_t *);
/*
* Function prototypes in ixgbe_main.c
*/
void ixgbe_enable_watchdog_timer(ixgbe_t *);
void ixgbe_disable_watchdog_timer(ixgbe_t *);
void ixgbe_fm_ereport(ixgbe_t *, char *);
void ixgbe_fill_ring(void *, mac_ring_type_t, const int, const int,
/*
* Function prototypes in ixgbe_gld.c
*/
int ixgbe_m_start(void *);
void ixgbe_m_stop(void *);
int ixgbe_m_promisc(void *, boolean_t);
void ixgbe_m_resources(void *);
void ixgbe_m_propinfo(void *, const char *, mac_prop_id_t,
/*
* Function prototypes in ixgbe_rx.c
*/
mblk_t *ixgbe_ring_rx_poll(void *, int);
/*
* Function prototypes in ixgbe_tx.c
*/
void ixgbe_free_tcb(tx_control_block_t *);
/*
* Function prototypes in ixgbe_log.c
*/
void ixgbe_notice(void *, const char *, ...);
void ixgbe_log(void *, const char *, ...);
void ixgbe_error(void *, const char *, ...);
/*
* Function prototypes in ixgbe_stat.c
*/
int ixgbe_init_stats(ixgbe_t *);
#ifdef __cplusplus
}
#endif
#endif /* _IXGBE_SW_H */