ixgbe_sw.h revision f27d3025d908422c3f6e682964b4f1e2b4834e4a
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * CDDL HEADER START
9da57d7b0ddd8d73b676ce12c040362132cdd538bt *
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Copyright(c) 2007-2008 Intel Corporation. All rights reserved.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The contents of this file are subject to the terms of the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Common Development and Distribution License (the "License").
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * You may not use this file except in compliance with the License.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt *
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * You can obtain a copy of the license at:
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * http://www.opensolaris.org/os/licensing.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * See the License for the specific language governing permissions
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * and limitations under the License.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt *
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * When using or redistributing this file, you may do so under the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * License only. No other modification of this header is permitted.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt *
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If applicable, add the following below this CDDL HEADER, with the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * fields enclosed by brackets "[]" replaced with your own identifying
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * information: Portions Copyright [yyyy] [name of copyright owner]
9da57d7b0ddd8d73b676ce12c040362132cdd538bt *
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * CDDL HEADER END
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Use is subject to license terms of the CDDL.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#ifndef _IXGBE_SW_H
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define _IXGBE_SW_H
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#pragma ident "%Z%%M% %I% %E% SMI"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#ifdef __cplusplus
9da57d7b0ddd8d73b676ce12c040362132cdd538btextern "C" {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#endif
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/types.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/conf.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/debug.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/stropts.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/stream.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/strsun.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/strlog.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/kmem.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/stat.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/kstat.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/modctl.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/errno.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/dlpi.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/mac.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/mac_ether.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/vlan.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/ddi.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/sunddi.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/pci.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/pcie.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/sdt.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/ethernet.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/pattr.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/strsubr.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/netlb.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/random.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <inet/common.h>
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg#include <inet/tcp.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <inet/ip.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <inet/mi.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <inet/nd.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/bitmap.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/ddifm.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/fm/protocol.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/fm/util.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include <sys/fm/io/ddi.h>
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#include "ixgbe_api.h"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MODULE_NAME "ixgbe" /* module name */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_FAILURE DDI_FAILURE
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_UNKNOWN 0x00
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_INITIALIZED 0x01
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_STARTED 0x02
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_SUSPENDED 0x04
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_NUM_UNICAST_ADDRESSES 0x10
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_NUM_MULTICAST_ADDRESSES 0x1000
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_INTR_NONE 0
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_INTR_MSIX 1
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_INTR_MSI 2
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_INTR_LEGACY 3
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg#define MAX_COOKIE 18
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_NUM_TX_DESC 2
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Maximum values for user configurable parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * MAX_xx_QUEUE_NUM values need to be the maximum of all supported
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * silicon types.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_TX_QUEUE_NUM 32
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_RX_QUEUE_NUM 64
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_TX_RING_SIZE 4096
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_RX_RING_SIZE 4096
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_MTU 16366
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_RX_LIMIT_PER_INTR 4096
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_INTR_THROTTLING 65535
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_RX_COPY_THRESHOLD 9216
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_TX_COPY_THRESHOLD 9216
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_TX_RECYCLE_THRESHOLD DEFAULT_TX_RING_SIZE
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_TX_OVERLOAD_THRESHOLD DEFAULT_TX_RING_SIZE
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_TX_RESCHED_THRESHOLD DEFAULT_TX_RING_SIZE
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Minimum values for user configurable parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_TX_QUEUE_NUM 1
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_RX_QUEUE_NUM 1
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_TX_RING_SIZE 64
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_RX_RING_SIZE 64
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_MTU ETHERMIN
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_RX_LIMIT_PER_INTR 16
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_INTR_THROTTLING 0
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_TX_COPY_THRESHOLD 0
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_RX_COPY_THRESHOLD 0
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_TX_RECYCLE_THRESHOLD MIN_NUM_TX_DESC
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_TX_OVERLOAD_THRESHOLD MIN_NUM_TX_DESC
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MIN_TX_RESCHED_THRESHOLD MIN_NUM_TX_DESC
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Default values for user configurable parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_TX_QUEUE_NUM 1
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_RX_QUEUE_NUM 1
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_TX_RING_SIZE 512
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_RX_RING_SIZE 512
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_MTU ETHERMTU
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_RX_LIMIT_PER_INTR 256
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_INTR_THROTTLING 200 /* In unit of 256 nsec */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_RX_COPY_THRESHOLD 128
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_TX_COPY_THRESHOLD 512
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_TX_RECYCLE_THRESHOLD MAX_COOKIE
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_TX_OVERLOAD_THRESHOLD MIN_NUM_TX_DESC
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_TX_RESCHED_THRESHOLD 128
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_FCRTH 0x20000
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_FCRTL 0x10000
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DEFAULT_FCPAUSE 0xFFFF
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg#define DEFAULT_TX_HCKSUM_ENABLE B_TRUE
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg#define DEFAULT_RX_HCKSUM_ENABLE B_TRUE
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg#define DEFAULT_LSO_ENABLE B_TRUE
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg#define DEFAULT_TX_HEAD_WB_ENABLE B_TRUE
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg#define IXGBE_LSO_MAXLEN 65535
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define TX_DRAIN_TIME 200
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define RX_DRAIN_TIME 200
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define STALL_WATCHDOG_TIMEOUT 8 /* 8 seconds */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MAX_LINK_DOWN_TIMEOUT 8 /* 8 seconds */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * limits on msi-x vectors for 82598
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_MAX_INTR_VECTOR 18
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_MAX_OTHER_VECTOR 2
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_MAX_RING_VECTOR (IXGBE_MAX_INTR_VECTOR - IXGBE_MAX_OTHER_VECTOR)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Extra register bit masks for 82598
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_PCS1GANA_FDC 0x20
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_PCS1GANLP_LPFD 0x20
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_PCS1GANLP_LPHD 0x40
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Defined for IP header alignment.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IPHDR_ALIGN_ROOM 2
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Bit flags for attach_progress
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_PCI_CONFIG 0x0001 /* PCI config setup */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_REGS_MAP 0x0002 /* Registers mapped */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_PROPS 0x0004 /* Properties initialized */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_ALLOC_INTR 0x0008 /* Interrupts allocated */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_ALLOC_RINGS 0x0010 /* Rings allocated */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_ADD_INTR 0x0020 /* Intr handlers added */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_LOCKS 0x0040 /* Locks initialized */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_INIT 0x0080 /* Device initialized */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_INIT_RINGS 0x0100 /* Rings initialized */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_STATS 0x0200 /* Kstats created */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_NDD 0x0400 /* NDD initialized */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_MAC 0x0800 /* MAC registered */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_ENABLE_INTR 0x1000 /* DDI interrupts enabled */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define ATTACH_PROGRESS_FM_INIT 0x2000 /* FMA initialized */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_DEFAULT_MTU "default_mtu"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_FLOW_CONTROL "flow_control"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_TX_QUEUE_NUM "tx_queue_number"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_TX_RING_SIZE "tx_ring_size"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_RX_QUEUE_NUM "rx_queue_number"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_RX_RING_SIZE "rx_ring_size"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_INTR_FORCE "intr_force"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_TX_HCKSUM_ENABLE "tx_hcksum_enable"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_RX_HCKSUM_ENABLE "rx_hcksum_enable"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_LSO_ENABLE "lso_enable"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_TX_HEAD_WB_ENABLE "tx_head_wb_enable"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_TX_COPY_THRESHOLD "tx_copy_threshold"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_TX_RECYCLE_THRESHOLD "tx_recycle_threshold"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_TX_OVERLOAD_THRESHOLD "tx_overload_threshold"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_TX_RESCHED_THRESHOLD "tx_resched_threshold"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_RX_COPY_THRESHOLD "rx_copy_threshold"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_RX_LIMIT_PER_INTR "rx_limit_per_intr"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_INTR_THROTTLING "intr_throttling"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PROP_FM_CAPABLE "fm_capable"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_LB_NONE 0
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_LB_EXTERNAL 1
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_LB_INTERNAL_MAC 2
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_LB_INTERNAL_PHY 3
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_LB_INTERNAL_SERDES 4
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Shorthand for the NDD parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_autoneg_cap nd_params[PARAM_AUTONEG_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_pause_cap nd_params[PARAM_PAUSE_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_asym_pause_cap nd_params[PARAM_ASYM_PAUSE_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_10000fdx_cap nd_params[PARAM_10000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_1000fdx_cap nd_params[PARAM_1000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_100fdx_cap nd_params[PARAM_1000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_rem_fault nd_params[PARAM_REM_FAULT].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_adv_autoneg_cap nd_params[PARAM_ADV_AUTONEG_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_adv_pause_cap nd_params[PARAM_ADV_PAUSE_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_adv_asym_pause_cap nd_params[PARAM_ADV_ASYM_PAUSE_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_adv_10000fdx_cap nd_params[PARAM_ADV_10000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_adv_1000fdx_cap nd_params[PARAM_ADV_1000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_adv_100fdx_cap nd_params[PARAM_ADV_1000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_adv_rem_fault nd_params[PARAM_ADV_REM_FAULT].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_lp_autoneg_cap nd_params[PARAM_LP_AUTONEG_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_lp_pause_cap nd_params[PARAM_LP_PAUSE_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_lp_asym_pause_cap nd_params[PARAM_LP_ASYM_PAUSE_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_lp_10000fdx_cap nd_params[PARAM_LP_10000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_lp_1000fdx_cap nd_params[PARAM_LP_1000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_lp_100fdx_cap nd_params[PARAM_LP_1000FDX_CAP].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define param_lp_rem_fault nd_params[PARAM_LP_REM_FAULT].val
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538btenum ioc_reply {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IOC_INVAL = -1, /* bad, NAK with EINVAL */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IOC_DONE, /* OK, reply sent */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IOC_ACK, /* OK, just send ACK */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IOC_REPLY /* OK, just send reply */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt};
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define MBLK_LEN(mp) ((uintptr_t)(mp)->b_wptr - \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (uintptr_t)(mp)->b_rptr)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define DMA_SYNC(area, flag) ((void) ddi_dma_sync((area)->dma_handle, \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt 0, 0, (flag)))
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Defined for ring index operations
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ASSERT(index < limit)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ASSERT(step < limit)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ASSERT(index1 < limit)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ASSERT(index2 < limit)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define NEXT_INDEX(index, step, limit) (((index) + (step)) < (limit) ? \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (index) + (step) : (index) + (step) - (limit))
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define PREV_INDEX(index, step, limit) ((index) >= (step) ? \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (index) - (step) : (index) + (limit) - (step))
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define OFFSET(index1, index2, limit) ((index1) <= (index2) ? \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (index2) - (index1) : (index2) + (limit) - (index1))
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define LINK_LIST_INIT(_LH) \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (_LH)->head = (_LH)->tail = NULL
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define LIST_GET_HEAD(_LH) ((single_link_t *)((_LH)->head))
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define LIST_POP_HEAD(_LH) \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (single_link_t *)(_LH)->head; \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt { \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if ((_LH)->head != NULL) { \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (_LH)->head = (_LH)->head->link; \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if ((_LH)->head == NULL) \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (_LH)->tail = NULL; \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt } \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt }
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define LIST_GET_TAIL(_LH) ((single_link_t *)((_LH)->tail))
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define LIST_PUSH_TAIL(_LH, _E) \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if ((_LH)->tail != NULL) { \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (_LH)->tail->link = (single_link_t *)(_E); \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (_LH)->tail = (single_link_t *)(_E); \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt } else { \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (_LH)->head = (_LH)->tail = (single_link_t *)(_E); \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt } \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (_E)->link = NULL;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define LIST_GET_NEXT(_LH, _E) \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (((_LH)->tail == (single_link_t *)(_E)) ? \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt NULL : ((single_link_t *)(_E))->link)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct single_link {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct single_link *link;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} single_link_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct link_list {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt single_link_t *head;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt single_link_t *tail;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} link_list_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Property lookups
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_PROP_EXISTS(d, n) ddi_prop_exists(DDI_DEV_T_ANY, (d), \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt DDI_PROP_DONTPASS, (n))
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#define IXGBE_PROP_GET_INT(d, n) ddi_prop_get_int(DDI_DEV_T_ANY, (d), \
9da57d7b0ddd8d73b676ce12c040362132cdd538bt DDI_PROP_DONTPASS, (n), -1)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Named Data (ND) Parameter Management Structure
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct ixgbe *private;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t info;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t min;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t max;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t val;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt char *name;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} nd_param_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * NDD parameter indexes, divided into:
9da57d7b0ddd8d73b676ce12c040362132cdd538bt *
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * read-only parameters describing the hardware's capabilities
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * read-write parameters controlling the advertised capabilities
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * read-only parameters describing the partner's capabilities
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * read-write parameters controlling the force speed and duplex
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * read-only parameters describing the link state
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * read-only parameters describing the driver properties
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * read-write parameters controlling the driver properties
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btenum {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_AUTONEG_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_PAUSE_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_ASYM_PAUSE_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_10000FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_1000FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_100FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_REM_FAULT,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_ADV_AUTONEG_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_ADV_PAUSE_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_ADV_ASYM_PAUSE_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_ADV_10000FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_ADV_1000FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_ADV_100FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_ADV_REM_FAULT,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LP_AUTONEG_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LP_PAUSE_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LP_ASYM_PAUSE_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LP_10000FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LP_1000FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LP_100FDX_CAP,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LP_REM_FAULT,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LINK_STATUS,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LINK_SPEED,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_LINK_DUPLEX,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt PARAM_COUNT
9da57d7b0ddd8d73b676ce12c040362132cdd538bt};
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef union ixgbe_ether_addr {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t high;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t low;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt } reg;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint8_t set;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint8_t redundant;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint8_t addr[ETHERADDRL];
9da57d7b0ddd8d73b676ce12c040362132cdd538bt } mac;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} ixgbe_ether_addr_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef enum {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt USE_NONE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt USE_COPY,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt USE_DMA
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} tx_type_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef enum {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt RCB_FREE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt RCB_SENDUP
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} rcb_state_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1ggtypedef struct ixgbe_tx_context {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t hcksum_flags;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t ip_hdr_len;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t mac_hdr_len;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t l4_proto;
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg uint32_t mss;
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg uint32_t l4_hdr_len;
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg boolean_t lso_flag;
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg} ixgbe_tx_context_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Hold address/length of each DMA segment
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct sw_desc {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint64_t address;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt size_t length;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} sw_desc_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Handles and addresses of DMA buffer
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct dma_buffer {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt caddr_t address; /* Virtual address */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint64_t dma_address; /* DMA (Hardware) address */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ddi_acc_handle_t acc_handle; /* Data access handle */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ddi_dma_handle_t dma_handle; /* DMA handle */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt size_t size; /* Buffer size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt size_t len; /* Data length in the buffer */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} dma_buffer_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Tx Control Block
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct tx_control_block {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt single_link_t link;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t frag_num;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t desc_num;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt mblk_t *mp;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt tx_type_t tx_type;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ddi_dma_handle_t tx_dma_handle;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt dma_buffer_t tx_buf;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt sw_desc_t desc[MAX_COOKIE];
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} tx_control_block_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * RX Control Block
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct rx_control_block {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt mblk_t *mp;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rcb_state_t state;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt dma_buffer_t rx_buf;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt frtn_t free_rtn;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct ixgbe_rx_ring *rx_ring;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} rx_control_block_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Software Data Structure for Tx Ring
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct ixgbe_tx_ring {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t index; /* Ring index */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t intr_vector; /* Interrupt vector index */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t vect_bit; /* vector's bit in register */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Mutexes
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kmutex_t tx_lock;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kmutex_t recycle_lock;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kmutex_t tcb_head_lock;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kmutex_t tcb_tail_lock;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Tx descriptor ring definitions
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt dma_buffer_t tbd_area;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt union ixgbe_adv_tx_desc *tbd_ring;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tbd_head; /* Index of next tbd to recycle */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tbd_tail; /* Index of next tbd to transmit */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tbd_free; /* Number of free tbd */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Tx control block list definitions
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt tx_control_block_t *tcb_area;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt tx_control_block_t **work_list;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt tx_control_block_t **free_list;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tcb_head; /* Head index of free list */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tcb_tail; /* Tail index of free list */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tcb_free; /* Number of free tcb in free list */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t *tbd_head_wb; /* Head write-back */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t (*tx_recycle)(struct ixgbe_tx_ring *);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg * s/w context structure for TCP/UDP checksum offload
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg * and LSO.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg ixgbe_tx_context_t tx_context;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Tx ring settings and status
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t ring_size; /* Tx descriptor ring size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t free_list_size; /* Tx free list size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t copy_thresh;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t recycle_thresh;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t overload_thresh;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t resched_thresh;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt boolean_t reschedule;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t recycle_fail;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stall_watchdog;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#ifdef IXGBE_DEBUG
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Debug statistics
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stat_overload;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stat_fail_no_tbd;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stat_fail_no_tcb;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stat_fail_dma_bind;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stat_reschedule;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#endif
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Pointer to the ixgbe struct
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct ixgbe *ixgbe;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} ixgbe_tx_ring_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Software Receive Ring
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct ixgbe_rx_ring {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t index; /* Ring index */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t intr_vector; /* Interrupt vector index */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t vect_bit; /* vector's bit in register */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Mutexes
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kmutex_t rx_lock; /* Rx access lock */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kmutex_t recycle_lock; /* Recycle lock, for rcb_tail */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Rx descriptor ring definitions
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt dma_buffer_t rbd_area; /* DMA buffer of rx desc ring */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt union ixgbe_adv_rx_desc *rbd_ring; /* Rx desc ring */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t rbd_next; /* Index of next rx desc */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Rx control block list definitions
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rx_control_block_t *rcb_area;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rx_control_block_t **work_list; /* Work list of rcbs */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rx_control_block_t **free_list; /* Free list of rcbs */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t rcb_head; /* Index of next free rcb */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t rcb_tail; /* Index to put recycled rcb */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t rcb_free; /* Number of free rcbs */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Rx ring settings and status
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t ring_size; /* Rx descriptor ring size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t free_list_size; /* Rx free list size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t limit_per_intr; /* Max packets per interrupt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t copy_thresh;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#ifdef IXGBE_DEBUG
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Debug statistics
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stat_frame_error;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stat_cksum_error;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t stat_exceed_pkt;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#endif
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct ixgbe *ixgbe; /* Pointer to ixgbe struct */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} ixgbe_rx_ring_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * structure to map ring cleanup to msi-x vector
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct ixgbe_ring_vector {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct ixgbe *ixgbe; /* point to my adapter */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ulong_t rx_map[BT_BITOUL(MAX_RX_QUEUE_NUM)]; /* bitmap of rx rings */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt int rxr_cnt; /* count rx rings */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ulong_t tx_map[BT_BITOUL(MAX_TX_QUEUE_NUM)]; /* bitmap of tx rings */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt int txr_cnt; /* count tx rings */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} ixgbe_ring_vector_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Software adapter state
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct ixgbe {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt int instance;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt mac_handle_t mac_hdl;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt dev_info_t *dip;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct ixgbe_hw hw;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct ixgbe_osdep osdep;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t ixgbe_state;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt link_state_t link_state;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t link_speed;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t link_duplex;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t link_down_timeout;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t reset_count;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t attach_progress;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t loopback_mode;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t default_mtu;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t max_frame_size;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Each msi-x vector: map vector to ring cleanup
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_ring_vector_t vect_map[IXGBE_MAX_RING_VECTOR];
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Receive Rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_rx_ring_t *rx_rings; /* Array of rx rings */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t num_rx_rings; /* Number of rx rings in use */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t rx_ring_size; /* Rx descriptor ring size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t rx_buf_size; /* Rx buffer size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Transmit Rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_tx_ring_t *tx_rings; /* Array of tx rings */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t num_tx_rings; /* Number of tx rings in use */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tx_ring_size; /* Tx descriptor ring size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tx_buf_size; /* Tx buffer size */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt boolean_t tx_head_wb_enable; /* Tx head wrtie-back */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt boolean_t tx_hcksum_enable; /* Tx h/w cksum offload */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt boolean_t lso_enable; /* Large Segment Offload */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tx_copy_thresh; /* Tx copy threshold */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tx_recycle_thresh; /* Tx recycle threshold */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tx_overload_thresh; /* Tx overload threshold */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t tx_resched_thresh; /* Tx reschedule threshold */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt boolean_t rx_hcksum_enable; /* Rx h/w cksum offload */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t rx_copy_thresh; /* Rx copy threshold */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t rx_limit_per_intr; /* Rx pkts per interrupt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t intr_throttling[IXGBE_MAX_RING_VECTOR];
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t intr_force;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt int fm_capabilities; /* FMA capabilities */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt int intr_type;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt int intr_cnt;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt int intr_cap;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt size_t intr_size;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint_t intr_pri;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ddi_intr_handle_t *htable;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t eims_mask;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kmutex_t gen_lock; /* General lock for device access */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kmutex_t watchdog_lock;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt boolean_t watchdog_enable;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt boolean_t watchdog_start;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt timeout_id_t watchdog_tid;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt boolean_t unicst_init;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t unicst_avail;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t unicst_total;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_ether_addr_t unicst_addr[MAX_NUM_UNICAST_ADDRESSES];
9da57d7b0ddd8d73b676ce12c040362132cdd538bt uint32_t mcast_count;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt struct ether_addr mcast_table[MAX_NUM_MULTICAST_ADDRESSES];
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Kstat definitions
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_t *ixgbe_ks;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * NDD definitions
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt caddr_t nd_data;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt nd_param_t nd_params[PARAM_COUNT];
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} ixgbe_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bttypedef struct ixgbe_stat {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t link_speed; /* Link Speed */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#ifdef IXGBE_DEBUG
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t reset_count; /* Reset Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t rx_frame_error; /* Rx Error in Packet */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t rx_cksum_error; /* Rx Checksum Error */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t rx_exceed_pkt; /* Rx Exceed Max Pkt Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t tx_overload; /* Tx Desc Ring Overload */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t tx_fail_no_tcb; /* Tx Fail Freelist Empty */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t tx_fail_no_tbd; /* Tx Fail Desc Ring Empty */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t tx_fail_dma_bind; /* Tx Fail DMA bind */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t tx_reschedule; /* Tx Reschedule */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t gprc; /* Good Packets Received Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t gptc; /* Good Packets Xmitted Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t gor; /* Good Octets Received Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t got; /* Good Octets Xmitd Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t prc64; /* Packets Received - 64b */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t prc127; /* Packets Received - 65-127b */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t prc255; /* Packets Received - 127-255b */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t prc511; /* Packets Received - 256-511b */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t prc1023; /* Packets Received - 511-1023b */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t prc1522; /* Packets Received - 1024-1522b */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t ptc64; /* Packets Xmitted (64b) */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t ptc127; /* Packets Xmitted (64-127b) */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t ptc255; /* Packets Xmitted (128-255b) */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t ptc511; /* Packets Xmitted (255-511b) */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t ptc1023; /* Packets Xmitted (512-1023b) */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t ptc1522; /* Packets Xmitted (1024-1522b */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#endif
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t crcerrs; /* CRC Error Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t illerrc; /* Illegal Byte Error Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t errbc; /* Error Byte Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t mspdc; /* MAC Short Packet Discard Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t mpc; /* Missed Packets Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t mlfc; /* MAC Local Fault Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t mrfc; /* MAC Remote Fault Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t rlec; /* Receive Length Error Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t lxontxc; /* Link XON Transmitted Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t lxonrxc; /* Link XON Received Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t lxofftxc; /* Link XOFF Transmitted Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t lxoffrxc; /* Link XOFF Received Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t bprc; /* Broadcasts Pkts Received Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t mprc; /* Multicast Pkts Received Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t rnbc; /* Receive No Buffers Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t ruc; /* Receive Undersize Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t rfc; /* Receive Frag Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t roc; /* Receive Oversize Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t rjc; /* Receive Jabber Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t tor; /* Total Octets Recvd Count */
f27d3025d908422c3f6e682964b4f1e2b4834e4agg kstat_named_t tot; /* Total Octets Xmitted Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t tpr; /* Total Packets Received */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t tpt; /* Total Packets Xmitted */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t mptc; /* Multicast Packets Xmited Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt kstat_named_t bptc; /* Broadcast Packets Xmited Count */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt} ixgbe_stat_t;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Function prototypes in ixgbe_buf.c
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_alloc_dma(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_free_dma(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_set_fma_flags(int, int);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Function prototypes in ixgbe_main.c
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_start(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_stop(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_driver_setup_link(ixgbe_t *, boolean_t);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_unicst_set(ixgbe_t *, const uint8_t *, mac_addr_slot_t);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_multicst_add(ixgbe_t *, const uint8_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_multicst_remove(ixgbe_t *, const uint8_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btenum ioc_reply ixgbe_loopback_ioctl(ixgbe_t *, struct iocblk *, mblk_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_enable_watchdog_timer(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_disable_watchdog_timer(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_atomic_reserve(uint32_t *, uint32_t);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_check_acc_handle(ddi_acc_handle_t handle);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_check_dma_handle(ddi_dma_handle_t handle);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_fm_ereport(ixgbe_t *, char *);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Function prototypes in ixgbe_gld.c
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_start(void *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_m_stop(void *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_promisc(void *, boolean_t);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_multicst(void *, boolean_t, const uint8_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_unicst(void *, const uint8_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_stat(void *, uint_t, uint64_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_m_resources(void *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_m_ioctl(void *, queue_t *, mblk_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_unicst_add(void *, mac_multi_addr_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_unicst_remove(void *, mac_addr_slot_t);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_unicst_modify(void *, mac_multi_addr_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_m_unicst_get(void *, mac_multi_addr_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btboolean_t ixgbe_m_getcapab(void *, mac_capab_t, void *);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Function prototypes in ixgbe_rx.c
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btmblk_t *ixgbe_rx(ixgbe_rx_ring_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_rx_recycle(caddr_t arg);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Function prototypes in ixgbe_tx.c
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btmblk_t *ixgbe_m_tx(void *, mblk_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_free_tcb(tx_control_block_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_put_free_list(ixgbe_tx_ring_t *, link_list_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btuint32_t ixgbe_tx_recycle_legacy(ixgbe_tx_ring_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btuint32_t ixgbe_tx_recycle_head_wb(ixgbe_tx_ring_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Function prototypes in ixgbe_log.c
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_notice(void *, const char *, ...);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_log(void *, const char *, ...);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_error(void *, const char *, ...);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Function prototypes in ixgbe_ndd.c
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_nd_init(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btvoid ixgbe_nd_cleanup(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btenum ioc_reply ixgbe_nd_ioctl(ixgbe_t *, queue_t *, mblk_t *, struct iocblk *);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt/*
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Function prototypes in ixgbe_stat.c
9da57d7b0ddd8d73b676ce12c040362132cdd538bt */
9da57d7b0ddd8d73b676ce12c040362132cdd538btint ixgbe_init_stats(ixgbe_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#ifdef __cplusplus
9da57d7b0ddd8d73b676ce12c040362132cdd538bt}
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#endif
9da57d7b0ddd8d73b676ce12c040362132cdd538bt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#endif /* _IXGBE_SW_H */