ixgbe_main.c revision 13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * CDDL HEADER START
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The contents of this file are subject to the terms of the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Common Development and Distribution License (the "License").
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * You may not use this file except in compliance with the License.
193974072f41a843678abf5f61979c748687e66bSherry Moore * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * See the License for the specific language governing permissions
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * and limitations under the License.
193974072f41a843678abf5f61979c748687e66bSherry Moore * When distributing Covered Code, include this CDDL HEADER in each
193974072f41a843678abf5f61979c748687e66bSherry Moore * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If applicable, add the following below this CDDL HEADER, with the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * fields enclosed by brackets "[]" replaced with your own identifying
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * information: Portions Copyright [yyyy] [name of copyright owner]
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * CDDL HEADER END
193974072f41a843678abf5f61979c748687e66bSherry Moore * Copyright(c) 2007-2008 Intel Corporation. All rights reserved.
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
193974072f41a843678abf5f61979c748687e66bSherry Moore * Use is subject to license terms.
193974072f41a843678abf5f61979c748687e66bSherry Moorestatic char ident[] = "Intel 10Gb Ethernet";
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Local function protoypes
da14cebe459d3275048785f25bd869cb09b5307fEric Chengstatic int ixgbe_unicst_set(ixgbe_t *, const uint8_t *, int);
da14cebe459d3275048785f25bd869cb09b5307fEric Chengstatic int ixgbe_unicst_find(ixgbe_t *, const uint8_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic int ixgbe_get_prop(ixgbe_t *, char *, int, int, int);
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guostatic void ixgbe_driver_link_check(void *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void ixgbe_local_timer(void *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic boolean_t ixgbe_set_loopback_mode(ixgbe_t *, uint32_t);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void ixgbe_map_rxring_to_vector(ixgbe_t *, int, int);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void ixgbe_map_txring_to_vector(ixgbe_t *, int, int);
da14cebe459d3275048785f25bd869cb09b5307fEric Chengstatic void ixgbe_setup_ivar(ixgbe_t *, uint16_t, uint8_t);
da14cebe459d3275048785f25bd869cb09b5307fEric Chengstatic void ixgbe_enable_ivar(ixgbe_t *, uint16_t);
da14cebe459d3275048785f25bd869cb09b5307fEric Chengstatic void ixgbe_disable_ivar(ixgbe_t *, uint16_t);
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guostatic void ixgbe_intr_other_work(ixgbe_t *, uint32_t);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void ixgbe_release_driver_control(struct ixgbe_hw *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic uint8_t *ixgbe_mc_table_itr(struct ixgbe_hw *, uint8_t **, uint32_t *);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic int ixgbe_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt const void *impl_data);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt 0, /* devo_refcnt */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt &mod_driverops, /* Type of module. This one is a driver */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ident, /* Discription string */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Access attributes for register mapping
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Loopback property
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * Initialize capabilities of each supported adapter type
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo IXGBE_EICR_LSC, /* "other" interrupt types handled */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Module Initialization Functions.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_attach - Driver attach.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * This function is the device specific initialization entry
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * point. This entry point is required and must be written.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The DDI_ATTACH command must be provided in the attach entry
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * point. When attach() is called with cmd set to DDI_ATTACH,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * all normal kernel services (such as kmem_alloc(9F)) are
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * available for use by the driver.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The attach() function will be called once for each instance
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * of the device on the system with cmd set to DDI_ATTACH.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Until attach() succeeds, the only driver entry points which
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * may be called are open(9E) and getinfo(9E).
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Check the command and perform corresponding operations
9da57d7b0ddd8d73b676ce12c040362132cdd538bt switch (cmd) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* Get the device instance */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* Allocate memory for the instance data structure */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* Attach the instance pointer to the dev_info data structure */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize for fma support
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg ixgbe->fm_capabilities = ixgbe_get_prop(ixgbe, PROP_FM_CAPABLE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt 0, 0x0f, DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE |
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Map PCI config space registers
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (pci_config_setup(devinfo, &osdep->cfg_handle) != DDI_SUCCESS) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Identify the chipset family
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Map device registers
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize driver parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Allocate interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Allocate rx/tx rings based on the ring numbers.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The actual numbers of rx/tx rings are decided by the number of
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * allocated interrupt vectors, so we should allocate the rings after
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * interrupts are allocated.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_error(ixgbe, "Failed to allocate rx and tx rings");
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Map rings to interrupt vectors
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_map_rings_to_vectors(ixgbe) != IXGBE_SUCCESS) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Add interrupt handlers
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * Create a taskq for link-status-change
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo (void) sprintf(taskqname, "ixgbe%d_taskq", instance);
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo if ((ixgbe->lsc_taskq = ddi_taskq_create(devinfo, taskqname,
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo ixgbe->attach_progress |= ATTACH_PROGRESS_LSC_TASKQ;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize driver parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_init_driver_settings(ixgbe) != IXGBE_SUCCESS) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_error(ixgbe, "Failed to initialize driver settings");
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize mutexes for this device.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Do this before enabling the interrupt handler and
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * register the softint to avoid the condition where
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * interrupt handler can try using uninitialized mutex.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize chipset hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.cfg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize DMA and hardware settings for rx/tx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize statistics
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize NDD parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Register the driver to the MAC
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo mac_link_update(ixgbe->mac_hdl, LINK_STATE_UNKNOWN);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Now that mutex locks are initialized, and the chip is also
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * initialized, enable interrupts.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_detach - Driver detach.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The detach() function is the complement of the attach routine.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If cmd is set to DDI_DETACH, detach() is used to remove the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * state associated with a given instance of a device node
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * prior to the removal of that instance from the system.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The detach() function will be called once for each instance
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * of the device for which there has been a successful attach()
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * once there are no longer any opens on the device.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Interrupts routine are disabled, All memory allocated by this
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * driver are freed.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Check detach command
9da57d7b0ddd8d73b676ce12c040362132cdd538bt switch (cmd) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Get the pointer to the driver private data structure
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Unregister MAC. If failed, we have to fail the detach
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If the device is still running, it needs to be stopped first.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * This check is necessary because under some specific circumstances,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * the detach routine can be called without stopping the interface
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* Disable and stop the watchdog timer */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Check if there are still rx buffers held by the upper layer.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If so, fail the detach.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Do the remaining unconfigure routines
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Disable interrupt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe->attach_progress & ATTACH_PROGRESS_ENABLE_INTR) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Unregister MAC
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Free ndd parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Free statistics
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Remove interrupt handlers
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * Remove taskq for link-status-change
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo if (ixgbe->attach_progress & ATTACH_PROGRESS_LSC_TASKQ) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Remove interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe->attach_progress & ATTACH_PROGRESS_ALLOC_INTR) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Remove driver properties
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Release the DMA resources of rx/tx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe->attach_progress & ATTACH_PROGRESS_INIT_RINGS) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Stop the chipset
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Free register handle
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Free PCI config handle
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe->attach_progress & ATTACH_PROGRESS_PCI_CONFIG) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Free locks
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Free the rx/tx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe->attach_progress & ATTACH_PROGRESS_ALLOC_RINGS) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Unregister FMA capabilities
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Free the driver data structure
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_register_mac - Register the driver and its function pointers with
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * the GLD interface.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_identify_hardware - Identify the type of the chipset.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Get the device id
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * Set the mac type of the adapter based on the device id
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * Install adapter capabilities
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo if (ixgbe_get_media_type(hw) == ixgbe_media_type_copper) {
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo ixgbe->capab->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo "adapter not supported in ixgbe_identify_hardware(): %d\n",
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_regs_map - Map the device registers.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * First get the size of device registers to be mapped.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ddi_dev_regsize(devinfo, 1, &mem_size) != DDI_SUCCESS) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Call ddi_regs_map_setup() to map registers
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_init_properties - Initialize driver properties.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Get conf file properties, including link settings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * jumbo frames, ring number, descriptor number, etc.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_init_driver_settings - Initialize driver settings.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The settings include hardware function pointers, bus information,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * rx/tx rings settings, link state, and any other parameters that
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * need to be setup during driver initialization.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize chipset specific hardware function pointers
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Get the system page size
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe->sys_page_size = ddi_ptob(devinfo, (ulong_t)1);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Set rx buffer size
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The IP header alignment room is counted in the calculation.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The rx buffer size is in unit of 1K that is required by the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * chipset hardware.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ((rx_size & (((uint32_t)1 << 10) - 1)) > 0 ? 1 : 0)) << 10;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Set tx buffer size
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ((tx_size & (((uint32_t)1 << 10) - 1)) > 0 ? 1 : 0)) << 10;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize rx/tx rings parameters
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize values of interrupt throttling rate
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The initial link state should be "unknown"
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_init_locks - Initialize locks.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_destroy_locks - Destroy locks.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Enable and start the watchdog timer
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Disable and stop the watchdog timer
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_init - Initialize the device.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Reset chipset to put the hardware in a known state
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * before we try to do anything with the eeprom.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Need to init eeprom before validating the checksum.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "Unable to intitialize the eeprom interface.");
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * NVM validation
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Some PCI-E parts fail the first check due to
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * the link being in sleep state. Call it again,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * if it fails a second time it's a real issue.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "Invalid NVM checksum. Please contact "
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "the vendor to update the NVM.");
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup default flow control thresholds - enable/disable
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * & flow control type is controlled by ixgbe.conf
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Don't wait for auto-negotiation to complete
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize link settings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize the chipset hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.cfg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Reset PHY
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_init_rings - Allocate DMA resources for all rx/tx rings and
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * initialize relevant hardware settings.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Allocate buffers for all the rx/tx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup the rx/tx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_fini_rings - Release DMA resources of all rx/tx rings.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_chip_start - Initialize and start the chipset hardware.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Get the mac address
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * This function should handle SPARC case correctly.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Validate the mac address
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup adapter interrupt vectors
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize unicast addresses.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup and initialize the mctable structures.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Set interrupt throttling rate
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_EITR(i), ixgbe->intr_throttling[i]);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Save the state of the phy
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Make sure driver has control
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_chip_stop - Stop the chipset hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Tell firmware driver is no longer in control
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Reset the chipset
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Reset PHY
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_reset - Reset the chipset and re-start the driver.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * It involves stopping and re-starting the chipset,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * and re-configuring the rx/tx rings.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Disable the adapter interrupts to stop any rx/tx activities
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * before draining pending data and resetting hardware.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Drain the pending transmit packets
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Stop the chipset hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Clean the pending tx data/resources
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Start the chipset hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup the rx/tx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Enable adapter interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The interrupts must be enabled after the driver state is START
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_tx_clean - Clean the pending transmit packets and DMA resources.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Clean the pending tx data - the pending packets in the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * work_list that have no chances to be transmitted again.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * We must ensure the chipset is stopped or the link is down
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * before cleaning the transmit packets.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Reset the head and tail pointers of the tbd ring;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Reset the writeback head if it's enable.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Add the tx control blocks in the pending list to
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * the free list.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_tx_drain - Drain the tx rings to allow pending packets to be
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * transmitted.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Wait for a specific time to allow pending tx packets
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * to be transmitted.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Check the counter tbd_free to see if transmission is done.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * No lock protection is needed here.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Return B_TRUE if all pending packets have been transmitted;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Otherwise return B_FALSE;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt for (i = 0; i < TX_DRAIN_TIME; i++) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_rx_drain - Wait for all rx buffers to be released by upper layer.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Polling the rx free list to check if those rx buffers held by
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * the upper layer are released.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Check the counter rcb_free to see if all pending buffers are
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * released. No lock protection is needed here.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Return B_TRUE if all pending buffers have been released;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Otherwise return B_FALSE;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt for (i = 0; i < RX_DRAIN_TIME; i++) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_start - Start the driver/chipset.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Start the chipset hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup the rx/tx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Enable adapter interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The interrupts must be enabled after the driver state is START
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_stop - Stop the driver/chipset.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Disable the adapter interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Drain the pending tx packets
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Stop the chipset hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Clean the pending tx data/resources
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_alloc_rings - Allocate memory space for rx/tx rings.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Allocate memory space for rx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Allocate memory space for tx rings
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Allocate memory space for rx ring groups
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng sizeof (ixgbe_rx_group_t) * ixgbe->num_rx_groups,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_free_rings - Free the memory space of rx/tx rings.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng sizeof (ixgbe_rx_group_t) * ixgbe->num_rx_groups);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_setup_rings - Setup rx/tx rings.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup the rx/tx rings, including the following:
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * 1. Setup the descriptor ring and the control block buffers;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * 2. Initialize necessary registers for receive/transmit;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * 3. Initialize software pointers/parameters for receive/transmit;
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize the length register
9da57d7b0ddd8d73b676ce12c040362132cdd538bt size = rx_ring->ring_size * sizeof (union ixgbe_adv_rx_desc);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize the base address registers
9da57d7b0ddd8d73b676ce12c040362132cdd538bt buf_high = (uint32_t)(rx_ring->rbd_area.dma_address >> 32);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_RDBAH(rx_ring->index), buf_high);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_RDBAL(rx_ring->index), buf_low);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup head & tail pointers
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_RDT(rx_ring->index), rx_ring->ring_size - 1);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Note: Considering the case that the chipset is being reset
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * and there are still some buffers held by the upper layer,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * we should not reset the values of rcb_head, rcb_tail and
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * rcb_free if the state is not IXGBE_UNKNOWN.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup the Receive Descriptor Control Register (RXDCTL)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * PTHRESH=32 descriptors (half the internal cache)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * HTHRESH=0 descriptors (to minimize latency on fetch)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * WTHRESH defaults to 1 (writeback each descriptor)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt reg_val = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->index));
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rx_ring->index), reg_val);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup the Split and Replication Receive Control Register.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Set the rx buffer size and the advanced descriptor type.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt reg_val = (ixgbe->rx_buf_size >> IXGBE_SRRCTL_BSIZEPKT_SHIFT) |
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rx_ring->index), reg_val);
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Set filter control in FCTRL to accept broadcast packets and do
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * not pass pause frames to host. Flow control settings are already
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * in this register, so preserve them.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Enable the receive unit. This must be done after filter
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * control is set in FCTRL.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_setup_rx_ring must be called after configuring RXCTRL
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Setup rx groups.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Setup the per-ring statistics mapping.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i >> 2), ring_mapping);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i >> 2), ring_mapping);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The Max Frame Size in MHADD will be internally increased by four
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * bytes if the packet has a VLAN field, so includes MTU, ethernet
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * header and frame check sequence.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt reg_val = (ixgbe->default_mtu + sizeof (struct ether_header)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup Jumbo Frame enable bit
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Hardware checksum settings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup RSS for multiple receive queues
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize the length register
9da57d7b0ddd8d73b676ce12c040362132cdd538bt size = tx_ring->ring_size * sizeof (union ixgbe_adv_tx_desc);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize the base address registers
9da57d7b0ddd8d73b676ce12c040362132cdd538bt buf_high = (uint32_t)(tx_ring->tbd_area.dma_address >> 32);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_TDBAL(tx_ring->index), buf_low);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_TDBAH(tx_ring->index), buf_high);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * setup TXDCTL(tx_ring->index)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->index), reg_val);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup head & tail pointers
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup head write-back
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The memory of the head write-back is allocated using
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * the extra tbd beyond the tail of the tbd ring.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* Set the head write-back enable bit */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(tx_ring->index), buf_low);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(tx_ring->index), buf_high);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Turn off relaxed ordering for head write back or it will
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * cause problems with the tx recycling
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Note: Considering the case that the chipset is being reset,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * and there are still some tcb in the pending list,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * we should not reset the values of tcb_head, tcb_tail and
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * tcb_free if the state is not IXGBE_UNKNOWN.
f27d3025d908422c3f6e682964b4f1e2b4834e4agg * Initialize the s/w context structure
f27d3025d908422c3f6e682964b4f1e2b4834e4agg bzero(&tx_ring->tx_context, sizeof (ixgbe_tx_context_t));
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Setup the per-ring statistics mapping.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng IXGBE_WRITE_REG(hw, IXGBE_TQSMR(i >> 2), ring_mapping);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng IXGBE_WRITE_REG(hw, IXGBE_TQSMR(i >> 2), ring_mapping);
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg * Enable CRC appending and TX padding (for short tx frames)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_setup_rss - Setup receive-side scaling feature.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Fill out redirection table
9da57d7b0ddd8d73b676ce12c040362132cdd538bt for (i = 0; i < 128; i++) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Fill out hash function seeds with a random constant
9da57d7b0ddd8d73b676ce12c040362132cdd538bt for (i = 0; i < 10; i++) {
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg * Enable RSS & perform hash on these packet types
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Disable Packet Checksum to enable RSS for multiple receive queues.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * It is an adapter hardware limitation that Packet Checksum is
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * mutually exclusive with RSS.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_init_unicst - Initialize the unicast addresses.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Here we should consider two situations:
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * 1. Chipset is initialized at the first time,
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Clear all the multiple unicast addresses.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * 2. Chipset is reset
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Recover the multiple unicast addresses from the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * software data structure to the RAR registers.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize the multiple unicast addresses
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng for (slot = 0; slot < ixgbe->unicst_total; slot++) {
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng (void) ixgbe_set_rar(hw, slot, mac_addr, NULL, NULL);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* Re-configure the RAR registers */
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng for (slot = 0; slot < ixgbe->unicst_total; slot++) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_unicst_set - Set the unicast address to the specified slot.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Save the unicast address in the software data structure
9da57d7b0ddd8d73b676ce12c040362132cdd538bt bcopy(mac_addr, ixgbe->unicst_addr[slot].mac.addr, ETHERADDRL);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Set the unicast address to the RAR register
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng (void) ixgbe_set_rar(hw, slot, (uint8_t *)mac_addr, NULL, IXGBE_RAH_AV);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt return (0);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * ixgbe_unicst_find - Find the slot for the specified unicast address
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_unicst_find(ixgbe_t *ixgbe, const uint8_t *mac_addr)
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng for (slot = 0; slot < ixgbe->unicst_total; slot++) {
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng return (-1);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_multicst_add - Add a multicst address.
9da57d7b0ddd8d73b676ce12c040362132cdd538btixgbe_multicst_add(ixgbe_t *ixgbe, const uint8_t *multiaddr)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Update the multicast table in the hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt return (0);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_multicst_remove - Remove a multicst address.
9da57d7b0ddd8d73b676ce12c040362132cdd538btixgbe_multicst_remove(ixgbe_t *ixgbe, const uint8_t *multiaddr)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Update the multicast table in the hardware
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt return (0);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_setup_multicast - Setup multicast data structures.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * This routine initializes all of the multicast related structures
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * and save them in the hardware registers.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ASSERT(ixgbe->mcast_count <= MAX_NUM_MULTICAST_ADDRESSES);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Update the multicast addresses to the MTA registers
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_get_conf - Get driver configurations set in driver.conf.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * This routine gets user-configured values out of the configuration
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * For each configurable value, there is a minimum, a maximum, and a
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * default.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If user does not configure a value, use the default.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If user configures below the minimum, use the minumum.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If user configures above the maximum, use the maxumum.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe driver supports the following user configurations:
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Jumbo frame configuration:
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * default_mtu
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Ethernet flow control configuration:
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * flow_control
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Multiple rings configurations:
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * tx_queue_number
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * tx_ring_size
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * rx_queue_number
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * rx_ring_size
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Call ixgbe_get_prop() to get the value for a specific
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * configuration parameter.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Jumbo frame configuration - max_frame_size controls host buffer
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * allocation, so includes MTU, ethernet header, vlan tag and
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * frame check sequence.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->default_mtu = ixgbe_get_prop(ixgbe, PROP_DEFAULT_MTU,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Ethernet flow control configuration
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Multiple rings configurations
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->num_tx_rings = ixgbe_get_prop(ixgbe, PROP_TX_QUEUE_NUM,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->tx_ring_size = ixgbe_get_prop(ixgbe, PROP_TX_RING_SIZE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt MIN_TX_RING_SIZE, MAX_TX_RING_SIZE, DEFAULT_TX_RING_SIZE);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->num_rx_rings = ixgbe_get_prop(ixgbe, PROP_RX_QUEUE_NUM,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->rx_ring_size = ixgbe_get_prop(ixgbe, PROP_RX_RING_SIZE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt MIN_RX_RING_SIZE, MAX_RX_RING_SIZE, DEFAULT_RX_RING_SIZE);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Multiple groups configuration
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe->num_rx_groups = ixgbe_get_prop(ixgbe, PROP_RX_GROUP_NUM,
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng MIN_RX_GROUP_NUM, MAX_RX_GROUP_NUM, DEFAULT_RX_GROUP_NUM);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe->mr_enable = ixgbe_get_prop(ixgbe, PROP_MR_ENABLE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Tunable used to force an interrupt type. The only use is
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * for testing of the lesser interrupt types.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * 0 = don't force interrupt type
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * 1 = force interrupt type MSI-X
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * 2 = force interrupt type MSI
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * 3 = force interrupt type Legacy
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->intr_force = ixgbe_get_prop(ixgbe, PROP_INTR_FORCE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->tx_hcksum_enable = ixgbe_get_prop(ixgbe, PROP_TX_HCKSUM_ENABLE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->rx_hcksum_enable = ixgbe_get_prop(ixgbe, PROP_RX_HCKSUM_ENABLE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->lso_enable = ixgbe_get_prop(ixgbe, PROP_LSO_ENABLE,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->tx_head_wb_enable = ixgbe_get_prop(ixgbe, PROP_TX_HEAD_WB_ENABLE,
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg * ixgbe LSO needs the tx h/w checksum support.
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg * LSO will be disabled if tx h/w checksum is not
c971fb7ec0a19c6cd00c5614a94c97f953b6e8b1gg * enabled.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->tx_copy_thresh = ixgbe_get_prop(ixgbe, PROP_TX_COPY_THRESHOLD,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt MAX_TX_OVERLOAD_THRESHOLD, DEFAULT_TX_OVERLOAD_THRESHOLD);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->rx_copy_thresh = ixgbe_get_prop(ixgbe, PROP_RX_COPY_THRESHOLD,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->rx_limit_per_intr = ixgbe_get_prop(ixgbe, PROP_RX_LIMIT_PER_INTR,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->intr_throttling[0] = ixgbe_get_prop(ixgbe, PROP_INTR_THROTTLING,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_get_prop - Get a property value out of the configuration file
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Caller provides the name of the property, a default value, a minimum
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * value, and a maximum value.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Return configured value of the property, with default, minimum and
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * maximum properly applied.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Call ddi_prop_get_int() to read the conf settings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_driver_setup_link - Using the link properties to setup the link.
9da57d7b0ddd8d73b676ce12c040362132cdd538btixgbe_driver_setup_link(ixgbe_t *ixgbe, boolean_t setup_hw)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * No half duplex support with 10Gb parts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_notice(ixgbe, "Invalid link settings. Setup link to "
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "autonegotiation with full link capabilities.");
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * ixgbe_driver_link_check - Link status processing done in taskq.
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* check for link, wait the full time */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo (void) ixgbe_check_link(hw, &speed, &link_up, true);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The Link is up, check whether it was marked as down earlier
9da57d7b0ddd8d73b676ce12c040362132cdd538bt switch (speed) {
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * this is only reached after a link-status-change interrupt
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * so always get new phy state
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* re-enable the interrupt, which was automasked */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* outside the gen_lock */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo mac_link_update(ixgbe->mac_hdl, ixgbe->link_state);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_local_timer - Driver watchdog function.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * This function will handle the transmit stall check, link status check and
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * other routines.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_stall_check - Check for transmit stall.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * This function checks if the adapter is stalled (in transmit).
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * It is called each time the watchdog timeout is invoked.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If the transmit descriptor reclaim continuously fails,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * the watchdog value will increment by 1. If the watchdog
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * value exceeds the threshold, the ixgbe is assumed to
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * have stalled and need to be reset.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If any tx ring is stalled, we'll reset the chipset
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * is_valid_mac_addr - Check if the mac address is valid.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * The "vendor's factory-set address" may already have
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * been extracted from the chip, but if the property
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * "local-mac-address" is set we use that instead.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * We check whether it looks like an array of 6
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * bytes (which it should, if OBP set it). If we can't
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * make sense of it this way, we'll ignore it.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, ixgbe->dip,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Look up the OBP property "local-mac-address?". If the user has set
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * 'local-mac-address? = false', use "the system address" instead.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, ixgbe->dip, 0,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "local-mac-address?", &bytes, &nelts) == DDI_PROP_SUCCESS) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (strncmp("false", (caddr_t)bytes, (size_t)nelts) == 0) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Finally(!), if there's a valid "mac-address" property (created
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * if we netbooted from this interface), we must use this instead
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * of any of the above to ensure that the NFS/install server doesn't
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * get confused by the address changing as Solaris takes over!
9da57d7b0ddd8d73b676ce12c040362132cdd538bt err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, ixgbe->dip,
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Fire a watchdog timer
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_enable_watchdog_timer - Enable and start the driver watchdog timer.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_disable_watchdog_timer - Disable and stop the driver watchdog timer.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_start_watchdog_timer - Start the driver watchdog timer.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_restart_watchdog_timer - Restart the driver watchdog timer.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_stop_watchdog_timer - Stop the driver watchdog timer.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_disable_adapter_interrupts - Disable all adapter interrupts.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * mask all interrupts off
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * for MSI-X, also disable autoclear
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_enable_adapter_interrupts - Enable all hardware interrupts.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* interrupt types to enable */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo ixgbe->eims = IXGBE_EIMS_ENABLE_MASK; /* shared code default */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo ixgbe->eims &= ~IXGBE_EIMS_TCP_TIMER; /* minus tcp timer */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo ixgbe->eims |= ixgbe->capab->other_intr; /* "other" interrupt types */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* enable automask on "other" causes that this adapter can generate */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * msi-x mode
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* enable autoclear but not on bits 29:20 */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* general purpose interrupt enable */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * non-msi-x mode
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* disable autoclear, leave gpie at default */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* general purpose interrupt enable */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* write to interrupt control registers */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_loopback_ioctl - Loopback support.
9da57d7b0ddd8d73b676ce12c040362132cdd538btixgbe_loopback_ioctl(ixgbe_t *ixgbe, struct iocblk *iocp, mblk_t *mp)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_set_loopback_mode - Setup loopback based on the loopback mode.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Reset the chip
9da57d7b0ddd8d73b676ce12c040362132cdd538bt switch (mode) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_set_internal_mac_loopback - Set the internal MAC loopback mode.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Setup MAC loopback
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Disable Atlas Tx lanes to keep packets in loopback and not on wire
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_read_analog_reg8(&ixgbe->hw, IXGBE_ATLAS_PDN_LPBK,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_write_analog_reg8(&ixgbe->hw, IXGBE_ATLAS_PDN_LPBK,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_read_analog_reg8(&ixgbe->hw, IXGBE_ATLAS_PDN_10G,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_write_analog_reg8(&ixgbe->hw, IXGBE_ATLAS_PDN_10G,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_read_analog_reg8(&ixgbe->hw, IXGBE_ATLAS_PDN_1G,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_write_analog_reg8(&ixgbe->hw, IXGBE_ATLAS_PDN_1G,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_read_analog_reg8(&ixgbe->hw, IXGBE_ATLAS_PDN_AN,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) ixgbe_write_analog_reg8(&ixgbe->hw, IXGBE_ATLAS_PDN_AN,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#pragma inline(ixgbe_intr_rx_work)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_intr_rx_work - RX processing of ISR.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng mac_rx_ring(rx_ring->ixgbe->mac_hdl, rx_ring->ring_handle, mp,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#pragma inline(ixgbe_intr_tx_work)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_intr_tx_work - TX processing of ISR.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Recycle the tx descriptors
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Schedule the re-transmit
9da57d7b0ddd8d73b676ce12c040362132cdd538bt#pragma inline(ixgbe_intr_other_work)
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * ixgbe_intr_other_work - Process interrupt types other than tx/rx
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guoixgbe_intr_other_work(ixgbe_t *ixgbe, uint32_t eicr)
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * dispatch taskq to handle link status change
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo ixgbe_driver_link_check, (void *)ixgbe, DDI_NOSLEEP))
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * check for fan failure on adapters with fans
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo if ((ixgbe->capab->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo "Fan has stopped, replace the adapter\n");
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* re-enable the interrupt, which was automasked */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_intr_legacy - Interrupt handler for legacy interrupts.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Any bit set in eicr: claim this interrupt
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * For legacy interrupt, we have only one interrupt,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * so we have only one rx ring and one tx ring enabled.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * For legacy interrupt, rx rings[0] will use RTxQ[0].
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Clean the rx descriptors
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * For legacy interrupt, tx rings[0] will use RTxQ[1].
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Recycle the tx descriptors
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Schedule the re-transmit
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* any interrupt type other than tx/rx */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * No interrupt cause bits set: don't claim this interrupt.
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* re-enable the interrupts which were automasked */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Do the following work outside of the gen_lock
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng mac_rx_ring(rx_ring->ixgbe->mac_hdl, rx_ring->ring_handle, mp,
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng mac_tx_ring_update(ixgbe->mac_hdl, tx_ring->ring_handle);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_intr_msi - Interrupt handler for MSI.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * For MSI interrupt, we have only one vector,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * so we have only one rx ring and one tx ring enabled.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * For MSI interrupt, rx rings[0] will use RTxQ[0].
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * For MSI interrupt, tx rings[0] will use RTxQ[1].
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* any interrupt type other than tx/rx */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* re-enable the interrupts which were automasked */
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * ixgbe_intr_rx_tx - Interrupt handler for rx and tx.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_ring_vector_t *vect = (ixgbe_ring_vector_t *)arg1;
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Clean each rx ring that has its bit set in the map
9da57d7b0ddd8d73b676ce12c040362132cdd538bt r_idx = bt_getlowbit(vect->rx_map, 0, (ixgbe->num_rx_rings - 1));
9da57d7b0ddd8d73b676ce12c040362132cdd538bt while (r_idx >= 0) {
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Clean each tx ring that has its bit set in the map
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng r_idx = bt_getlowbit(vect->tx_map, 0, (ixgbe->num_tx_rings - 1));
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng while (r_idx >= 0) {
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * ixgbe_intr_other - Interrupt handler for other.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Only look for other work if the right bits are set in the
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Interrupt Cause Register.
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo * Need check cause bits and only other causes will
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * be processed
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* any interrupt type other than tx/rx */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* re-enable the interrupts which were automasked */
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_alloc_intrs - Allocate interrupts for the driver.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Normal sequence is to try MSI-X; if not sucessful, try MSI;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * if not successful, try Legacy.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe->intr_force can be used to force sequence to start with
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * any of the 3 types.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If MSI-X is not used, number of tx/rx rings is forced to 1.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Get supported interrupt types
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_DEBUGLOG_1(ixgbe, "Supported interrupt types: %x", intr_types);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Install MSI-X interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rc = ixgbe_alloc_intr_handles(ixgbe, DDI_INTR_TYPE_MSIX);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "Allocate MSI-X failed, trying MSI interrupts...");
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * MSI-X not used, force rings and groups to 1
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng "MSI-X not used, force rings and groups number to 1");
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Install MSI interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "Allocate MSI failed, trying Legacy interrupts...");
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Install legacy interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rc = ixgbe_alloc_intr_handles(ixgbe, DDI_INTR_TYPE_FIXED);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "Allocate Legacy interrupts failed");
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * If none of the 3 types succeeded, return failure
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_alloc_intr_handles - Allocate interrupt handles.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * For legacy and MSI, only 1 handle is needed. For MSI-X,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * if fewer than 2 handles are available, return failure.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Upon success, this maps the vectors to rx and tx rings for
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * interrupts.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Best number of vectors for the adapter is
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * # rx rings + # tx rings + 1 for other.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng request = ixgbe->num_rx_rings + ixgbe->num_tx_rings + 1;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "invalid call to ixgbe_alloc_intr_handles(): %d\n",
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_DEBUGLOG_2(ixgbe, "interrupt handles requested: %d minimum: %d",
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Get number of supported interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "Get interrupt number failed. Return: %d, count: %d",
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_DEBUGLOG_1(ixgbe, "interrupts supported: %d", count);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Get number of available interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "Get interrupt available number failed. "
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_DEBUGLOG_1(ixgbe, "interrupts available: %d", avail);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Allocate an array of interrupt handles
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rc = ddi_intr_alloc(devinfo, ixgbe->htable, intr_type, 0,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "return: %d, request: %d, actual: %d",
9da57d7b0ddd8d73b676ce12c040362132cdd538bt IXGBE_DEBUGLOG_1(ixgbe, "interrupts actually allocated: %d", actual);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Now we know the actual number of vectors. Here we map the vector
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * to other, rx rings and tx ring.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_log(ixgbe, "Insufficient interrupt handles available: %d",
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Get priority for first vector, assume remaining are all the same
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rc = ddi_intr_get_pri(ixgbe->htable[0], &ixgbe->intr_pri);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rc = ddi_intr_get_cap(ixgbe->htable[0], &ixgbe->intr_cap);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_add_intr_handlers - Add interrupt handlers based on the interrupt type.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Before adding the interrupt handlers, the interrupt vectors have
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * been allocated, and the rx/tx rings have also been allocated.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Add interrupt handler for rx and tx rings: vector[0 -
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * (ixgbe->intr_cnt -1)].
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng for (vector = 0; vector < (ixgbe->intr_cnt -1); vector++) {
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * install pointer to vect_map[vector]
9da57d7b0ddd8d73b676ce12c040362132cdd538bt "Add rx interrupt handler failed. "
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Add interrupt handler for other: vector[ixgbe->intr_cnt -1]
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Add interrupt handlers for the only vector
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Add interrupt handlers for the only vector
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_map_rxring_to_vector - Map given rx ring to given interrupt vector.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538btixgbe_map_rxring_to_vector(ixgbe_t *ixgbe, int r_idx, int v_idx)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Set bit in map
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Count bits set
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Remember bit position
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_map_txring_to_vector - Map given tx ring to given interrupt vector.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538btixgbe_map_txring_to_vector(ixgbe_t *ixgbe, int t_idx, int v_idx)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Set bit in map
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Count bits set
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Remember bit position
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * ixgbe_setup_ivar - Set the given entry in the given interrupt vector
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * allocation register (IVAR).
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_setup_ivar(ixgbe_t *ixgbe, uint16_t intr_alloc_entry, uint8_t msix_vector)
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ivar &= ~(0xFF << (8 * (intr_alloc_entry & 0x3)));
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ivar |= (msix_vector << (8 * (intr_alloc_entry & 0x3)));
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * ixgbe_enable_ivar - Enable the given entry by setting the VAL bit of
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * given interrupt vector allocation register (IVAR).
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_enable_ivar(ixgbe_t *ixgbe, uint16_t intr_alloc_entry)
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ivar |= (IXGBE_IVAR_ALLOC_VAL << (8 * (intr_alloc_entry & 0x3)));
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * ixgbe_enable_ivar - Disble the given entry by clearing the VAL bit of
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * given interrupt vector allocation register (IVAR).
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_disable_ivar(ixgbe_t *ixgbe, uint16_t intr_alloc_entry)
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ivar &= ~(IXGBE_IVAR_ALLOC_VAL << (8 * (intr_alloc_entry & 0x3)));
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_map_rings_to_vectors - Map descriptor rings to interrupt vectors.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * For MSI-X, here will map rx and tx ring to vector[0 - (vectors -1)].
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * The last vector will be used for other interrupt.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt int i, vector = 0;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt /* initialize vector map */
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * non-MSI-X case is very simple: rx rings[0] on RTxQ[0],
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * tx rings[0] on RTxQ[1].
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Ring/vector mapping for MSI-X
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Map vectors to rx rings
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Map vectors to tx rings
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_setup_adapter_vector - Setup the adapter interrupt vector(s).
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * This relies on ring/vector mapping already set up in the
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * vect_map[] structures
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Clear any previous entries
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * For non MSI-X interrupt, rx rings[0] will use RTxQ[0], and
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * tx rings[0] will use RTxQ[1].
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_setup_ivar(ixgbe, IXGBE_IVAR_RX_QUEUE(0), 0);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_setup_ivar(ixgbe, IXGBE_IVAR_TX_QUEUE(0), 1);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * For MSI-X interrupt, "Other" is always on last vector.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_setup_ivar(ixgbe, IXGBE_IVAR_OTHER_CAUSES_INDEX,
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * For each interrupt vector, populate the IVAR table
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * For each rx ring bit set
9da57d7b0ddd8d73b676ce12c040362132cdd538bt while (r_idx >= 0) {
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_setup_ivar(ixgbe, IXGBE_IVAR_RX_QUEUE(r_idx),
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * For each tx ring bit set
9da57d7b0ddd8d73b676ce12c040362132cdd538bt while (r_idx >= 0) {
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_setup_ivar(ixgbe, IXGBE_IVAR_TX_QUEUE(r_idx),
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_rem_intr_handlers - Remove the interrupt handlers.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_rem_intrs - Remove the allocated interrupts.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_enable_intrs - Enable all the ddi interrupts.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Enable interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Call ddi_intr_block_enable() for MSI
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rc = ddi_intr_block_enable(ixgbe->htable, ixgbe->intr_cnt);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Call ddi_intr_enable() for Legacy/MSI non block enable
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_disable_intrs - Disable all the interrupts.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Disable all interrupts
9da57d7b0ddd8d73b676ce12c040362132cdd538bt rc = ddi_intr_block_disable(ixgbe->htable, ixgbe->intr_cnt);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_get_hw_state - Get and save parameters related to adapter hardware.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo /* check for link, don't wait */
13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22Paul Guo (void) ixgbe_check_link(hw, &speed, &link_up, false);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->param_1000fdx_cap = (pcs1g_ana & IXGBE_PCS1GANA_FDC) ? 1 : 0;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe->param_100fdx_cap = (pcs1g_ana & IXGBE_PCS1GANA_FDC) ? 1 : 0;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_get_driver_control - Notify that driver is in control of device.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Notify firmware that driver is in control of device
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_release_driver_control - Notify that driver is no longer in control
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * of device.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Notify firmware that driver is no longer in control of device
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_atomic_reserve - Atomic decrease operation.
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ATOMICALLY
9da57d7b0ddd8d73b676ce12c040362132cdd538bt return (-1);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt } while (atomic_cas_32(count_p, oldval, newval) != oldval);
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_mc_table_itr - Traverse the entries in the multicast table.
9da57d7b0ddd8d73b676ce12c040362132cdd538btixgbe_mc_table_itr(struct ixgbe_hw *hw, uint8_t **upd_ptr, uint32_t *vmdq)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * FMA support
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * ixgbe_fm_error_cb - The IO fault service error handling callback function.
9da57d7b0ddd8d73b676ce12c040362132cdd538btixgbe_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * as the driver can always deal with an error in any dma or
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * access handle, we can just return the fme_status value.
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Only register with IO Fault Services if we have some capability
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_regs_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt ixgbe_regs_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC;
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Register capabilities with IO Fault Services
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Initialize pci ereport capabilities if ereport capable
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Register error callback if error callback capable
9da57d7b0ddd8d73b676ce12c040362132cdd538btstatic void
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Only unregister FMA capabilities if they are registered
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Release any resources allocated by pci_ereport_setup()
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Un-register error callback if error callback capable
9da57d7b0ddd8d73b676ce12c040362132cdd538bt * Unregister from IO Fault Service
9da57d7b0ddd8d73b676ce12c040362132cdd538bt (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_ring_start(mac_ring_driver_t rh, uint64_t mr_gen_num)
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)rh;
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Callback funtion for MAC layer to register all rings.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng/* ARGSUSED */
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_fill_ring(void *arg, mac_ring_type_t rtype, const int rg_index,
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_rx_ring_t *rx_ring = &ixgbe->rx_rings[ring_index];
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_tx_ring_t *tx_ring = &ixgbe->tx_rings[ring_index];
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Callback funtion for MAC layer to register all groups.
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_fill_group(void *arg, mac_ring_type_t rtype, const int index,
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng infop->mgi_driver = (mac_group_driver_t)rx_group;
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng infop->mgi_count = (ixgbe->num_rx_rings / ixgbe->num_rx_groups);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Enable interrupt on the specificed rx ring.
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_rx_ring_intr_enable(mac_intr_handle_t intrh)
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)intrh;
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ASSERT(BT_TEST(ixgbe->vect_map[v_idx].rx_map, r_idx) == 0);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * To enable interrupt by setting the VAL bit of given interrupt
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * vector allocation register (IVAR).
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_enable_ivar(ixgbe, IXGBE_IVAR_RX_QUEUE(r_idx));
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Disable interrupt on the specificed rx ring.
da14cebe459d3275048785f25bd869cb09b5307fEric Chengixgbe_rx_ring_intr_disable(mac_intr_handle_t intrh)
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)intrh;
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ASSERT(BT_TEST(ixgbe->vect_map[v_idx].rx_map, r_idx) == 1);
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * To disable interrupt by clearing the VAL bit of given interrupt
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * vector allocation register (IVAR).
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_disable_ivar(ixgbe, IXGBE_IVAR_RX_QUEUE(r_idx));
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Add a mac address.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_rx_group_t *rx_group = (ixgbe_rx_group_t *)arg;
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng /* no slots available */
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng for (slot = 0; slot < ixgbe->unicst_total; slot++) {
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ASSERT((slot >= 0) && (slot < ixgbe->unicst_total));
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng if ((err = ixgbe_unicst_set(ixgbe, mac_addr, slot)) == 0) {
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Remove a mac address.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng ixgbe_rx_group_t *rx_group = (ixgbe_rx_group_t *)arg;
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng bzero(ixgbe->unicst_addr[slot].mac.addr, ETHERADDRL);