ixgbe_api.c revision 3cfa0eb9019abbded0c93bce072ab4e73b989c13
/*
* CDDL HEADER START
*
* Copyright(c) 2007-2009 Intel Corporation. All rights reserved.
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at:
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When using or redistributing this file, you may do so under the
* License only. No other modification of this header is permitted.
*
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/* IntelVersion: 1.131 scm_100309_002210 */
#include "ixgbe_api.h"
#include "ixgbe_common.h"
/*
* ixgbe_init_shared_code - Initialize the shared code
* @hw: pointer to hardware structure
*
* This will assign function pointers and assign the MAC type and PHY code.
* Does not touch the hardware. This function must be called prior to any
* other function in the shared code. The ixgbe_hw structure should be
* memset to 0 prior to calling this function. The following fields in
* hw structure should be filled in prior to calling this function:
* hw_addr, back, device_id, vendor_id, subsystem_device_id,
* subsystem_vendor_id, and revision_id
*/
{
DEBUGFUNC("ixgbe_init_shared_code");
/*
* Set the mac type
*/
(void) ixgbe_set_mac_type(hw);
case ixgbe_mac_82598EB:
break;
case ixgbe_mac_82599EB:
break;
default:
break;
}
return (status);
}
/*
* ixgbe_set_mac_type - Sets MAC type
* @hw: pointer to the HW structure
*
* This function sets the mac type of the adapter based on the
* vendor ID and device ID stored in the hw structure.
*/
{
DEBUGFUNC("ixgbe_set_mac_type\n");
case IXGBE_DEV_ID_82598:
case IXGBE_DEV_ID_82598_BX:
case IXGBE_DEV_ID_82598AT:
case IXGBE_DEV_ID_82598AT2:
case IXGBE_DEV_ID_82598EB_CX4:
break;
case IXGBE_DEV_ID_82599_KX4:
case IXGBE_DEV_ID_82599_SFP:
case IXGBE_DEV_ID_82599_CX4:
break;
default:
break;
}
} else {
}
DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
return (ret_val);
}
/*
* ixgbe_init_hw - Initialize the hardware
* @hw: pointer to hardware structure
*
* Initialize the hardware by resetting and then starting the hardware
*/
{
}
/*
* ixgbe_reset_hw - Performs a hardware reset
* @hw: pointer to hardware structure
*
* Resets the hardware by resetting the transmit and receive units, masks and
* clears all interrupts, performs a PHY reset, and performs a MAC reset
*/
{
}
/*
* @hw: pointer to hardware structure
*
* Starts the hardware by filling the bus info structure and media type,
* clears all on chip counters, initializes receive address registers,
* multicast table, VLAN filter table, calls routine to setup link and
* flow control settings, and leaves transmit and receive units disabled
* and uninitialized.
*/
{
}
/*
* ixgbe_clear_hw_cntrs - Clear hardware counters
* @hw: pointer to hardware structure
*
* Clears all hardware statistics counters by reading them from the hardware
* Statistics counters are clear on read.
*/
{
}
/*
* ixgbe_get_media_type - Get media type
* @hw: pointer to hardware structure
*
* Returns the media type (fiber, copper, backplane)
*/
enum ixgbe_media_type
{
}
/*
* ixgbe_get_mac_addr - Get MAC address
* @hw: pointer to hardware structure
* @mac_addr: Adapter MAC address
*
* Reads the adapter's MAC address from the first Receive Address Register
* (RAR0) A reset of the adapter must have been performed prior to calling
* this function in order for the MAC address to have been loaded from the
* EEPROM into RAR0
*/
{
}
/*
* ixgbe_get_san_mac_addr - Get SAN MAC address
* @hw: pointer to hardware structure
* @san_mac_addr: SAN MAC address
*
* Reads the SAN MAC address from the EEPROM, if it's available. This is
* per-port, so set_lan_id() must be called before reading the addresses.
*/
{
}
/*
* ixgbe_set_san_mac_addr - Write a SAN MAC address
* @hw: pointer to hardware structure
* @san_mac_addr: SAN MAC address
*
* Writes A SAN MAC address to the EEPROM.
*/
{
}
/*
* ixgbe_get_device_caps - Get additional device capabilities
* @hw: pointer to hardware structure
* @device_caps: the EEPROM word for device capabilities
*
* Reads the extra device capabilities from the EEPROM
*/
{
}
/*
* @hw: pointer to hardware structure
* @wwnn_prefix: the alternative WWNN prefix
* @wwpn_prefix: the alternative WWPN prefix
*
* This function will read the EEPROM from the alternative SAN MAC address
*/
{
}
/*
* ixgbe_get_bus_info - Set PCI bus info
* @hw: pointer to hardware structure
*
* Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
*/
{
}
/*
* ixgbe_get_num_of_tx_queues - Get Tx queues
* @hw: pointer to hardware structure
*
* Returns the number of transmit queues for the given adapter.
*/
{
}
/*
* ixgbe_get_num_of_rx_queues - Get Rx queues
* @hw: pointer to hardware structure
*
* Returns the number of receive queues for the given adapter.
*/
{
}
/*
* @hw: pointer to hardware structure
*
* Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
* disables transmit and receive units. The adapter_stopped flag is used by
* the shared code and drivers to determine if the adapter is in a stopped
* state and should not touch the hardware.
*/
{
}
/*
* ixgbe_read_pba_num - Reads part number from EEPROM
* @hw: pointer to hardware structure
* @pba_num: stores the part number from the EEPROM
*
* Reads the part number from the EEPROM.
*/
{
}
/*
* ixgbe_identify_phy - Get PHY type
* @hw: pointer to hardware structure
*
* Determines the physical layer module found on the current adapter.
*/
{
(hw),
}
return (status);
}
/*
* ixgbe_reset_phy - Perform a PHY reset
* @hw: pointer to hardware structure
*/
{
}
}
if (status == IXGBE_SUCCESS) {
}
return (status);
}
/*
* ixgbe_get_phy_firmware_version -
* @hw: pointer to hardware structure
* @firmware_version: pointer to firmware version
*/
{
return (status);
}
/*
* ixgbe_read_phy_reg - Read PHY register
* @hw: pointer to hardware structure
* @reg_addr: 32 bit address of PHY register to read
* @phy_data: Pointer to read data from PHY register
*
* Reads a value from a specified PHY register
*/
{
(void) ixgbe_identify_phy(hw);
}
/*
* ixgbe_write_phy_reg - Write PHY register
* @hw: pointer to hardware structure
* @reg_addr: 32 bit PHY register to write
* @phy_data: Data to write to the PHY register
*
* Writes a value to specified PHY register
*/
{
(void) ixgbe_identify_phy(hw);
}
/*
* ixgbe_setup_phy_link - Restart PHY autoneg
* @hw: pointer to hardware structure
*
* Restart autonegotiation and PHY and waits for completion.
*/
{
}
/*
* ixgbe_check_phy_link - Determine link and speed status
* @hw: pointer to hardware structure
*
* Reads a PHY register to determine if link is up and the current speed for
* the PHY.
*/
bool *link_up)
{
}
/*
* ixgbe_setup_phy_link_speed - Set auto advertise
* @hw: pointer to hardware structure
* @speed: new link speed
* @autoneg: true if autonegotiation enabled
*
* Sets the auto advertised capabilities
*/
bool autoneg,
bool autoneg_wait_to_complete)
{
}
/*
* ixgbe_check_link - Get link and speed status
* @hw: pointer to hardware structure
*
* Reads the links register to determine if link is up and the current speed
*/
bool *link_up, bool link_up_wait_to_complete)
{
}
/*
* ixgbe_setup_link - Set link speed
* @hw: pointer to hardware structure
* @speed: new link speed
* @autoneg: true if autonegotiation enabled
*
* Configures link settings. Restarts the link.
* Performs autonegotiation if needed.
*/
bool autoneg,
bool autoneg_wait_to_complete)
{
}
/*
* ixgbe_get_link_capabilities - Returns link capabilities
* @hw: pointer to hardware structure
*
* Determines the link capabilities of the current configuration.
*/
bool *autoneg)
{
}
/*
* ixgbe_led_on - Turn on LEDs
* @hw: pointer to hardware structure
* @index: led number to turn on
*
* Turns on the software controllable LEDs.
*/
{
}
/*
* ixgbe_led_off - Turn off LEDs
* @hw: pointer to hardware structure
* @index: led number to turn off
*
* Turns off the software controllable LEDs.
*/
{
}
/*
* ixgbe_blink_led_start - Blink LEDs
* @hw: pointer to hardware structure
* @index: led number to blink
*
* Blink LED based on index.
*/
{
}
/*
* ixgbe_blink_led_stop - Stop blinking LEDs
* @hw: pointer to hardware structure
*
* Stop blinking LED based on index.
*/
{
}
/*
* ixgbe_init_eeprom_params - Initialize EEPROM parameters
* @hw: pointer to hardware structure
*
* Initializes the EEPROM parameters ixgbe_eeprom_info within the
* ixgbe_hw struct in order to set up EEPROM access.
*/
{
}
/*
* ixgbe_write_eeprom - Write word to EEPROM
* @hw: pointer to hardware structure
* @offset: offset within the EEPROM to be written to
* @data: 16 bit word to be written to the EEPROM
*
* Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
* called after this function, the EEPROM will most likely contain an
* invalid checksum.
*/
{
}
/*
* ixgbe_read_eeprom - Read word from EEPROM
* @hw: pointer to hardware structure
* @offset: offset within the EEPROM to be read
* @data: read 16 bit value from EEPROM
*
* Reads 16 bit value from EEPROM
*/
{
}
/*
* ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
* @hw: pointer to hardware structure
* @checksum_val: calculated checksum
*
* Performs checksum calculation and validates the EEPROM checksum
*/
{
}
/*
* ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
* @hw: pointer to hardware structure
*/
{
}
/*
* ixgbe_insert_mac_addr - Find a RAR for this mac address
* @hw: pointer to hardware structure
* @addr: Address to put into receive address register
* @vmdq: VMDq pool to assign
*
* Puts an ethernet address into a receive address register, or
* finds the rar that it is aleady in; adds to the pool list
*/
{
}
/*
* ixgbe_set_rar - Set Rx address register
* @hw: pointer to hardware structure
* @index: Receive address register to write
* @addr: Address to put into receive address register
* @vmdq: VMDq "set"
* @enable_addr: set flag that address is active
*
* Puts an ethernet address into a receive address register.
*/
{
}
/*
* ixgbe_clear_rar - Clear Rx address register
* @hw: pointer to hardware structure
* @index: Receive address register to write
*
* Puts an ethernet address into a receive address register.
*/
{
}
/*
* ixgbe_set_vmdq - Associate a VMDq index with a receive address
* @hw: pointer to hardware structure
* @rar: receive address register index to associate with VMDq index
* @vmdq: VMDq set or pool index
*/
{
}
/*
* ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
* @hw: pointer to hardware structure
* @rar: receive address register index to disassociate with VMDq index
* @vmdq: VMDq set or pool index
*/
{
}
/*
* ixgbe_init_rx_addrs - Initializes receive address filters.
* @hw: pointer to hardware structure
*
* Places the MAC address in receive address register 0 and clears the rest
* of the receive address registers. Clears the multicast table. Assumes
* the receiver is in reset when the routine is called.
*/
{
}
/*
* ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
* @hw: pointer to hardware structure
*/
{
}
/*
* ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
* @hw: pointer to hardware structure
* @addr_list: the list of new multicast addresses
* @addr_count: number of addresses
* @func: iterator function to walk the multicast address list
*
* The given list replaces any existing list. Clears the secondary addrs from
* receive address registers. Uses unused receive address registers for the
* first secondary addresses, and falls back to promiscuous mode as needed.
*/
{
}
/*
* ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
* @hw: pointer to hardware structure
* @mc_addr_list: the list of new multicast addresses
* @mc_addr_count: number of addresses
* @func: iterator function to walk the multicast address list
*
* The given list replaces any existing list. Clears the MC addrs from receive
* address registers and the multicast table. Uses unused receive address
* registers for the first multicast addresses, and hashes the rest into the
* multicast table.
*/
{
}
/*
* ixgbe_enable_mc - Enable multicast address in RAR
* @hw: pointer to hardware structure
*
* Enables multicast address in RAR and the use of the multicast hash table.
*/
{
}
/*
* ixgbe_disable_mc - Disable multicast address in RAR
* @hw: pointer to hardware structure
*
* Disables multicast address in RAR and the use of the multicast hash table.
*/
{
}
/*
* ixgbe_clear_vfta - Clear VLAN filter table
* @hw: pointer to hardware structure
*
* Clears the VLAN filer table, and the VMDq index associated with the filter
*/
{
}
/*
* ixgbe_set_vfta - Set VLAN filter table
* @hw: pointer to hardware structure
* @vlan: VLAN id to write to VLAN filter
* @vind: VMDq output index that maps queue to VLAN id in VFTA
*
*/
{
}
/*
* ixgbe_fc_enable - Enable flow control
* @hw: pointer to hardware structure
* @packetbuf_num: packet buffer number (0-7)
*
* Configures the flow control settings based on SW configuration.
*/
{
}
/*
* ixgbe_read_analog_reg8 - Reads 8 bit analog register
* @hw: pointer to hardware structure
* @reg: analog register to read
* @val: read value
*
* Performs write operation to analog register specified.
*/
{
}
/*
* ixgbe_write_analog_reg8 - Writes 8 bit analog register
* @hw: pointer to hardware structure
* @reg: analog register to write
* @val: value to write
*
* Performs write operation to Atlas analog register specified.
*/
{
}
/*
* ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
* @hw: pointer to hardware structure
*
* Initializes the Unicast Table Arrays to zero on device load. This
* is part of the Rx init addr execution path.
*/
{
}
/*
* ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
* @hw: pointer to hardware structure
* @byte_offset: byte offset to read
* @data: value read
*
* Performs byte read operation to SFP module's EEPROM over I2C interface.
*/
{
}
/*
* ixgbe_write_i2c_byte - Writes 8 bit word over I2C
* @hw: pointer to hardware structure
* @byte_offset: byte offset to write
* @data: value to write
*
* Performs byte write operation to SFP module's EEPROM over I2C interface
* at a specified device address.
*/
{
}
/*
* ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
* @hw: pointer to hardware structure
* @byte_offset: EEPROM byte offset to write
* @eeprom_data: value to write
*
* Performs byte write operation to SFP module's EEPROM over I2C interface.
*/
{
}
/*
* ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
* @hw: pointer to hardware structure
* @byte_offset: EEPROM byte offset to read
* @eeprom_data: value read
*
* Performs byte read operation to SFP module's EEPROM over I2C interface.
*/
{
}
/*
* ixgbe_get_supported_physical_layer - Returns physical layer type
* @hw: pointer to hardware structure
*
* Determines physical layer capabilities of the current configuration.
*/
{
(hw), IXGBE_NOT_IMPLEMENTED);
}
/*
* ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics
* @hw: pointer to hardware structure
* @regval: bitfield to write to the Rx DMA register
*
* Enables the Rx DMA unit of the device.
*/
{
}
/*
* ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
* @hw: pointer to hardware structure
* @mask: Mask to specify which semaphore to acquire
*
* Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
* function (CSR, PHY0, PHY1, EEPROM, Flash)
*/
{
}
/*
* ixgbe_release_swfw_semaphore - Release SWFW semaphore
* @hw: pointer to hardware structure
* @mask: Mask to specify which semaphore to release
*
* Releases the SWFW semaphore through SW_FW_SYNC register for the specified
* function (CSR, PHY0, PHY1, EEPROM, Flash)
*/
void
{
}