ixgbe_82598.c revision 13740cb230f19fcbf1a6468d1a6a0ba9a0a09c22
/*
* CDDL HEADER START
*
* Copyright(c) 2007-2008 Intel Corporation. All rights reserved.
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at:
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When using or redistributing this file, you may do so under the
* License only. No other modification of this header is permitted.
*
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms of the CDDL.
*/
/* IntelVersion: 1.112 v2008-09-12 */
#include "ixgbe_type.h"
#include "ixgbe_api.h"
#include "ixgbe_common.h"
#include "ixgbe_phy.h"
#ident "$Id: ixgbe_82598.c,v 1.112 2008/09/03 21:16:55 mrchilak Exp $"
bool autoneg_wait_to_complete);
u8 *eeprom_data);
/*
* ixgbe_init_ops_82598 - Inits func ptrs and MAC type
* @hw: pointer to hardware structure
*
* Initialize the function pointers and assign the MAC type for 82598.
* Does not touch the hardware.
*/
{
(void) ixgbe_init_phy_ops_generic(hw);
(void) ixgbe_init_ops_generic(hw);
/* MAC */
/* LEDs */
/* RAR, Multicast, VLAN */
/* Flow Control */
/* Link */
} else {
}
/* SFP+ Module */
/* Call PHY identify routine to get the phy type */
/* PHY Init */
case ixgbe_phy_tn:
break;
case ixgbe_phy_nl:
/* Call SFP+ identify routine to get the SFP+ module type */
if (ret_val != IXGBE_SUCCESS)
goto out;
goto out;
}
/* Check to see if SFP+ module is supported */
&list_offset, &data_offset);
if (ret_val != IXGBE_SUCCESS) {
goto out;
}
break;
default:
break;
}
out:
return (ret_val);
}
/*
* ixgbe_get_link_capabilities_82598 - Determines link capabilities
* @hw: pointer to hardware structure
* @speed: pointer to link speed
* @autoneg: boolean auto-negotiation value
*
* Determines the link capabilities by reading the AUTOC register.
*/
static s32
{
}
switch (autoc_reg & IXGBE_AUTOC_LMS_MASK) {
*autoneg = false;
break;
*autoneg = false;
break;
case IXGBE_AUTOC_LMS_1G_AN:
*autoneg = true;
break;
case IXGBE_AUTOC_LMS_KX4_AN:
if (autoc_reg & IXGBE_AUTOC_KX4_SUPP)
if (autoc_reg & IXGBE_AUTOC_KX_SUPP)
*autoneg = true;
break;
default:
break;
}
return (status);
}
/*
* ixgbe_get_copper_link_capabilities_82598 - Determines link capabilities
* @hw: pointer to hardware structure
* @speed: pointer to link speed
* @autoneg: boolean auto-negotiation value
*
* Determines the link capabilities by reading the AUTOC register.
*/
{
*speed = 0;
*autoneg = true;
if (status == IXGBE_SUCCESS) {
}
return (status);
}
/*
* ixgbe_get_media_type_82598 - Determines media type
* @hw: pointer to hardware structure
*
* Returns the media type (fiber, copper, backplane)
*/
static enum ixgbe_media_type
{
enum ixgbe_media_type media_type;
/* Media type for I82598 is based on device ID */
case IXGBE_DEV_ID_82598EB_CX4:
break;
case IXGBE_DEV_ID_82598AT:
break;
default:
break;
}
return (media_type);
}
/*
* ixgbe_setup_fc_82598 - Configure flow control settings
* @hw: pointer to hardware structure
* @packetbuf_num: packet buffer number (0-7)
*
* Configures the flow control settings based on SW configuration. This
* function is used for 802.3x flow control configuration only.
*/
{
DEBUGOUT1("Invalid packet buffer number [%d], expected range is"
" 0-7\n", packetbuf_num);
ASSERT(0);
}
/*
* 10 gig parts do not have a word in the EEPROM to determine the
* default flow control setting, so we explicitly set it to full.
*/
/*
* We want to save off the original Flow Control configuration just in
* case we get disconnected and then reconnected into a different hub
* or switch with different Flow Control capabilities.
*/
/*
* The possible values of the "flow_control" parameter are:
* 0: Flow control is completely disabled
* 1: Rx flow control is enabled (we can receive pause frames but not
* send pause frames).
* 2: Tx flow control is enabled (we can send pause frames but we do not
* support receiving pause frames)
* 3: Both Rx and Tx flow control (symmetric) are enabled.
* other: Invalid.
*/
case ixgbe_fc_none:
break;
case ixgbe_fc_rx_pause:
/*
* Rx Flow control is enabled,
* and Tx Flow control is disabled.
*/
break;
case ixgbe_fc_tx_pause:
/*
* Tx Flow control is enabled, and Rx Flow control is disabled,
* by a software over-ride.
*/
break;
case ixgbe_fc_full:
/*
* Flow control (both Rx and Tx) is enabled by a software
* over-ride.
*/
break;
default:
/* We should never get here. The value should be 0-3. */
DEBUGOUT("Flow control param set incorrectly\n");
ASSERT(0);
break;
}
/* Enable 802.3x based flow control settings. */
/*
* Check for invalid software configuration, zeros are completely
* invalid for all parameters used past this point, and if we enable
* flow control with zero water marks, we blast flow control packets.
*/
DEBUGOUT("Flow control structure initialized incorrectly\n");
return (IXGBE_ERR_INVALID_LINK_SETTINGS);
}
/*
* We need to set up the Receive Threshold high and low water
* marks as well as (optionally) enabling the transmission of
* XON frames.
*/
} else {
}
}
return (IXGBE_SUCCESS);
}
/*
* ixgbe_setup_mac_link_82598 - Configures MAC link settings
* @hw: pointer to hardware structure
*
* Configures link settings based on values in the ixgbe_hw struct.
* Restarts the link. Performs autonegotiation if needed.
*/
static s32
{
u32 i;
msec_delay(50);
}
/* Restart link */
/* Only poll for autoneg to complete if specified to do so */
links_reg = 0; /* Just in case Autoneg time = 0 */
for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
if (links_reg & IXGBE_LINKS_KX_AN_COMP)
break;
msec_delay(100);
}
if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
DEBUGOUT("Autonegotiation did not complete.\n");
}
}
}
/*
* We want to save off the original Flow Control configuration just in
* case we get disconnected and then reconnected into a different hub
* or switch with different Flow Control capabilities.
*/
(void) ixgbe_setup_fc_82598(hw, 0);
/* Add delay to filter out noises during initial link setup */
msec_delay(50);
return (status);
}
/*
* @hw: pointer to hardware structure
* @speed: pointer to link speed
* @link_up: TRUE is link is up, FALSE otherwise
*
* Reads the links register to determine if link is up and the current speed
*/
static s32
bool *link_up, bool link_up_wait_to_complete)
{
u32 i;
/*
* SERDES PHY requires us to read link status from undocumented
* indicates link down. OxC00C is read to check that the XAUI lanes
* are active. Bit 0 clear indicates active; set indicates inactive.
*/
if (link_up_wait_to_complete) {
for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
if ((link_reg & 1) &&
((adapt_comp_reg & 1) == 0)) {
*link_up = true;
break;
} else {
*link_up = false;
}
msec_delay(100);
}
} else {
if ((link_reg & 1) &&
((adapt_comp_reg & 1) == 0))
*link_up = true;
else
*link_up = false;
}
if (*link_up == false)
goto out;
}
if (link_up_wait_to_complete) {
for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
if (links_reg & IXGBE_LINKS_UP) {
*link_up = true;
break;
} else {
*link_up = false;
}
msec_delay(100);
}
} else {
if (links_reg & IXGBE_LINKS_UP)
*link_up = true;
else
*link_up = false;
}
if (links_reg & IXGBE_LINKS_SPEED)
else
out:
return (IXGBE_SUCCESS);
}
/*
* ixgbe_setup_mac_link_speed_82598 - Set MAC link speed
* @hw: pointer to hardware structure
* @speed: new link speed
* @autoneg: TRUE if auto-negotiation enabled
* @autoneg_wait_to_complete: TRUE if waiting is needed to complete
*
* Set the link speed in the AUTOC register and restarts link.
*/
static s32
bool autoneg_wait_to_complete)
{
/* If speed is 10G, then check for CX4 or XAUI. */
if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
} else if (autoneg) {
/* BX mode - Autonegotiate 1G */
} else {
}
if (status == IXGBE_SUCCESS) {
/*
* Setup and restart the link based on the new values in
* ixgbe_hw This will write the AUTOC register based on the new
* stored values
*/
(void) ixgbe_setup_mac_link_82598(hw);
}
return (status);
}
/*
* ixgbe_setup_copper_link_82598 - Setup copper link settings
* @hw: pointer to hardware structure
*
* Configures link settings based on values in the ixgbe_hw struct.
* Restarts the link. Performs autonegotiation if needed. Restart
* phy and wait for autonegotiate to finish. Then synchronize the
* MAC and PHY.
*/
static s32
{
/* Restart autonegotiation on PHY */
/* Set up MAC */
(void) ixgbe_setup_mac_link_82598(hw);
return (status);
}
/*
* ixgbe_setup_copper_link_speed_82598 - Set the PHY autoneg advertised field
* @hw: pointer to hardware structure
* @speed: new link speed
* @autoneg: TRUE if autonegotiation enabled
* @autoneg_wait_to_complete: TRUE if waiting is needed to complete
*
* Sets the link speed in the AUTOC register in the MAC and restarts link.
*/
static s32
bool autoneg,
bool autoneg_wait_to_complete)
{
/* Setup the PHY according to input speed */
/* Set up MAC */
(void) ixgbe_setup_mac_link_82598(hw);
return (status);
}
/*
* ixgbe_reset_hw_82598 - Performs hardware reset
* @hw: pointer to hardware structure
*
* Resets the hardware by resetting the transmit and receive units, masks and
* clears all interrupts, performing a PHY reset, and performing a link (MAC)
* reset.
*/
static s32
{
u32 i;
/*
* Power up the Atlas Tx lanes if they are currently powered down.
* Atlas Tx lanes are powered down for MAC loopback tests, but
* they are not automatically restored on reset.
*/
if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) {
/* Enable Tx Atlas so packets can be transmitted again */
&analog_val);
&analog_val);
&analog_val);
&analog_val);
}
/* Reset PHY */
/*
* Prevent the PCI-E bus from from hanging by disabling PCI-E master
* access and verify no pending requests before reset
*/
DEBUGOUT("PCI-E Master disable polling has failed.\n");
}
/*
* Issue global reset to the MAC. This needs to be a SW reset.
* If link reset is used, it might reset the MAC when mng is using it
*/
/* Poll for reset bit to self-clear indicating reset is complete */
for (i = 0; i < 10; i++) {
usec_delay(1);
if (!(ctrl & IXGBE_CTRL_RST))
break;
}
if (ctrl & IXGBE_CTRL_RST) {
DEBUGOUT("Reset polling failed to complete.\n");
}
msec_delay(50);
/*
* AUTOC register which stores link settings gets cleared
* and reloaded from EEPROM after reset. We need to restore
* our stored value from init in case SW changed the attach
* type or speed. If this is the first time and link settings
* have not been stored, store default settings from AUTOC.
*/
autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE);
autoc &= ~(IXGBE_AUTOC_LMS_MASK);
} else {
}
/* Store the permanent mac address */
return (status);
}
/*
* ixgbe_set_vmdq_82598 - Associate a VMDq set index with a rx address
* @hw: pointer to hardware struct
* @rar: receive address register index to associate with a VMDq index
* @vmdq: VMDq set index
*/
{
return (IXGBE_SUCCESS);
}
/*
* ixgbe_clear_vmdq_82598 - Disassociate a VMDq set index from an rx address
* @hw: pointer to hardware struct
* @rar: receive address register index to associate with a VMDq index
* @vmdq: VMDq clear index (not used in 82598, but elsewhere)
*/
static s32
{
if (rar < rar_entries) {
if (rar_high & IXGBE_RAH_VIND_MASK) {
}
} else {
}
return (IXGBE_SUCCESS);
}
/*
* ixgbe_set_vfta_82598 - Set VLAN filter table
* @hw: pointer to hardware structure
* @vlan: VLAN id to write to VLAN filter
* @vind: VMDq output index that maps queue to VLAN id in VFTA
*
*/
{
if (vlan > 4095)
return (IXGBE_ERR_PARAM);
/* Determine 32-bit word position in array */
/* Determine the location of the (VMD) queue index */
/* Set the nibble for VMD queue index */
/* Determine the location of the bit for this VLAN id */
if (vlan_on)
/* Turn on this VLAN id */
else
/* Turn off this VLAN id */
return (IXGBE_SUCCESS);
}
/*
* ixgbe_clear_vfta_82598 - Clear VLAN filter table
* @hw: pointer to hardware structure
*
* Clears the VLAN filer table, and the VMDq index associated with the filter
*/
static s32
{
return (IXGBE_SUCCESS);
}
/*
* ixgbe_blink_led_start_82598 - Blink LED based on index.
* @hw: pointer to hardware structure
* @index: led number to blink
*/
static s32
{
ixgbe_link_speed speed = 0;
bool link_up = 0;
/*
* Link must be up to auto-blink the LEDs on the 82598EB MAC;
* force it if link is down.
*/
if (!link_up) {
msec_delay(10);
}
return (IXGBE_SUCCESS);
}
/*
* ixgbe_blink_led_stop_82598 - Stop blinking LED based on index.
* @hw: pointer to hardware structure
* @index: led number to stop blinking
*/
static s32
{
autoc_reg &= ~IXGBE_AUTOC_FLU;
return (IXGBE_SUCCESS);
}
/*
* ixgbe_read_analog_reg8_82598 - Reads 8 bit Atlas analog register
* @hw: pointer to hardware structure
* @reg: analog register to read
* @val: read value
*
* Performs read operation to Atlas analog register specified.
*/
{
usec_delay(10);
return (IXGBE_SUCCESS);
}
/*
* ixgbe_write_analog_reg8_82598 - Writes 8 bit Atlas analog register
* @hw: pointer to hardware structure
* @reg: atlas register to write
* @val: value to write
*
* Performs write operation to Atlas analog register specified.
*/
{
usec_delay(10);
return (IXGBE_SUCCESS);
}
/*
* ixgbe_read_i2c_eeprom_82598 - Reads 8 bit EEPROM word of an SFP+ module
* over I2C interface through an intermediate phy, such as NetLogic phy.
* @hw: pointer to hardware structure
* @byte_offset: EEPROM byte offset to read
* @eeprom_data: value read
*
* Performs byte read operation to SFP module's EEPROM over I2C interface.
*/
{
u32 i;
/*
* 0xC30D. These registers are used to talk to the SFP+
*/
/* Poll status */
for (i = 0; i < 100; i++) {
break;
msec_delay(10);
}
if (sfp_stat != IXGBE_I2C_EEPROM_STATUS_PASS) {
DEBUGOUT("EEPROM read did not pass.\n");
goto out;
}
/* Read data */
} else {
goto out;
}
out:
return (status);
}
/*
* ixgbe_get_supported_physical_layer_82598 - Returns physical layer type
* @hw: pointer to hardware structure
*
* Determines physical layer capabilities of the current configuration.
*/
{
case IXGBE_DEV_ID_82598EB_CX4:
break;
break;
break;
break;
case IXGBE_DEV_ID_82598AT:
break;
case ixgbe_sfp_type_da_cu:
break;
case ixgbe_sfp_type_sr:
break;
case ixgbe_sfp_type_lr:
break;
default:
break;
}
break;
default:
break;
}
return (physical_layer);
}