iwk2.c revision ff3124eff995e6cd8ebd8c6543648e0670920034
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Use is subject to license terms.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Copyright (c) 2007, Intel Corporation
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * All rights reserved.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Copyright (c) 2006
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Copyright (c) 2007
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Damien Bergamini <damien.bergamini@free.fr>
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Permission to use, copy, modify, and distribute this software for any
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * purpose with or without fee is hereby granted, provided that the above
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * copyright notice and this permission notice appear in all copies.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx#pragma ident "%Z%%M% %I% %E% SMI"
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Driver for Intel PRO/Wireless 4965AGN(kedron) 802.11 network adapters.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx#define IWK_DBG(x) \
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* DMA attributes for a shared page */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* lowest usable address */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* flags (reserved) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* DMA attributes for a keep warm DRAM descriptor */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* lowest usable address */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* flags (reserved) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* DMA attributes for a ring descriptor */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* lowest usable address */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* flags (reserved) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* DMA attributes for a cmd */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* lowest usable address */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* flags (reserved) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* DMA attributes for a rx buffer */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* lowest usable address */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* flags (reserved) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * DMA attributes for a tx buffer.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * the maximum number of segments is 4 for the hardware.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * now all the wifi drivers put the whole frame in a single
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * descriptor, so we define the maximum number of segments 1,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * just the same as the rx_buffer. we consider leverage the HW
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * ability in the future, that is why we don't define rx and tx
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * buffer_dma_attr as the same.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* lowest usable address */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* flags (reserved) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* DMA attributes for text and data part in the firmware */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* lowest usable address */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx 0, /* flags (reserved) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* regs access attributes */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* DMA access attributes */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx int, int);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void iwk_reset_tx_ring(iwk_sc_t *, iwk_tx_ring_t *);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void iwk_free_tx_ring(iwk_sc_t *, iwk_tx_ring_t *);
43439c96b8398c01c375889c79bed72d78fb4c39hxstatic ieee80211_node_t *iwk_node_alloc(ieee80211com_t *);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_newstate(ieee80211com_t *, enum ieee80211_state, int);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_key_set(ieee80211com_t *, const struct ieee80211_key *,
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void iwk_reg_write(iwk_sc_t *, uint32_t, uint32_t);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_cmd(iwk_sc_t *, int, const void *, int, int);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void iwk_set_led(iwk_sc_t *, uint8_t, uint8_t, uint8_t);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * GLD specific operations
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_m_stat(void *arg, uint_t stat, uint64_t *val);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_m_unicst(void *arg, const uint8_t *macaddr);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_m_multicst(void *arg, boolean_t add, const uint8_t *m);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void iwk_m_ioctl(void *arg, queue_t *wq, mblk_t *mp);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Supported rates for 802.11b/g modes (in 500Kbps unit).
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * 11a and 11n support will be added later.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * For mfthread only
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Module Loading Data & Entry Points
c533a883a71cff9ff32df1c53c31201e1cbf371fhxDDI_DEFINE_STREAM_OPS(iwk_devops, nulldev, nulldev, iwk_attach,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "Intel(R) 4965AGN driver(N)",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Mac Call Back entries
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * device operations
d62cb7fff63265824a8e6725a3bcef698f6134c9hx switch (cmd) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to allocate soft state\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to map config spaces regs\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ddi_put8(sc->sc_cfg_handle, (uint8_t *)(sc->sc_cfg_base + 0x41), 0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_dmabuf_sz = roundup(0x1000 + sizeof (struct ieee80211_frame) +
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Map operating registers
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to map device regs\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Initialize mutexs and condvars
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to do ddi_get_iblock_cookie()\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx mutex_init(&sc->sc_glock, NULL, MUTEX_DRIVER, sc->sc_iblk);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx mutex_init(&sc->sc_tx_lock, NULL, MUTEX_DRIVER, sc->sc_iblk);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * initialize the mfthread
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate shared page.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate keep warm page.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Do some necessary hardware initializations.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* initialize EEPROM */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_eep_load(sc); /* get hardware configurations from eeprom */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (err != 0) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx cmn_err(CE_WARN, "iwk_attach(): failed to load eeprom\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (sc->sc_eep_map.calib_version < EEP_TX_POWER_VERSION_NEW) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to allocate and initialize ring\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to allocate firmware dma\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Initialize the wifi part, which will be used by
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * generic layer
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT |
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * use software WEP and TKIP, hardware CCMP;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* set supported .11b and .11g rates */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* set supported .11b and .11g channels (1 through 14) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * init Wifi layer
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * different instance has different WPA door
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) snprintf(ic->ic_wpadoor, MAX_IEEE80211STR, "%s_%s%d", WPA_DOOR,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Override 80211 default routines
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * initialize default tx key
c533a883a71cff9ff32df1c53c31201e1cbf371fhx &sc->sc_rx_softint_id, &sc->sc_iblk, NULL, iwk_rx_softintr,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to do ddi_add_softintr()\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Add the interrupt handler
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to do ddi_add_intr()\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Initialize pointer to device specific functions
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to do mac_alloc()\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Register the macp to mac
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to do mac_register()\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Create minor node of type DDI_NT_NET_WIFI
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) snprintf(strbuf, sizeof (strbuf), DRV_NAME_4965"%d", instance);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_attach(): failed to do ddi_create_minor_node()\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Notify link is down now
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * create the mf thread to handle the link status,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * recovery fatal error, etc.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc = ddi_get_soft_state(iwk_soft_state_p, ddi_get_instance(dip));
d62cb7fff63265824a8e6725a3bcef698f6134c9hx switch (cmd) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Destroy the mf_thread
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Unregiste from the MAC layer subsystem
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * detach ieee80211
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ddi_soft_state_free(iwk_soft_state_p, ddi_get_instance(dip));
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate an area of memory and a DMA handle for accessing it
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ddi_dma_attr_t *dma_attr_p, ddi_device_acc_attr_t *acc_attr_p,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate handle
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate memory
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, acc_attr_p,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx DDI_DMA_SLEEP, NULL, &vaddr, &dma_p->alength, &dma_p->acc_hdl);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Bind the two together
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Free one allocated area of DMAable memory
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * firmware image layout:
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * |HDR|<-TEXT->|<-DATA->|<-INIT_TEXT->|<-INIT_DATA->|<-BOOT->|
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "text[ncookies:%d addr:%lx size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " text dma memory");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) memcpy(dma_p->mem_va, t, LE_32(sc->sc_hdr->textsz));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "data[ncookies:%d addr:%lx size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " data dma memory");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) memcpy(dma_p->mem_va, t, LE_32(sc->sc_hdr->datasz));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " data bakeup dma memory");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) memcpy(dma_p->mem_va, t, LE_32(sc->sc_hdr->datasz));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_alloc_dma_mem(sc, LE_32(sc->sc_hdr->init_textsz),
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "init_text[ncookies:%d addr:%lx "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "init text dma memory");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) memcpy(dma_p->mem_va, t, LE_32(sc->sc_hdr->init_textsz));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_alloc_dma_mem(sc, LE_32(sc->sc_hdr->init_datasz),
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "init_data[ncookies:%d addr:%lx "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "init data dma memory");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) memcpy(dma_p->mem_va, t, LE_32(sc->sc_hdr->init_datasz));
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate a shared page between host and NIC.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* must be aligned on a 4K-page boundary */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "sh[ncookies:%d addr:%lx size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate a keep warm page.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* must be aligned on a 4K-page boundary */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "kw[ncookies:%d addr:%lx size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_alloc_dma_mem(sc, RX_QUEUE_SIZE * sizeof (uint32_t),
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "rx bd[ncookies:%d addr:%lx size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate Rx buffers.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < RX_QUEUE_SIZE; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "buf[%d] failed\n", i));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * the physical address bit [8-36] are used,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * instead of bit [0-31] in 3945.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "rx buffer[0][ncookies:%d addr:%lx "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (n = 0; n < 2000; n++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (n == 2000)
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < RX_QUEUE_SIZE; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "tx bd[ncookies:%d addr:%lx size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "tx cmd[ncookies:%d addr:%lx size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Allocate Tx buffers.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ring->data = kmem_zalloc(sizeof (iwk_tx_data_t) * TFD_QUEUE_SIZE_MAX,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "tx data slots\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < TFD_QUEUE_SIZE_MAX; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "ring buf[%d] failed\n", i));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* ((i % slots) * sizeof (iwk_cmd_t)); */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_DMA, "tx buffer[0][ncookies:%d addr:%lx "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "size:%lx]\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, IWK_FH_TCSR_CHNL_TX_CONFIG_REG(ring->qid), 0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (n = 0; n < 200; n++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx kmem_free(ring->data, ring->count * sizeof (iwk_tx_data_t));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < IWK_NUM_QUEUES; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_alloc_tx_ring(sc, &sc->sc_txq[i], TFD_TX_CMD_SLOTS,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_alloc_tx_ring(sc, &sc->sc_txq[IWK_CMD_QUEUE_NUM],
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx while (--i >= 0) {
43439c96b8398c01c375889c79bed72d78fb4c39hx/* ARGSUSED */
43439c96b8398c01c375889c79bed72d78fb4c39hxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhxiwk_newstate(ieee80211com_t *ic, enum ieee80211_state nstate, int arg)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx switch (nstate) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* let LED blink when scanning */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "could not initiate scan\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* reset state to handle reassociations correctly */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.filter_flags &= ~LE_32(RXON_FILTER_ASSOC_MSK);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * before sending authentication and association request frame,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * we need do something in the hardware, such as setting the
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * channel same to the target AP...
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "could not send authentication request\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* let LED blink when monitoring */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* need setup beacon here */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* update adapter's configuration */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* short preamble/slot time are negotiated when associating */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.flags &= ~LE_32(RXON_FLG_SHORT_PREAMBLE_MSK |
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.filter_flags |= LE_32(RXON_FILTER_ASSOC_MSK);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " filter_flags %x\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "could not update configuration\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * set Tx power for 2.4GHz channels
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * (need further investigation. fix tx power at present)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * This cmd should be issued each time the reply_rxon cmd is
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * invoked.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < POWER_TABLE_NUM_HT_OFDM_ENTRIES; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx txpower.tx_power.ht_ofdm_power[POWER_TABLE_NUM_HT_OFDM_ENTRIES]
c533a883a71cff9ff32df1c53c31201e1cbf371fhx txpower.tx_power.ht_ofdm_power[POWER_TABLE_NUM_HT_OFDM_ENTRIES]
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "set txpower\n");
43439c96b8398c01c375889c79bed72d78fb4c39hx /* start automatic rate control */
43439c96b8398c01c375889c79bed72d78fb4c39hx /* set rate to some reasonable initial value */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* set LED on after associated */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* set LED off after init */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic int iwk_key_set(ieee80211com_t *ic, const struct ieee80211_key *k,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx return (0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.filter_flags &= ~(RXON_FILTER_DIS_DECRYPT_MSK
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* update ap/multicast node */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx node.key_flags |= (STA_KEY_FLG_CCMP | (1 << 3) | (k->wk_keyix << 8));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_cmd(sc, REPLY_ADD_STA, &node, sizeof (node), 1);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to update ap node\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx return (0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx return (1);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * exclusive access to mac begin.
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* wait until we succeed */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (n = 0; n < 1000; n++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (n == 1000)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * exclusive access to mac end.
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * this function defined here for future use.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * static uint32_t
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * iwk_mem_read(iwk_sc_t *sc, uint32_t addr)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * IWK_WRITE(sc, HBUS_TARG_MEM_RADDR, addr);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * return (IWK_READ(sc, HBUS_TARG_MEM_RDAT));
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * ucode load/initialization steps:
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * 1) load Bootstrap State Machine (BSM) with "bootstrap" uCode image.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * BSM contains a small memory that *always* stays powered up, so it can
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * retain the bootstrap program even when the card is in a power-saving
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * power-down state. The BSM loads the small program into ARC processor's
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * instruction memory when triggered by power-up.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * 2) load Initialize image via bootstrap program.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * The Initialize image sets up regulatory and calibration data for the
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Runtime/Protocol uCode. This sends a REPLY_ALIVE notification when completed.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * The 4965 reply contains calibration data for temperature, voltage and tx gain
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * correction.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * The physical address bit [4-35] of the initialize uCode.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * In the initialize alive notify interrupt the physical address of
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * the runtime ucode will be set for loading.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* load bootstrap code into BSM memory */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx iwk_reg_write_region_4(sc, BSM_SRAM_LOWER_BOUND, boot_fw,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx iwk_reg_write(sc, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx iwk_reg_write(sc, BSM_WR_DWCOUNT_REG, size / sizeof (uint32_t));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * prepare to load initialize uCode
c533a883a71cff9ff32df1c53c31201e1cbf371fhx iwk_reg_write(sc, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* wait while the adapter is busy loading the firmware */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (n = 0; n < 1000; n++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (n == 1000) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "timeout transferring firmware\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* for future power-save mode use */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx iwk_reg_write(sc, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhxiwk_rx_intr(iwk_sc_t *sc, iwk_rx_desc_t *desc, iwk_rx_data_t *data)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* assuming not 11n here. cope with 11n in phase-II */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx phyinfo = (struct iwk_rx_non_cfg_phy *)stat->non_cfg_phy;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx agc = (phyinfo->agc_info & IWK_AGC_DB_MASK) >> IWK_AGC_DB_POS;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < 3; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * convert dBm to percentage ???
c533a883a71cff9ff32df1c53c31201e1cbf371fhx rssi = (100 * 75 * 75 - (-20 - t) * (15 * 75 + 62 * (-20 - t)))
c533a883a71cff9ff32df1c53c31201e1cbf371fhx tail = (uint32_t *)((uint8_t *)(stat + 1) + stat->cfg_phy_cnt + len);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_RX, "rx intr: idx=%d phy_len=%x len=%d "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "rate=%x chan=%d tstamp=%x non_cfg_phy_count=%x "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * discard Rx frames with bad CRC
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (RX_RES_STATUS_NO_CRC32_ERROR | RX_RES_STATUS_NO_RXE_OVERFLOW)) !=
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (RX_RES_STATUS_NO_CRC32_ERROR | RX_RES_STATUS_NO_RXE_OVERFLOW)) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (*(uint8_t *)wh == IEEE80211_FC0_SUBTYPE_ASSOC_RESP) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* send the frame to the 802.11 layer */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_rx_intr(): alloc rx buf failed\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* release node reference */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhxiwk_tx_intr(iwk_sc_t *sc, iwk_rx_desc_t *desc, iwk_rx_data_t *data)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " retries=%d frame_count=%x nkill=%d "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "rate=%x duration=%d status=%x\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx desc->hdr.qid, desc->hdr.idx, stat->ntries, stat->frame_count,
43439c96b8398c01c375889c79bed72d78fb4c39hx IWK_DBG((IWK_DEBUG_RATECTL, "tx: %d cnt\n", amrr->txcnt));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if ((sc->sc_need_reschedule) && (ring->queued <= (ring->count << 3))) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "qid=%x idx=%d flags=%x type=0x%x\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* the microcontroller is ready */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "microcode alive notification minor: %x major: %x type:"
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " %x subtype: %x\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ar->ucode_minor, ar->ucode_minor, ar->ver_type, ar->ver_subtype));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "microcontroller initialization failed\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "initialization alive received.\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sizeof (struct iwk_init_alive_resp));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* XXX get temperature */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sizeof (struct iwk_alive_resp));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Init SCD related registers to make Tx work. XXX
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* read sram address of data base */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* clear and init SCD_CONTEXT_DATA_OFFSET area. 128 bytes */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (base = sc->sc_scd_base + SCD_CONTEXT_DATA_OFFSET, i = 0;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* clear and init SCD_TX_STTS_BITMAP_OFFSET area. 256 bytes */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* clear and init SCD_TRANSLATE_TBL_OFFSET area. 32 bytes */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* initiate the tx queues */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < IWK_NUM_QUEUES; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* interrupt enable on each queue0-7 */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* enable each channel 0-7 */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * queue 0-7 maps to FIFO 0-7 and
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * all queues work under FIFO mode (none-scheduler-ack)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < 7; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* disable interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * firmware has moved the index of the rx queue, driver get it,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * and deal with it.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " cur = %d qid=%x idx=%d flags=%x type=%x len=%d\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* a command other than a tx need to be replied */
43439c96b8398c01c375889c79bed72d78fb4c39hx * the radio button has to be pushed(OFF). It
43439c96b8398c01c375889c79bed72d78fb4c39hx * is considered as a hw error, the
43439c96b8398c01c375889c79bed72d78fb4c39hx * iwk_thread() tries to recover it after the
43439c96b8398c01c375889c79bed72d78fb4c39hx * button is pushed again(ON)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk: Radio transmitter is off\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "scanning channel %d status %x\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * driver dealt with what reveived in rx queue and tell the information
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * to the firmware.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, index & (~7));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* re-enable interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (r == 0 || r == 0xffffffff) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* disable interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* ack interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* re-enable interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx switch (rate) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* CCK rates */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* OFDM rates */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx return (mp);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/* ARGSUSED */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx int rate, hdrlen, len, len0, mblen, off, err = IWK_SUCCESS;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (m == NULL) { /* can not alloc buf, drop this package */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_send(): failed to allocate msgbuf\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx cmn_err(CE_WARN, "iwk_send(): failed to find tx node\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (k == NULL) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_AES_CCM) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* packet header may have moved, reset our local pointer */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* pickup a rate */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* mgmt frames are sent at 1M */
43439c96b8398c01c375889c79bed72d78fb4c39hx * do it here for the software way rate control.
43439c96b8398c01c375889c79bed72d78fb4c39hx * later for rate scaling in hardware.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * maybe like the following, for management frame:
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * tx->initial_rate_index = LINK_QUAL_MAX_RETRY_NUM - 1;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * for data frame:
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * tx->tx_flags |= (LE_32(TX_CMD_FLG_STA_RATE_MSK));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * rate = in->in_rates.ir_rates[in->in_txrate];
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * tx->initial_rate_index = 1;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * now the txrate is determined in tx cmd flags, set to the
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * max value 54M for 11g and 11M for 11b.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* retrieve destination node's id */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* tell h/w to set timestamp in probe responses */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx tx->rate.r.rate_n_flags = (iwk_rate_to_plcp(rate) | masks);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) memcpy(data->dma_data.mem_va, m->b_rptr, len - hdrlen);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_TX, "sending data: qid=%d idx=%d len=%d",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * first segment includes the tx cmd plus the 802.11 header,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * the second includes the remaining of the 802.11 frame.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ((data->dma_data.cookie.dmac_address & 0xffff0000) >> 16) |
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_TX, "phy addr1 = 0x%x phy addr2 = 0x%x "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "len1 = 0x%x, len2 = 0x%x val1 = 0x%x val2 = 0x%x",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx len0, len - hdrlen, desc->pa[0].val1, desc->pa[0].val2));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* kick ring */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_shared->queues_byte_cnt_tbls[ring->qid].tfd_offset[ring->cur].val
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* release node reference */
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
43439c96b8398c01c375889c79bed72d78fb4c39hx * This is special for the hidden AP connection.
43439c96b8398c01c375889c79bed72d78fb4c39hx * In any case, we should make sure only one 'scan'
43439c96b8398c01c375889c79bed72d78fb4c39hx * in the driver for a 'connect' CLI command. So
43439c96b8398c01c375889c79bed72d78fb4c39hx * when connecting to a hidden AP, the scan is just
43439c96b8398c01c375889c79bed72d78fb4c39hx * sent out to the air when we know the desired
43439c96b8398c01c375889c79bed72d78fb4c39hx * essid of the AP we want to connect.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhx switch (stat) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx *val = ((ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) ?
43439c96b8398c01c375889c79bed72d78fb4c39hx * The hw init err(eg. RF is OFF). Return Success to make
43439c96b8398c01c375889c79bed72d78fb4c39hx * the 'plumb' succeed. The iwk_thread() tries to re-init
43439c96b8398c01c375889c79bed72d78fb4c39hx * background.
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_m_unicst(): "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to configure device\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhxiwk_m_multicst(void *arg, boolean_t add, const uint8_t *m)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx/*ARGSUSED*/
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
d62cb7fff63265824a8e6725a3bcef698f6134c9hx * If in SUSPEND or the RF is OFF, do nothing
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * recovery fatal error
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_thread(): "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (n < 20)
43439c96b8398c01c375889c79bed72d78fb4c39hx * rate ctl
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_thread(): try to recover from"
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " 'send fail\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Send a command to the firmware.
c533a883a71cff9ff32df1c53c31201e1cbf371fhxiwk_cmd(iwk_sc_t *sc, int code, const void *buf, int size, int async)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (uint32_t)(ring->data[ring->cur].paddr_cmd & 0xffffffff);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* kick cmd ring XXX */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhxiwk_set_led(iwk_sc_t *sc, uint8_t id, uint8_t off, uint8_t on)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) iwk_cmd(sc, REPLY_LEDS_CMD, &led, sizeof (led), 1);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* update adapter's configuration according the info of target AP */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.chan = ieee80211_chan2ieee(ic, in->in_chan);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx } else { /* assume 802.11b/g */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.flags &= ~LE_32(RXON_FLG_SHORT_PREAMBLE_MSK |
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.flags |= LE_32(RXON_FLG_SHORT_PREAMBLE_MSK);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.flags &= LE_32(~RXON_FLG_SHORT_PREAMBLE_MSK);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "filter_flags %x cck %x ofdm %x"
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " bssid:%02x:%02x:%02x:%02x:%02x:%2x\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.cck_basic_rates, sc->sc_config.ofdm_basic_rates,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " failed to config chan%d\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * set Tx power for 2.4GHz channels
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * (need further investigation. fix tx power at present)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < POWER_TABLE_NUM_HT_OFDM_ENTRIES; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx txpower.tx_power.ht_ofdm_power[POWER_TABLE_NUM_HT_OFDM_ENTRIES].
c533a883a71cff9ff32df1c53c31201e1cbf371fhx txpower.tx_power.ht_ofdm_power[POWER_TABLE_NUM_HT_OFDM_ENTRIES].
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " failed to set txpower\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* add default AP node */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_cmd(sc, REPLY_ADD_STA, &node, sizeof (node), 1);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx " failed to add BSS node\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* TX_LINK_QUALITY cmd ? */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx rs = ic->ic_sup_rates[ieee80211_chan2mode(ic, ic->ic_curchan)];
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_cmd(sc, REPLY_TX_LINK_QUALITY_CMD, &link_quality,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to config link quality table\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * Send a scan request(assembly scan cmd) to the firmware.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx hdr->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * a probe request frame is required after the REPLY_SCAN_CMD
c533a883a71cff9ff32df1c53c31201e1cbf371fhx wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* essid IE */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* supported rates IE */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* supported xrates IE */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) memcpy(frm, rs->ir_rates + IEEE80211_RATE_SIZE, nrates);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* optionnal IE (usually for wpa) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* setup length of probe request */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * the attribute of the scan channels are required after the probe
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * request frame.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (uint32_t)(data->dma_data.cookie.dmac_address & 0xffffffff);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * maybe for cmd, filling the byte cnt table is not necessary.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * anyway, we fill it here.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* kick cmd ring */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * set power mode. Disable power management at present, do it later
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sizeof (powertable), 0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx cmn_err(CE_WARN, "iwk_config(): failed to set power mode\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* configure bt coexistence */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sizeof (bt), 0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_config(): "
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to configurate bt coexistence\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* configure rxon */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx (void) memset(&sc->sc_config, 0, sizeof (iwk_rxon_cmd_t));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IEEE80211_ADDR_COPY(sc->sc_config.node_addr, ic->ic_macaddr);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IEEE80211_ADDR_COPY(sc->sc_config.wlap_bssid, ic->ic_macaddr);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.flags = (RXON_FLG_TSF2HOST_MSK | RXON_FLG_AUTO_DETECT_MSK
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.filter_flags |= LE_32(RXON_FILTER_ACCEPT_GRP_MSK |
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.filter_flags |= LE_32(RXON_FILTER_ACCEPT_GRP_MSK |
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* set antenna */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sc->sc_config.rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sizeof (iwk_rxon_cmd_t), 0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to set configure command\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * set Tx power for 2.4GHz channels
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * (need further investigation. fix tx power at present)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < POWER_TABLE_NUM_HT_OFDM_ENTRIES; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx txpower.tx_power.ht_ofdm_power[POWER_TABLE_NUM_HT_OFDM_ENTRIES]
c533a883a71cff9ff32df1c53c31201e1cbf371fhx txpower.tx_power.ht_ofdm_power[POWER_TABLE_NUM_HT_OFDM_ENTRIES]
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sizeof (txpower), 0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx cmn_err(CE_WARN, "iwk_config(): failed to set txpower\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* add broadcast node so that we can send broadcast frame */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_cmd(sc, REPLY_ADD_STA, &node, sizeof (node), 0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to add broadcast node\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* TX_LINK_QUALITY cmd ? */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx link_quality.rate_n_flags[i] = iwk_rate_to_plcp(2) | masks;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx err = iwk_cmd(sc, REPLY_TX_LINK_QUALITY_CMD, &link_quality,
c533a883a71cff9ff32df1c53c31201e1cbf371fhx sizeof (link_quality), 0);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to config link quality table\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, CSR_RESET, tmp | CSR_RESET_REG_FLAG_STOP_MASTER);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (n = 0; n < 2000; n++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (n == 2000)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "timeout waiting for master stop\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* clear any pending interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, CSR_GP_CNTRL, tmp | CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* wait for clock ready */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (n = 0; n < 1000; n++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (n == 1000) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx APMG_CLK_REG_VAL_DMA_CLK_RQT | APMG_CLK_REG_VAL_BSM_CLK_RQT);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if ((sc->sc_rev & 0x80) == 0x80 && (sc->sc_rev & 0x7f) < 8) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ddi_put8(sc->sc_cfg_handle, (uint8_t *)(sc->sc_cfg_base + 0xf0),
c533a883a71cff9ff32df1c53c31201e1cbf371fhx CSR_HW_IF_CONFIG_REG_BIT_MAC_SI | CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R;
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* make sure power supply on each part of the hardware */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * set up semphore flag to own EEPROM
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * reset semphore flag to release EEPROM
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * This function load all infomation in eeprom into iwk_eep
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * structure in iwk_sc_t structure
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* read eeprom gp register in CSR */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (rr != 0) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_EEPROM, "driver failed to own EEPROM\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < 10; i++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "time out when read eeprome\n"));
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * init mac address in ieee80211com_t struct
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_DBG((IWK_DEBUG_EEPROM, "mac:%2x:%2x:%2x:%2x:%2x:%2x\n",
c533a883a71cff9ff32df1c53c31201e1cbf371fhx ic->ic_macaddr[3], ic->ic_macaddr[4], ic->ic_macaddr[5]));
43439c96b8398c01c375889c79bed72d78fb4c39hx cmn_err(CE_WARN, "iwk_init(): Radio transmitter is off\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* init Rx ring */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* init Tx rings */
d62cb7fff63265824a8e6725a3bcef698f6134c9hx /* keep warm page */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* clear "radio off" and "disable command" bits */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* clear any pending interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* enable interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * backup ucode data part for future use.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (n = 0; n < 2; n++) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* load firmware init segment into NIC */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "failed to setup boot firmware\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* now press "execute" start running */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx if (n == 2) {
c533a883a71cff9ff32df1c53c31201e1cbf371fhx cmn_err(CE_WARN, "iwk_init(): " "failed to load firmware\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* ..and wait at most one second for adapter to initialize */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx "iwk_init(): timeout waiting for firmware init\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * at this point, the firmware is loaded OK, then config the hardware
c533a883a71cff9ff32df1c53c31201e1cbf371fhx * with the ucode API, including rxon, txpower, etc.
c533a883a71cff9ff32df1c53c31201e1cbf371fhx cmn_err(CE_WARN, "iwk_init(): failed to configure device\n");
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* at this point, hardware may receive beacons :) */
c533a883a71cff9ff32df1c53c31201e1cbf371fhxstatic void
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* disable interrupts */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* reset all Tx rings */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx for (i = 0; i < IWK_NUM_QUEUES; i++)
c533a883a71cff9ff32df1c53c31201e1cbf371fhx /* reset Rx ring */
c533a883a71cff9ff32df1c53c31201e1cbf371fhx iwk_reg_write(sc, ALM_APMG_CLK_DIS, APMG_CLK_REG_VAL_DMA_CLK_RQT);
c533a883a71cff9ff32df1c53c31201e1cbf371fhx IWK_WRITE(sc, CSR_RESET, tmp | CSR_RESET_REG_FLAG_SW_RESET);
43439c96b8398c01c375889c79bed72d78fb4c39hx * Naive implementation of the Adaptive Multi Rate Retry algorithm:
43439c96b8398c01c375889c79bed72d78fb4c39hx * "IEEE 802.11 Rate Adaptation: A Practical Approach"
43439c96b8398c01c375889c79bed72d78fb4c39hx * Mathieu Lacage, Hossein Manshaei, Thierry Turletti
43439c96b8398c01c375889c79bed72d78fb4c39hx * INRIA Sophia - Projet Planete
43439c96b8398c01c375889c79bed72d78fb4c39hxstatic void
43439c96b8398c01c375889c79bed72d78fb4c39hx amrr->success_threshold = IWK_AMRR_MIN_SUCCESS_THRESHOLD;
43439c96b8398c01c375889c79bed72d78fb4c39hxstatic void
43439c96b8398c01c375889c79bed72d78fb4c39hx IWK_DBG((IWK_DEBUG_RATECTL, "iwk_amrr_timeout() enter\n"));
43439c96b8398c01c375889c79bed72d78fb4c39hx ieee80211_iterate_nodes(&ic->ic_sta, iwk_amrr_ratectl, NULL);
43439c96b8398c01c375889c79bed72d78fb4c39hx/* ARGSUSED */
43439c96b8398c01c375889c79bed72d78fb4c39hxstatic void
43439c96b8398c01c375889c79bed72d78fb4c39hx "AMRR increasing rate %d (txcnt=%d retrycnt=%d)\n",
43439c96b8398c01c375889c79bed72d78fb4c39hx "AMRR decreasing rate %d (txcnt=%d retrycnt=%d)\n",