82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'AmoreCopyright (c) 1999-2001, Intel Corporation
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'AmoreAll rights reserved.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'AmoreRedistribution and use in source and binary forms, with or without
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amoremodification, are permitted provided that the following conditions are met:
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore 1. Redistributions of source code must retain the above copyright notice,
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore this list of conditions and the following disclaimer.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore 2. Redistributions in binary form must reproduce the above copyright notice,
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore this list of conditions and the following disclaimer in the documentation
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82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore without specific prior written permission.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'AmoreTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'AmoreAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'AmoreIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'AmoreDISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'AmoreNEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * Author: Patrick J Luhmann (PJL)
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * Date: 05/30/2000
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * Version: 3.28
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * This file contains the loadable micro code arrays to implement
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * receive bundling on the D101 A-step, D101 B-step, D101M (B-step
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * only), D101S, D102 B-step, D102 C-step and D102 E-step.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * Each controller has its own specific micro code array. The array
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * for one controller is totally incompatible with any other
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * controller, and if used will most likely cause the controller to
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * lock up and stop responding to the driver. Each micro code array
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * has its own parameter offsets (described below), and they each have
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * their own version number (which should not be confused with the
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * version of the rcvbundl.h file given above).
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Note: Minor formatting changes made for illumos. */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSaver parameters
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * All CPUSaver parameters are 16-bit literals that are part of a
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * "move immediate value" instruction. By changing the value of the
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * literal in the instruction before the code is loaded, the driver
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * can change algorithm.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSAVER_DWORD - This is the location of the instruction that loads
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * the dead-man timer with its inital value. By writing a 16-bit
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * value to the low word of this instruction, the driver can change
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * the timer value. The current default is either x600 or x800;
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * experiments show that the value probably should stay within the
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * range of x200 - x1000.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * that sets the maximum number of frames that will be bundled. In
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * some situations, such as the TCP windowing algorithm, it may be
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * better to limit the growth of the bundle size than let it go as
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * high as it can, because that could cause too much added latency.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * The default is six, because this is the number of packets in the
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * default TCP window size. A value of 1 would make CPUSaver
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * indicate an interrupt for every frame received. If you do not
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * want to put a limit on the bundle size, set this value to xFFFF.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * that contains a bit-mask describing the minimum size frame that
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * will be bundled. The default masks the lower 7 bits, which
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * means that any frame less than 128 bytes in length will not be
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * bundled, but will instead immediately generate an interrupt.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * This does not affect the current bundle in any way. Any frame
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * that is 128 bytes or large will be bundled normally. This
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * feature is meant to provide immediate indication of ACK frames
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * in a TCP environment. Customers were seeing poor performance
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * when a machine with CPUSaver enabled was sending but not
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * receiving. The delay introduced when the ACKs were received was
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * enough to reduce total throughput, because the sender would sit
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * idle until the ACK was finally seen.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * The current default is 0xFF80, which masks out the lower 7 bits.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * This means that any frame which is x7F (127) bytes or smaller
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * will cause an immediate interrupt. Because this value must be a
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * bit mask, there are only a few valid values that can be used.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * To turn this feature off, the driver can write the value xFFFF
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * to the lower word of this instruction (in the same way that the
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * other parameters are used). Likewise, a value of 0xF800 (2047)
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * would cause an interrupt to be generated for every frame,
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * because all standard Ethernet frames are <= 2047 bytes in
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSaver micro code for the D101A
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Version 2.0 */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* This value is the same for both A and B step of 558. */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSaver micro code for the D101B
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Version 2.0 */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSaver micro code for the D101M (B-step only)
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Version 2.10 */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Parameter values for the D101M B-step */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSaver micro code for the D101S
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Version 1.20 */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Parameter values for the D101S */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * CPUSaver micro code for the D102 B-step
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Version 2.0 */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * This version of CPUSaver is different from all others in a
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * different way. It combines the CPUSaver algorithm with fixes for
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * bugs in the B-step hardware (specifically, bugs with Inline
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * Receive). Thus, when CPUSaver is disabled, this micro code image
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * will still need to be loaded. Before this happens, the hit
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * addresses for the CPUSaver algorithm must be set to 0x1FFFF. The
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * hit addresses for CPUSaver are (starting with 0, and remember that.
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Parameter values for the D102 B-step */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * Micro code for the D102 C-step
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Parameter values for the D102 C-step */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore#define D102_C_CPUSAVER_MIN_SIZE_DWORD 133 /* not implemented */
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore * Micro code for the D102 E-step
82743679557cf8b7a5dd51eaa0015e0ca498ac37Garrett D'Amore/* Parameter values for the D102 E-step */