igb_sw.h revision 69b2d733deffed6bf9baf89d901afd9c81b484ed
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
*/
/*
*/
#ifndef _IGB_SW_H
#define _IGB_SW_H
#ifdef __cplusplus
extern "C" {
#endif
#include <sys/mac_provider.h>
#include <sys/mac_ether.h>
#include <sys/ethernet.h>
#include "igb_api.h"
#include "igb_82575.h"
#define IGB_SUCCESS DDI_SUCCESS
#define IGB_FAILURE DDI_FAILURE
#define IGB_UNKNOWN 0x00
#define IGB_INITIALIZED 0x01
#define IGB_STARTED 0x02
#define IGB_SUSPENDED 0x04
#define IGB_STALL 0x08
#define IGB_ERROR 0x80
#define IGB_RX_STOPPED 0x1
#define IGB_INTR_NONE 0
#define IGB_INTR_MSIX 1
#define IGB_INTR_MSI 2
#define IGB_INTR_LEGACY 3
#define IGB_NO_POLL -1
#define IGB_NO_FREE_SLOT -1
#define MCAST_ALLOC_COUNT 256
#define MAX_COOKIE 18
#define MIN_NUM_TX_DESC 2
/*
* Number of settings for interrupt throttle rate (ITR). There is one of
* these per msi-x vector and it needs to be the maximum of all silicon
* types supported by this driver.
*/
#define MAX_NUM_EITR 25
/*
* Maximum values for user configurable parameters
*/
#define MAX_TX_RING_SIZE 4096
#define MAX_RX_RING_SIZE 4096
#define MAX_RX_GROUP_NUM 4
#define MAX_MTU 9000
#define MAX_RX_LIMIT_PER_INTR 4096
#define MAX_RX_COPY_THRESHOLD 9216
#define MAX_TX_COPY_THRESHOLD 9216
#define MAX_MCAST_NUM 8192
/*
* Minimum values for user configurable parameters
*/
#define MIN_TX_RING_SIZE 64
#define MIN_RX_RING_SIZE 64
#define MIN_RX_GROUP_NUM 1
#define MIN_RX_LIMIT_PER_INTR 16
#define MIN_RX_COPY_THRESHOLD 0
#define MIN_TX_COPY_THRESHOLD 0
#define MIN_MCAST_NUM 8
/*
* Default values for user configurable parameters
*/
#define DEFAULT_TX_RING_SIZE 512
#define DEFAULT_RX_RING_SIZE 512
#define DEFAULT_RX_GROUP_NUM 1
#define DEFAULT_MTU ETHERMTU
#define DEFAULT_RX_LIMIT_PER_INTR 256
#define DEFAULT_RX_COPY_THRESHOLD 128
#define DEFAULT_TX_COPY_THRESHOLD 512
#define DEFAULT_TX_RESCHED_THRESHOLD 128
#define DEFAULT_TX_RESCHED_THRESHOLD_LOW 32
#define DEFAULT_MCAST_NUM 4096
#define IGB_LSO_MAXLEN 65535
#define TX_DRAIN_TIME 200
#define RX_DRAIN_TIME 200
/*
* Defined for IP header alignment.
*/
#define IPHDR_ALIGN_ROOM 2
/*
* Bit flags for attach_progress
*/
#define PROP_ADV_AUTONEG_CAP "adv_autoneg_cap"
#define PROP_ADV_1000FDX_CAP "adv_1000fdx_cap"
#define PROP_ADV_1000HDX_CAP "adv_1000hdx_cap"
#define PROP_ADV_100FDX_CAP "adv_100fdx_cap"
#define PROP_ADV_100HDX_CAP "adv_100hdx_cap"
#define PROP_ADV_10FDX_CAP "adv_10fdx_cap"
#define PROP_ADV_10HDX_CAP "adv_10hdx_cap"
#define PROP_DEFAULT_MTU "default_mtu"
#define PROP_FLOW_CONTROL "flow_control"
#define PROP_TX_RING_SIZE "tx_ring_size"
#define PROP_RX_RING_SIZE "rx_ring_size"
#define PROP_MR_ENABLE "mr_enable"
#define PROP_RX_GROUP_NUM "rx_group_number"
#define PROP_INTR_FORCE "intr_force"
#define PROP_TX_HCKSUM_ENABLE "tx_hcksum_enable"
#define PROP_RX_HCKSUM_ENABLE "rx_hcksum_enable"
#define PROP_LSO_ENABLE "lso_enable"
#define PROP_TX_HEAD_WB_ENABLE "tx_head_wb_enable"
#define PROP_TX_COPY_THRESHOLD "tx_copy_threshold"
#define PROP_TX_RECYCLE_THRESHOLD "tx_recycle_threshold"
#define PROP_TX_OVERLOAD_THRESHOLD "tx_overload_threshold"
#define PROP_TX_RESCHED_THRESHOLD "tx_resched_threshold"
#define PROP_RX_COPY_THRESHOLD "rx_copy_threshold"
#define PROP_RX_LIMIT_PER_INTR "rx_limit_per_intr"
#define PROP_INTR_THROTTLING "intr_throttling"
#define PROP_MCAST_MAX_NUM "mcast_max_num"
#define IGB_LB_NONE 0
#define IGB_LB_EXTERNAL 1
#define IGB_LB_INTERNAL_PHY 3
#define IGB_LB_INTERNAL_SERDES 4
enum ioc_reply {
IOC_DONE, /* OK, reply sent */
IOC_ACK, /* OK, just send ACK */
IOC_REPLY /* OK, just send reply */
};
/*
* For s/w context extraction from a tx frame
*/
#define TX_CXT_SUCCESS 0
#define TX_CXT_E_LSO_CSUM (-1)
#define TX_CXT_E_ETHER_TYPE (-2)
0, 0, (flag)))
/*
* Defined for ring index operations
* ASSERT(index < limit)
* ASSERT(step < limit)
* ASSERT(index1 < limit)
* ASSERT(index2 < limit)
*/
#define LINK_LIST_INIT(_LH) \
#define LIST_POP_HEAD(_LH) \
{ \
} \
}
} else { \
} \
typedef struct single_link {
struct single_link *link;
typedef struct link_list {
} link_list_t;
/*
* Property lookups
*/
DDI_PROP_DONTPASS, (n))
DDI_PROP_DONTPASS, (n), -1)
/* capability/feature flags */
/* function pointer for nic-specific functions */
typedef void (*igb_nic_func_t)(struct igb *);
/* adapter-specific info for each supported device type */
typedef struct adapter_info {
/* limits */
/* function pointers */
/* capabilities */
typedef union igb_ether_addr {
struct {
} reg;
struct {
} mac;
typedef enum {
} tx_type_t;
typedef struct tx_context {
} tx_context_t;
typedef struct sw_desc {
} sw_desc_t;
/* Handles and addresses of DMA buffer */
typedef struct dma_buffer {
} dma_buffer_t;
/*
* Tx Control Block
*/
typedef struct tx_control_block {
/*
* RX Control Block
*/
typedef struct rx_control_block {
struct igb_rx_data *rx_data;
/*
* Software Data Structure for Tx Ring
*/
typedef struct igb_tx_ring {
/*
* Mutexes
*/
/*
* Tx descriptor ring definitions
*/
union e1000_adv_tx_desc *tbd_ring;
/*
* Tx control block list definitions
*/
/*
*/
/*
* Tx ring settings and status
*/
/*
* Per-ring statistics
*/
#ifdef IGB_DEBUG
/*
* Debug statistics
*/
#endif
/*
* Pointer to the igb struct
*/
/*
* Software Receive Ring
*/
typedef struct igb_rx_data {
/*
* Rx descriptor ring definitions
*/
/*
* Rx control block list definitions
*/
/*
* Rx sw ring settings and status
*/
/*
* Software Data Structure for Rx Ring
*/
typedef struct igb_rx_ring {
/*
* Per-ring statistics
*/
#ifdef IGB_DEBUG
/*
* Debug statistics
*/
#endif
/*
* Software Receive Ring Group
*/
typedef struct igb_rx_group {
typedef struct igb {
int instance;
/*
* Receive Rings and Groups
*/
/*
* Transmit Rings
*/
int intr_type;
int intr_cnt;
int intr_cap;
struct ether_addr *mcast_table;
/*
* Kstat definitions
*/
param_pad_to_32:24;
/*
* FMA capabilities
*/
int fm_capabilities;
} igb_t;
typedef struct igb_stat {
#ifdef IGB_DEBUG
#endif
} igb_stat_t;
/*
* Function prototypes in e1000_osdep.c
*/
/*
* Function prototypes in igb_buf.c
*/
int igb_alloc_dma(igb_t *);
void igb_free_dma(igb_t *);
void igb_free_dma_buffer(dma_buffer_t *);
/*
* Function prototypes in igb_main.c
*/
void igb_enable_watchdog_timer(igb_t *);
void igb_disable_watchdog_timer(igb_t *);
void igb_fm_ereport(igb_t *, char *);
void igb_set_fma_flags(int);
/*
* Function prototypes in igb_gld.c
*/
int igb_m_start(void *);
void igb_m_stop(void *);
int igb_m_promisc(void *, boolean_t);
int igb_m_unicst(void *, const uint8_t *);
void igb_m_resources(void *);
void igb_fill_ring(void *, mac_ring_type_t, const int, const int,
void igb_m_propinfo(void *, const char *, mac_prop_id_t,
/*
* Function prototypes in igb_rx.c
*/
/*
* Function prototypes in igb_tx.c
*/
void igb_free_tcb(tx_control_block_t *);
/*
* Function prototypes in igb_log.c
*/
void igb_notice(void *, const char *, ...);
void igb_log(void *, const char *, ...);
void igb_error(void *, const char *, ...);
/*
* Function prototypes in igb_stat.c
*/
int igb_init_stats(igb_t *);
mblk_t *igb_rx_ring_poll(void *, int);
#ifdef __cplusplus
}
#endif
#endif /* _IGB_SW_H */