igb_mac.c revision 3f7e60a636ef887af87fadf9ab6289c672532dd9
/*
* CDDL HEADER START
*
* Copyright(c) 2007-2009 Intel Corporation. All rights reserved.
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at:
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When using or redistributing this file, you may do so under the
* License only. No other modification of this header is permitted.
*
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms of the CDDL.
*/
/* IntelVersion: 1.108 scm_100809_154340 */
#include "igb_api.h"
/*
* e1000_init_mac_ops_generic - Initialize MAC function pointers
* @hw: pointer to the HW structure
*
* Setups up the function pointers to no-op functions
*/
void
{
DEBUGFUNC("e1000_init_mac_ops_generic");
/* General Setup */
/* LED */
/* LINK */
/* Management */
/* VLAN, MC, etc. */
}
/*
* e1000_null_ops_generic - No-op function, returns 0
* @hw: pointer to the HW structure
*/
{
DEBUGFUNC("e1000_null_ops_generic");
return (E1000_SUCCESS);
}
/*
* e1000_null_mac_generic - No-op function, return void
* @hw: pointer to the HW structure
*/
void
{
DEBUGFUNC("e1000_null_mac_generic");
}
/*
* e1000_null_link_info - No-op function, return 0
* @hw: pointer to the HW structure
*/
{
DEBUGFUNC("e1000_null_link_info");
UNREFERENCED_3PARAMETER(hw, s, d);
return (E1000_SUCCESS);
}
/*
* e1000_null_mng_mode - No-op function, return false
* @hw: pointer to the HW structure
*/
bool
{
DEBUGFUNC("e1000_null_mng_mode");
return (false);
}
/*
* e1000_null_update_mc - No-op function, return void
* @hw: pointer to the HW structure
*/
void
{
DEBUGFUNC("e1000_null_update_mc");
UNREFERENCED_3PARAMETER(hw, h, a);
}
/*
* e1000_null_write_vfta - No-op function, return void
* @hw: pointer to the HW structure
*/
void
{
DEBUGFUNC("e1000_null_write_vfta");
UNREFERENCED_3PARAMETER(hw, a, b);
}
/*
* e1000_null_set_mta - No-op function, return void
* @hw: pointer to the HW structure
*/
void
{
DEBUGFUNC("e1000_null_mta_set");
}
/*
* e1000_null_rar_set - No-op function, return void
* @hw: pointer to the HW structure
*/
void
{
DEBUGFUNC("e1000_null_rar_set");
UNREFERENCED_3PARAMETER(hw, h, a);
}
/*
* e1000_get_bus_info_pcie_generic - Get PCIe bus information
* @hw: pointer to the HW structure
*
* Determines and stores the system bus information for a particular
* network interface. The following bus information is determined and stored:
* bus speed, bus width, type (PCIe), and PCIe function.
*/
{
DEBUGFUNC("e1000_get_bus_info_pcie_generic");
if (ret_val)
else
return (E1000_SUCCESS);
}
/*
* e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
*
* @hw: pointer to the HW structure
*
* Determines the LAN function id by reading memory-mapped registers
* and swaps the port value if requested.
*/
static void
{
/*
* The status register reports the correct function number
* for the device regardless of function swap state.
*/
}
/*
* e1000_set_lan_id_single_port - Set LAN id for a single port device
* @hw: pointer to the HW structure
*
* Sets the LAN function id to zero for a single port device.
*/
void
{
}
/*
* e1000_clear_vfta_generic - Clear VLAN filter table
* @hw: pointer to the HW structure
*
* Clears the register array which contains the VLAN filter table by
* setting all the values to 0.
*/
void
{
DEBUGFUNC("e1000_clear_vfta_generic");
}
}
/*
* e1000_write_vfta_generic - Write value to VLAN filter table
* @hw: pointer to the HW structure
* @offset: register offset in VLAN filter table
* @value: register value written to VLAN filter table
*
* Writes value at the given offset in the register array which stores
* the VLAN filter table.
*/
void
{
DEBUGFUNC("e1000_write_vfta_generic");
}
/*
* e1000_init_rx_addrs_generic - Initialize receive address's
* @hw: pointer to the HW structure
* @rar_count: receive address registers
*
* Setups the receive address registers by setting the base receive address
* register to the devices MAC address and clearing all the other receive
* address registers to 0.
*/
void
{
u32 i;
DEBUGFUNC("e1000_init_rx_addrs_generic");
/* Setup the receive address */
DEBUGOUT("Programming MAC Address into RAR[0]\n");
/* Zero out the other (rar_entry_count - 1) receive addresses */
for (i = 1; i < rar_count; i++)
}
/*
* e1000_check_alt_mac_addr_generic - Check for alternate MAC addr
* @hw: pointer to the HW structure
*
* Checks the nvm for an alternate MAC address. An alternate MAC address
* can be setup by pre-boot software and must be treated like a permanent
* address and must override the actual permanent MAC address. If an
* alternate MAC address is found it is programmed into RAR0, replacing
* the permanent address that was installed into RAR0 by the Si on reset.
* This function will return SUCCESS unless it encounters an error while
* reading the EEPROM.
*/
{
u32 i;
DEBUGFUNC("e1000_check_alt_mac_addr_generic");
if (ret_val) {
DEBUGOUT("NVM Read Error\n");
goto out;
}
if (nvm_alt_mac_addr_offset == 0xFFFF) {
/* There is no Alternate MAC Address */
goto out;
}
for (i = 0; i < ETH_ADDR_LEN; i += 2) {
if (ret_val) {
DEBUGOUT("NVM Read Error\n");
goto out;
}
}
/* if multicast bit is set, the alternate address will not be used */
if (alt_mac_addr[0] & 0x01) {
DEBUGOUT("Ignoring Alternate Mac Address with MC bit set\n");
goto out;
}
/*
* We have a valid alternate MAC address, and we want to treat it the
* same as the normal permanent MAC address stored by the HW into the
* RAR. Do this by mapping this address into RAR0.
*/
out:
return (ret_val);
}
/*
* e1000_rar_set_generic - Set receive address register
* @hw: pointer to the HW structure
* @addr: pointer to the receive address
* @index: receive address array register
*
* Sets the receive address array register at index to the address passed
* in by addr.
*/
void
{
DEBUGFUNC("e1000_rar_set_generic");
/*
* HW expects these in little endian so we reverse the byte order
* from network order (big endian) to little endian
*/
/* If MAC address zero, no need to set the AV bit */
rar_high |= E1000_RAH_AV;
/*
* Some bridges will combine consecutive 32-bit writes into
* a single burst write, which will malfunction on some parts.
* The flushes avoid this.
*/
}
/*
* e1000_mta_set_generic - Set multicast filter table address
* @hw: pointer to the HW structure
* @hash_value: determines the MTA register and bit to set
*
* The multicast table address is a register array of 32-bit registers.
* The hash_value is used to determine what register the bit is in, the
* current value is read, the new bit is OR'd in and the new value is
* written back into the register.
*/
void
{
DEBUGFUNC("e1000_mta_set_generic");
/*
* The MTA is a register array of 32-bit registers. It is
* treated like an array of (32*mta_reg_count) bits. We want to
* set bit BitArray[hash_value]. So we figure out what register
* the bit is in, read it, OR in the new bit, then write
* back the new value. The (hw->mac.mta_reg_count - 1) serves as a
* mask to bits 31:5 of the hash value which gives us the
* register we're modifying. The hash bit within that register
* is determined by the lower 5 bits of the hash value.
*/
}
/*
* e1000_update_mc_addr_list_generic - Update Multicast addresses
* @hw: pointer to the HW structure
* @mc_addr_list: array of multicast addresses to program
* @mc_addr_count: number of multicast addresses to program
*
* Updates the Multicast Table Array.
* The caller must have a packed mc_addr_list of multicast addresses.
*/
void
{
int i;
DEBUGFUNC("e1000_update_mc_addr_list_generic");
/* clear mta_shadow */
/* update mta_shadow from mc_addr_list */
for (i = 0; (u32) i < mc_addr_count; i++) {
mc_addr_list += (ETH_ADDR_LEN);
}
/* replace the entire MTA table */
}
/*
* e1000_hash_mc_addr_generic - Generate a multicast hash value
* @hw: pointer to the HW structure
* @mc_addr: pointer to a multicast address
*
* Generates a multicast address hash value which is used to determine
* the multicast filter table array address and new table value. See
* e1000_mta_set_generic()
*/
{
DEBUGFUNC("e1000_hash_mc_addr_generic");
/* Register count multiplied by bits per register */
/*
* For a mc_filter_type of 0, bit_shift is the number of left-shifts
* where 0xFF would still fall within the hash mask.
*/
bit_shift++;
/*
* The portion of the address that is used for the hash table
* is determined by the mc_filter_type setting.
* The algorithm is such that there is a total of 8 bits of shifting.
* The bit_shift for a mc_filter_type of 0 represents the number of
* left-shifts where the MSB of mc_addr[5] would still fall within
* the hash_mask. Case 0 does this exactly. Since there are a total
* of 8 bits of shifting, then mc_addr[4] will shift right the
* remaining number of bits. Thus 8 - bit_shift. The rest of the
* cases are a variation of this algorithm...essentially raising the
* number of bits to shift mc_addr[5] left, while still keeping the
* 8-bit shifting total.
*
* For example, given the following Destination MAC Address and an
* mta register count of 128 (thus a 4096-bit vector and 0xFFF mask),
* we can see that the bit_shift for case 0 is 4. These are the hash
* values resulting from each mc_filter_type...
* [0] [1] [2] [3] [4] [5]
* 01 AA 00 12 34 56
* LSB MSB
*
* case 0: hash_value = ((0x34 >> 4) | (0x56 << 4)) & 0xFFF = 0x563
* case 1: hash_value = ((0x34 >> 3) | (0x56 << 5)) & 0xFFF = 0xAC6
* case 2: hash_value = ((0x34 >> 2) | (0x56 << 6)) & 0xFFF = 0x163
* case 3: hash_value = ((0x34 >> 0) | (0x56 << 8)) & 0xFFF = 0x634
*/
default:
case 0:
break;
case 1:
bit_shift += 1;
break;
case 2:
bit_shift += 2;
break;
case 3:
bit_shift += 4;
break;
}
return (hash_value);
}
/*
* e1000_clear_hw_cntrs_base_generic - Clear base hardware counters
* @hw: pointer to the HW structure
*
* Clears the base hardware counters by reading the counter registers.
*/
void
{
DEBUGFUNC("e1000_clear_hw_cntrs_base_generic");
}
/*
* e1000_check_for_copper_link_generic - Check for link (Copper)
* @hw: pointer to the HW structure
*
* Checks to see of the link status of the hardware has changed. If a
* change in link status has been detected, then we read the PHY registers
*/
{
bool link;
DEBUGFUNC("e1000_check_for_copper_link");
/*
* We only want to go out to the PHY registers to see if Auto-Neg
* get_link_status flag is set upon receiving a Link Status
* Change or Rx Sequence Error interrupt.
*/
if (!mac->get_link_status) {
goto out;
}
/*
* First we want to see if the MII Status Register reports
* of the PHY.
*/
if (ret_val)
goto out;
if (!link)
goto out; /* No link detected */
mac->get_link_status = false;
/*
* Check if there was DownShift, must be checked
* immediately after link-up
*/
(void) e1000_check_downshift_generic(hw);
/*
* we have already determined whether we have link or not.
*/
goto out;
}
/*
* Auto-Neg is enabled. Auto Speed Detection takes care
* configure Collision Distance in the MAC.
*/
/*
* Configure Flow Control now that Auto-Neg has completed.
* First, we need to restore the desired flow control
* settings because we may have had to re-autoneg with a
* different link partner.
*/
if (ret_val)
DEBUGOUT("Error configuring flow control\n");
out:
return (ret_val);
}
/*
* e1000_check_for_fiber_link_generic - Check for link (Fiber)
* @hw: pointer to the HW structure
*
* Checks for link up on the hardware. If link is not up and we have
* a signal, then we need to force link up.
*/
{
DEBUGFUNC("e1000_check_for_fiber_link_generic");
/*
* If we don't have link (auto-negotiation failed or link partner
* cannot auto-negotiate), the cable is plugged in (we have signal),
* and our link partner is not trying to auto-negotiate with us (we
* are receiving idles or data), we need to force link up. We also
* need to give auto-negotiation time to complete, in case the cable
* was just plugged in. The autoneg_failed flag does this.
*/
/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
(!(rxcw & E1000_RXCW_C))) {
if (mac->autoneg_failed == 0) {
goto out;
}
DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
/* Disable auto-negotiation in the TXCW register */
/* Force link-up and also force full-duplex. */
/* Configure Flow Control after forcing link up. */
if (ret_val) {
DEBUGOUT("Error configuring flow control\n");
goto out;
}
/*
* If we are forcing link and we are receiving /C/ ordered
* sets, re-enable auto-negotiation in the TXCW register
* and disable forced link in the Device Control register
* in an attempt to auto-negotiate with our link partner.
*/
DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
mac->serdes_has_link = true;
}
out:
return (ret_val);
}
/*
* e1000_check_for_serdes_link_generic - Check for link (Serdes)
* @hw: pointer to the HW structure
*
* Checks for link up on the hardware. If link is not up and we have
* a signal, then we need to force link up.
*/
{
DEBUGFUNC("e1000_check_for_serdes_link_generic");
/*
* If we don't have link (auto-negotiation failed or link partner
* cannot auto-negotiate), and our link partner is not trying to
* auto-negotiate with us (we are receiving idles or data),
* we need to force link up. We also need to give auto-negotiation
* time to complete.
*/
/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
if (mac->autoneg_failed == 0) {
goto out;
}
DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
/* Disable auto-negotiation in the TXCW register */
/* Force link-up and also force full-duplex. */
/* Configure Flow Control after forcing link up. */
if (ret_val) {
DEBUGOUT("Error configuring flow control\n");
goto out;
}
/*
* If we are forcing link and we are receiving /C/ ordered
* sets, re-enable auto-negotiation in the TXCW register
* and disable forced link in the Device Control register
* in an attempt to auto-negotiate with our link partner.
*/
DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
mac->serdes_has_link = true;
/*
* If we force link for non-auto-negotiation switch, check
* link status based on MAC synchronization for internal
* serdes media type.
*/
/* SYNCH bit and IV bit are sticky. */
usec_delay(10);
if (rxcw & E1000_RXCW_SYNCH) {
if (!(rxcw & E1000_RXCW_IV)) {
mac->serdes_has_link = true;
DEBUGOUT("SERDES: Link up - forced.\n");
}
} else {
mac->serdes_has_link = false;
DEBUGOUT("SERDES: Link down - force failed.\n");
}
}
if (status & E1000_STATUS_LU) {
/* SYNCH bit and IV bit are sticky, so reread rxcw. */
usec_delay(10);
if (rxcw & E1000_RXCW_SYNCH) {
if (!(rxcw & E1000_RXCW_IV)) {
mac->serdes_has_link = true;
DEBUGOUT("SERDES: Link up - autoneg "
"completed sucessfully.\n");
} else {
mac->serdes_has_link = false;
DEBUGOUT("SERDES: Link down - invalid"
"codewords detected in autoneg.\n");
}
} else {
mac->serdes_has_link = false;
DEBUGOUT("SERDES: Link down - no sync.\n");
}
} else {
mac->serdes_has_link = false;
DEBUGOUT("SERDES: Link down - autoneg failed\n");
}
}
out:
return (ret_val);
}
/*
* e1000_setup_link_generic - Setup flow control and link settings
* @hw: pointer to the HW structure
*
* Determines which flow control settings to use, then configures flow
* control. Calls the appropriate media-specific link configuration
* function. Assuming the adapter has a valid link partner, a valid link
* should be established. Assumes the hardware has previously been reset
* and the transmitter and receiver are not enabled.
*/
{
DEBUGFUNC("e1000_setup_link_generic");
/*
* In the case of the phy reset being blocked, we already have a link.
* We do not need to set it up again.
*/
goto out;
/*
* If requested flow control is set to default, set flow control
* based on the EEPROM flow control settings.
*/
if (ret_val)
goto out;
}
/*
* Save off the requested flow control mode for use later. Depending
* on the link partner's capabilities, we may or may not use this mode.
*/
DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
/* Call the necessary media_type subroutine to configure the link. */
if (ret_val)
goto out;
/*
* Initialize the flow control address, type, and PAUSE timer
* registers to their default values. This is done even if flow
* control is disabled, because it does not hurt anything to
* initialize these registers.
*/
DEBUGOUT("Initializing the Flow Control address,type and timer regs\n");
out:
return (ret_val);
}
/*
* @hw: pointer to the HW structure
*
* Configures collision distance and flow control for fiber and serdes
* links. Upon successful setup, poll for link.
*/
{
DEBUGFUNC("e1000_setup_fiber_serdes_link_generic");
/* Take the link out of reset */
ctrl &= ~E1000_CTRL_LRST;
if (ret_val)
goto out;
/*
* Since auto-negotiation is enabled, take the link out of reset (the
* link will be in reset, because we previously reset the chip). This
* will restart auto-negotiation. If auto-negotiation is successful
* then the link-up status bit will be set and the flow control enable
* bits (RFCE and TFCE) will be set according to their negotiated value.
*/
DEBUGOUT("Auto-negotiation enabled\n");
msec_delay(1);
/*
* For these adapters, the SW definable pin 1 is set when the optics
* detect a signal. If we have a signal, then poll for a "Link-Up"
* indication.
*/
} else {
DEBUGOUT("No signal detected\n");
}
out:
return (ret_val);
}
/*
* e1000_config_collision_dist_generic - Configure collision distance
* @hw: pointer to the HW structure
*
* Configures the collision distance to the default value and is used
* during link setup. Currently no func pointer exists and all
* implementations are handled in the generic version of this function.
*/
void
{
DEBUGFUNC("e1000_config_collision_dist_generic");
tctl &= ~E1000_TCTL_COLD;
}
/*
* e1000_poll_fiber_serdes_link_generic - Poll for link up
* @hw: pointer to the HW structure
*
* Polls for link up by reading the status register, if link fails to come
* up with auto-negotiation, then the link is forced if a signal is detected.
*/
{
DEBUGFUNC("e1000_poll_fiber_serdes_link_generic");
/*
* If we have a signal (the cable is plugged in, or assumed true for
* serdes media) then poll for a "Link-Up" indication in the Device
* Status Register. Time-out if a link isn't seen in 500 milliseconds
* seconds (Auto-negotiation should complete in less than 500
* milliseconds even if the other end is doing it in SW).
*/
for (i = 0; i < FIBER_LINK_UP_LIMIT; i++) {
msec_delay(10);
if (status & E1000_STATUS_LU)
break;
}
if (i == FIBER_LINK_UP_LIMIT) {
DEBUGOUT("Never got a valid link from auto-neg!!!\n");
/*
* AutoNeg failed to achieve a link, so we'll call
* mac->check_for_link. This routine will force the
* link up if we detect a signal. This will allow us to
* communicate with non-autonegotiating link partners.
*/
if (ret_val) {
DEBUGOUT("Error while checking for link\n");
goto out;
}
mac->autoneg_failed = 0;
} else {
mac->autoneg_failed = 0;
DEBUGOUT("Valid Link Found\n");
}
out:
return (ret_val);
}
/*
* e1000_commit_fc_settings_generic - Configure flow control
* @hw: pointer to the HW structure
*
* Write the flow control settings to the Transmit Config Word Register (TXCW)
* base on the flow control settings in e1000_mac_info.
*/
{
DEBUGFUNC("e1000_commit_fc_settings_generic");
/*
* Check for a software override of the flow control settings, and
* setup the device accordingly. If auto-negotiation is enabled, then
* software will have to set the "PAUSE" bits to the correct value in
* the Transmit Config Word Register (TXCW) and re-start auto-
* negotiation. However, if auto-negotiation is disabled, then
* software will have to manually configure the two flow control enable
* bits in the CTRL register.
*
* The possible values of the "fc" parameter are:
* 0: Flow control is completely disabled
* 1: Rx flow control is enabled (we can receive pause frames,
* but not send pause frames).
* 2: Tx flow control is enabled (we can send pause frames but we
* do not support receiving pause frames).
* 3: Both Rx and Tx flow control (symmetric) are enabled.
*/
case e1000_fc_none:
/* Flow control completely disabled by a software over-ride. */
break;
case e1000_fc_rx_pause:
/*
* Rx Flow control is enabled and Tx Flow control is disabled
* by a software over-ride. Since there really isn't a way to
* advertise that we are capable of Rx Pause ONLY, we will
* advertise that we support both symmetric and asymmetric RX
* PAUSE. Later, we will disable the adapter's ability to send
* PAUSE frames.
*/
break;
case e1000_fc_tx_pause:
/*
* Tx Flow control is enabled, and Rx Flow control is disabled,
* by a software over-ride.
*/
break;
case e1000_fc_full:
/*
* Flow control (both Rx and Tx) is enabled by a software
* over-ride.
*/
break;
default:
DEBUGOUT("Flow control param set incorrectly\n");
goto out;
}
out:
return (ret_val);
}
/*
* @hw: pointer to the HW structure
*
* flow control XON frame transmission is enabled, then set XON frame
* transmission as well.
*/
{
DEBUGFUNC("e1000_set_fc_watermarks_generic");
/*
* Set the flow control receive threshold registers. Normally,
* these registers will be set to a default threshold that may be
* adjusted later by the driver's runtime code. However, if the
* ability to transmit pause frames is not enabled, then these
* registers will be set to 0.
*/
/*
* We need to set up the Receive Threshold high and low water
* marks as well as (optionally) enabling the transmission of
* XON frames.
*/
}
return (ret_val);
}
/*
* e1000_set_default_fc_generic - Set flow control default values
* @hw: pointer to the HW structure
*
* Read the EEPROM for the default values for flow control and store the
* values.
*/
{
DEBUGFUNC("e1000_set_default_fc_generic");
/*
* Read and store word 0x0F of the EEPROM. This word contains bits
* that determine the hardware's default PAUSE (flow control) mode,
* a bit that determines whether the HW defaults to enabling or
* disabling auto-negotiation, and the direction of the
* SW defined pins. If there is no SW over-ride of the flow
* control setting, then the variable hw->fc will
* be initialized based on a value in the EEPROM.
*/
if (ret_val) {
DEBUGOUT("NVM Read Error\n");
goto out;
}
if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
else
out:
return (ret_val);
}
/*
* e1000_force_mac_fc_generic - Force the MAC's flow control settings
* @hw: pointer to the HW structure
*
* Force the MAC's flow control settings. Sets the TFCE and RFCE bits in the
* device control register to reflect the adapter settings. TFCE and RFCE
* need to be explicitly set by software when a copper PHY is used because
* autonegotiation is managed by the PHY rather than the MAC. Software must
* also configure these bits when link is forced on a fiber connection.
*/
{
DEBUGFUNC("e1000_force_mac_fc_generic");
/*
* Because we didn't get link via the internal auto-negotiation
* mechanism (we either forced link or we got link via PHY
* receive flow control.
*
* according to the "hw->fc.current_mode" parameter.
*
* The possible values of the "fc" parameter are:
* 0: Flow control is completely disabled
* 1: Rx flow control is enabled (we can receive pause
* frames but not send pause frames).
* 2: Tx flow control is enabled (we can send pause frames
* frames but we do not receive pause frames).
* 3: Both Rx and Tx flow control (symmetric) is enabled.
* other: No other values should be possible at this point.
*/
case e1000_fc_none:
break;
case e1000_fc_rx_pause:
ctrl &= (~E1000_CTRL_TFCE);
ctrl |= E1000_CTRL_RFCE;
break;
case e1000_fc_tx_pause:
ctrl &= (~E1000_CTRL_RFCE);
ctrl |= E1000_CTRL_TFCE;
break;
case e1000_fc_full:
break;
default:
DEBUGOUT("Flow control param set incorrectly\n");
goto out;
}
out:
return (ret_val);
}
/*
* e1000_config_fc_after_link_up_generic - Configures flow control after link
* @hw: pointer to the HW structure
*
* Checks the status of auto-negotiation after link up to ensure that the
* speed and duplex were not forced. If the link needed to be forced, then
* flow control needs to be forced also. If auto-negotiation is enabled
* and did not fail, then we configure flow control based on our link
* partner.
*/
{
DEBUGFUNC("e1000_config_fc_after_link_up_generic");
/*
* Check for the case where we have fiber media and auto-neg failed
* so we had to force link. In this case, we need to force the
* configuration of the MAC to match the "fc" parameter.
*/
if (mac->autoneg_failed) {
} else {
}
if (ret_val) {
DEBUGOUT("Error forcing flow control settings\n");
goto out;
}
/*
* Check for the case where we have copper media and auto-neg is
* enabled. In this case, we need to check and see if Auto-Neg
* has completed, and if so, how the PHY and link partner has
* flow control configured.
*/
/*
* Read the MII Status Register and check to see if AutoNeg
* has completed. We read this twice because this reg has
* some "sticky" (latched) bits.
*/
if (ret_val)
goto out;
if (ret_val)
goto out;
if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
DEBUGOUT("Copper PHY and Auto Neg "
"has not completed.\n");
goto out;
}
/*
* The AutoNeg process has completed, so we now need to
* read both the Auto Negotiation Advertisement
* Register (Address 4) and the Auto_Negotiation Base
* Page Ability Register (Address 5) to determine how
* flow control was negotiated.
*/
if (ret_val)
goto out;
if (ret_val)
goto out;
/*
* Two bits in the Auto Negotiation Advertisement Register
* (Address 4) and two bits in the Auto Negotiation Base
* Page Ability Register (Address 5) determine flow control
* for both the PHY and the link partner. The following
* 1999, describes these PAUSE resolution bits and how flow
* control is determined based upon these settings.
* NOTE: DC = Don't Care
*
* LOCAL DEVICE | LINK PARTNER
* PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution
* ------|---------|-------|---------|--------------------
* 0 | 0 | DC | DC | e1000_fc_none
* 0 | 1 | 0 | DC | e1000_fc_none
* 0 | 1 | 1 | 0 | e1000_fc_none
* 0 | 1 | 1 | 1 | e1000_fc_tx_pause
* 1 | 0 | 0 | DC | e1000_fc_none
* 1 | DC | 1 | DC | e1000_fc_full
* 1 | 1 | 0 | 0 | e1000_fc_none
* 1 | 1 | 0 | 1 | e1000_fc_rx_pause
*
* Are both PAUSE bits set to 1? If so, this implies
* Symmetric Flow Control is enabled at both ends. The
* ASM_DIR bits are irrelevant per the spec.
*
* For Symmetric Flow Control:
*
* LOCAL DEVICE | LINK PARTNER
* PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
* ------|---------|-------|---------|--------------------
* 1 | DC | 1 | DC | E1000_fc_full
*
*/
if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
/*
* Now we need to check if the user selected Rx ONLY
* of pause frames. In this case, we had to advertise
* FULL flow control because we could not advertise RX
* ONLY. Hence, we must now check to see if we need to
* turn OFF the TRANSMISSION of PAUSE frames.
*/
DEBUGOUT("Flow Control = FULL.\r\n");
} else {
DEBUGOUT("Flow Control = "
"RX PAUSE frames only.\r\n");
}
}
/*
* For receiving PAUSE frames ONLY.
*
* LOCAL DEVICE | LINK PARTNER
* PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
* ------|---------|-------|---------|--------------------
* 0 | 1 | 1 | 1 | e1000_fc_tx_pause
*/
else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) &&
(mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
DEBUGOUT("Flow Control = TX PAUSE frames only.\r\n");
}
/*
* For transmitting PAUSE frames ONLY.
*
* LOCAL DEVICE | LINK PARTNER
* PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
* ------|---------|-------|---------|--------------------
* 1 | 1 | 0 | 1 | e1000_fc_rx_pause
*/
else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
(mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
} else {
/*
* Per the IEEE spec, at this point flow control
* should be disabled.
*/
DEBUGOUT("Flow Control = NONE.\r\n");
}
/*
* Now we need to do one last check... If we auto-
* negotiated to HALF DUPLEX, flow control should not be
* enabled per IEEE 802.3 spec.
*/
if (ret_val) {
DEBUGOUT("Error getting link speed and duplex\n");
goto out;
}
if (duplex == HALF_DUPLEX)
/*
* Now we call a subroutine to actually force the MAC
* controller to use the correct flow control settings.
*/
if (ret_val) {
DEBUGOUT("Error forcing flow control settings\n");
goto out;
}
}
out:
return (ret_val);
}
/*
* @hw: pointer to the HW structure
* @speed: stores the current speed
* @duplex: stores the current duplex
*
* speed and duplex for copper connections.
*/
{
DEBUGFUNC("e1000_get_speed_and_duplex_copper_generic");
if (status & E1000_STATUS_SPEED_1000) {
*speed = SPEED_1000;
DEBUGOUT("1000 Mbs, ");
} else if (status & E1000_STATUS_SPEED_100) {
DEBUGOUT("100 Mbs, ");
} else {
DEBUGOUT("10 Mbs, ");
}
if (status & E1000_STATUS_FD) {
*duplex = FULL_DUPLEX;
DEBUGOUT("Full Duplex\n");
} else {
*duplex = HALF_DUPLEX;
DEBUGOUT("Half Duplex\n");
}
return (E1000_SUCCESS);
}
/*
* @hw: pointer to the HW structure
* @speed: stores the current speed
* @duplex: stores the current duplex
*
* Sets the speed and duplex to gigabit full duplex (the only possible option)
*/
{
DEBUGFUNC("e1000_get_speed_and_duplex_fiber_serdes_generic");
*speed = SPEED_1000;
*duplex = FULL_DUPLEX;
return (E1000_SUCCESS);
}
/*
* e1000_get_hw_semaphore_generic - Acquire hardware semaphore
* @hw: pointer to the HW structure
*
* Acquire the HW semaphore to access the PHY or NVM
*/
{
s32 i = 0;
DEBUGFUNC("e1000_get_hw_semaphore_generic");
/* Get the SW semaphore */
while (i < timeout) {
if (!(swsm & E1000_SWSM_SMBI))
break;
usec_delay(50);
i++;
}
if (i == timeout) {
DEBUGOUT("Driver can't access device - SMBI bit is set.\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
/* Get the FW semaphore. */
for (i = 0; i < timeout; i++) {
/* Semaphore acquired if bit latched */
break;
usec_delay(50);
}
if (i == timeout) {
/* Release semaphores */
DEBUGOUT("Driver can't access the NVM\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
out:
return (ret_val);
}
/*
* e1000_put_hw_semaphore_generic - Release hardware semaphore
* @hw: pointer to the HW structure
*
* Release hardware semaphore used to access the PHY or NVM
*/
void
{
DEBUGFUNC("e1000_put_hw_semaphore_generic");
}
/*
* e1000_get_auto_rd_done_generic - Check for auto read completion
* @hw: pointer to the HW structure
*
* Check EEPROM for Auto Read done bit.
*/
{
s32 i = 0;
DEBUGFUNC("e1000_get_auto_rd_done_generic");
while (i < AUTO_READ_DONE_TIMEOUT) {
break;
msec_delay(1);
i++;
}
if (i == AUTO_READ_DONE_TIMEOUT) {
DEBUGOUT("Auto read by HW from NVM has not completed.\n");
goto out;
}
out:
return (ret_val);
}
/*
* e1000_valid_led_default_generic - Verify a valid default LED config
* @hw: pointer to the HW structure
* @data: pointer to the NVM (EEPROM)
*
* Read the EEPROM for the current default LED configuration. If the
* LED configuration is not valid, set to a valid LED configuration.
*/
{
DEBUGFUNC("e1000_valid_led_default_generic");
if (ret_val) {
DEBUGOUT("NVM Read Error\n");
goto out;
}
*data = ID_LED_DEFAULT;
out:
return (ret_val);
}
/*
* e1000_id_led_init_generic -
* @hw: pointer to the HW structure
*
*/
{
DEBUGFUNC("e1000_id_led_init_generic");
if (ret_val)
goto out;
for (i = 0; i < 4; i++) {
switch (temp) {
case ID_LED_ON1_DEF2:
case ID_LED_ON1_ON2:
case ID_LED_ON1_OFF2:
break;
case ID_LED_OFF1_DEF2:
case ID_LED_OFF1_ON2:
case ID_LED_OFF1_OFF2:
break;
default:
/* Do nothing */
break;
}
switch (temp) {
case ID_LED_DEF1_ON2:
case ID_LED_ON1_ON2:
case ID_LED_OFF1_ON2:
break;
case ID_LED_DEF1_OFF2:
case ID_LED_ON1_OFF2:
case ID_LED_OFF1_OFF2:
break;
default:
/* Do nothing */
break;
}
}
out:
return (ret_val);
}
/*
* e1000_setup_led_generic - Configures SW controllable LED
* @hw: pointer to the HW structure
*
* This prepares the SW controllable LED for use and saves the current state
* of the LED so it can be later restored.
*/
{
DEBUGFUNC("e1000_setup_led_generic");
goto out;
}
/* Turn off LED0 */
ledctl &= ~(E1000_LEDCTL_LED0_IVRT |
ledctl |= (E1000_LEDCTL_MODE_LED_OFF <<
}
out:
return (ret_val);
}
/*
* e1000_cleanup_led_generic - Set LED config to default operation
* @hw: pointer to the HW structure
*
* Remove the current LED configuration and set the LED configuration
* to the default value, saved from the EEPROM.
*/
{
DEBUGFUNC("e1000_cleanup_led_generic");
goto out;
}
out:
return (ret_val);
}
/*
* e1000_blink_led_generic - Blink LED
* @hw: pointer to the HW structure
*
* Blink the LEDs which are set to be on.
*/
{
u32 ledctl_blink = 0;
u32 i;
DEBUGFUNC("e1000_blink_led_generic");
/* always blink LED0 for PCI-E fiber */
} else {
/*
* set the blink bit for each LED that's "on" (0x0E)
* in ledctl_mode2
*/
for (i = 0; i < 4; i++)
(i * 8));
}
return (E1000_SUCCESS);
}
/*
* e1000_led_on_generic - Turn LED on
* @hw: pointer to the HW structure
*
* Turn LED on.
*/
{
DEBUGFUNC("e1000_led_on_generic");
case e1000_media_type_fiber:
ctrl &= ~E1000_CTRL_SWDPIN0;
break;
case e1000_media_type_copper:
break;
default:
break;
}
return (E1000_SUCCESS);
}
/*
* e1000_led_off_generic - Turn LED off
* @hw: pointer to the HW structure
*
* Turn LED off.
*/
{
DEBUGFUNC("e1000_led_off_generic");
case e1000_media_type_fiber:
break;
case e1000_media_type_copper:
break;
default:
break;
}
return (E1000_SUCCESS);
}
/*
* e1000_set_pcie_no_snoop_generic - Set PCI-express capabilities
* @hw: pointer to the HW structure
* @no_snoop: bitmap of snoop events
*
* Set the PCI-express register to snoop for events enabled in 'no_snoop'.
*/
void
{
DEBUGFUNC("e1000_set_pcie_no_snoop_generic");
return;
if (no_snoop) {
gcr &= ~(PCIE_NO_SNOOP_ALL);
}
}
/*
* e1000_disable_pcie_master_generic - Disables PCI-express master access
* @hw: pointer to the HW structure
*
* Returns 0 (E1000_SUCCESS) if successful, else returns -10
* (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
* the master requests to be disabled.
*
* Disables PCI-Express master access and verifies there are no pending
* requests.
*/
{
DEBUGFUNC("e1000_disable_pcie_master_generic");
goto out;
while (timeout) {
break;
usec_delay(100);
timeout--;
}
if (!timeout) {
DEBUGOUT("Master requests are pending.\n");
goto out;
}
out:
return (ret_val);
}
/*
* e1000_reset_adaptive_generic - Reset Adaptive Interframe Spacing
* @hw: pointer to the HW structure
*
* Reset the Adaptive Interframe Spacing throttle to default values.
*/
void
{
DEBUGFUNC("e1000_reset_adaptive_generic");
if (!mac->adaptive_ifs) {
DEBUGOUT("Not in Adaptive IFS mode!\n");
return;
}
mac->current_ifs_val = 0;
mac->in_ifs_mode = false;
}
/*
* e1000_update_adaptive_generic - Update Adaptive Interframe Spacing
* @hw: pointer to the HW structure
*
* Update the Adaptive Interframe Spacing Throttle value based on the
* time between transmitted packets and time between collisions.
*/
void
{
DEBUGFUNC("e1000_update_adaptive_generic");
if (!mac->adaptive_ifs) {
DEBUGOUT("Not in Adaptive IFS mode!\n");
return;
}
mac->in_ifs_mode = true;
if (!mac->current_ifs_val)
else
mac->current_ifs_val +=
}
}
} else {
if (mac->in_ifs_mode &&
mac->current_ifs_val = 0;
mac->in_ifs_mode = false;
}
}
}
/*
* @hw: pointer to the HW structure
*
* set, which is forced to MDI mode only.
*/
static s32
{
DEBUGFUNC("e1000_validate_mdi_setting_generic");
DEBUGOUT("Invalid MDI setting detected\n");
goto out;
}
out:
return (ret_val);
}
/*
* e1000_write_8bit_ctrl_reg_generic - Write a 8bit CTRL register
* @hw: pointer to the HW structure
* @reg: 32bit register offset such as E1000_SCTL
* @offset: register offset to write to
* @data: data to write at register offset
*
* and they all have the format address << 8 | data and bit 31 is polled for
* completion.
*/
{
DEBUGFUNC("e1000_write_8bit_ctrl_reg_generic");
/* Set up the address and data */
/* Poll the ready bit to see if the MDI read completed */
for (i = 0; i < E1000_GEN_POLL_TIMEOUT; i++) {
usec_delay(5);
if (regvalue & E1000_GEN_CTL_READY)
break;
}
if (!(regvalue & E1000_GEN_CTL_READY)) {
ret_val = -E1000_ERR_PHY;
goto out;
}
out:
return (ret_val);
}