igb_buf.c revision 837c1ac4e72b7d86278cca88b1075af557f7d161
/*
* CDDL HEADER START
*
* Copyright(c) 2007-2009 Intel Corporation. All rights reserved.
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at:
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When using or redistributing this file, you may do so under the
* License only. No other modification of this header is permitted.
*
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#include "igb_sw.h"
static int igb_alloc_tbd_ring(igb_tx_ring_t *);
static void igb_free_tbd_ring(igb_tx_ring_t *);
static int igb_alloc_rbd_ring(igb_rx_ring_t *);
static void igb_free_rbd_ring(igb_rx_ring_t *);
static void igb_free_dma_buffer(dma_buffer_t *);
static int igb_alloc_tcb_lists(igb_tx_ring_t *);
static void igb_free_tcb_lists(igb_tx_ring_t *);
static int igb_alloc_rcb_lists(igb_rx_ring_t *);
static void igb_free_rcb_lists(igb_rx_ring_t *);
#ifdef __sparc
#define IGB_DMA_ALIGNMENT 0x0000000000002000ull
#else
#define IGB_DMA_ALIGNMENT 0x0000000000001000ull
#endif
/*
*/
static ddi_dma_attr_t igb_desc_dma_attr = {
DMA_ATTR_V0, /* version number */
0x0000000000000000ull, /* low address */
0xFFFFFFFFFFFFFFFFull, /* high address */
0x00000000FFFFFFFFull, /* dma counter max */
IGB_DMA_ALIGNMENT, /* alignment */
0x00000FFF, /* burst sizes */
0x00000001, /* minimum transfer size */
0x00000000FFFFFFFFull, /* maximum transfer size */
0xFFFFFFFFFFFFFFFFull, /* maximum segment size */
0x00000001, /* granularity */
DDI_DMA_FLAGERR, /* DMA flags */
};
/*
*/
static ddi_dma_attr_t igb_buf_dma_attr = {
DMA_ATTR_V0, /* version number */
0x0000000000000000ull, /* low address */
0xFFFFFFFFFFFFFFFFull, /* high address */
0x00000000FFFFFFFFull, /* dma counter max */
IGB_DMA_ALIGNMENT, /* alignment */
0x00000FFF, /* burst sizes */
0x00000001, /* minimum transfer size */
0x00000000FFFFFFFFull, /* maximum transfer size */
0xFFFFFFFFFFFFFFFFull, /* maximum segment size */
0x00000001, /* granularity */
DDI_DMA_FLAGERR, /* DMA flags */
};
/*
* DMA attributes for transmit
*/
static ddi_dma_attr_t igb_tx_dma_attr = {
DMA_ATTR_V0, /* version number */
0x0000000000000000ull, /* low address */
0xFFFFFFFFFFFFFFFFull, /* high address */
0x00000000FFFFFFFFull, /* dma counter max */
1, /* alignment */
0x00000FFF, /* burst sizes */
0x00000001, /* minimum transfer size */
0x00000000FFFFFFFFull, /* maximum transfer size */
0xFFFFFFFFFFFFFFFFull, /* maximum segment size */
MAX_COOKIE, /* scatter/gather list length */
0x00000001, /* granularity */
DDI_DMA_FLAGERR, /* DMA flags */
};
/*
* DMA access attributes for descriptors.
*/
static ddi_device_acc_attr_t igb_desc_acc_attr = {
};
/*
* DMA access attributes for buffers.
*/
static ddi_device_acc_attr_t igb_buf_acc_attr = {
};
/*
*/
int
{
int i;
for (i = 0; i < igb->num_rx_rings; i++) {
/*
* Allocate receive desciptor ring and control block lists
*/
goto alloc_dma_failure;
goto alloc_dma_failure;
}
for (i = 0; i < igb->num_tx_rings; i++) {
/*
* Allocate transmit desciptor ring and control block lists
*/
goto alloc_dma_failure;
goto alloc_dma_failure;
}
return (IGB_SUCCESS);
return (IGB_FAILURE);
}
/*
*/
void
{
int i;
/*
* Free DMA resources of rx rings
*/
for (i = 0; i < igb->num_rx_rings; i++) {
}
/*
* Free DMA resources of tx rings
*/
for (i = 0; i < igb->num_tx_rings; i++) {
}
}
/*
* igb_alloc_tbd_ring - Memory allocation for the tx descriptors of one ring.
*/
static int
{
int ret;
/*
* If tx head write-back is enabled, an extra tbd is allocated
* to save the head write-back value
*/
if (igb->tx_head_wb_enable) {
size += sizeof (union e1000_adv_tx_desc);
}
/*
* Allocate a DMA handle for the transmit descriptor
* memory area.
*/
if (ret != DDI_SUCCESS) {
"Could not allocate tbd dma handle: %x", ret);
return (IGB_FAILURE);
}
/*
* Allocate memory to DMA data to and from the transmit
* descriptors.
*/
if (ret != DDI_SUCCESS) {
"Could not allocate tbd dma memory: %x", ret);
}
return (IGB_FAILURE);
}
/*
* Initialize the entire transmit buffer descriptor area to zero
*/
/*
* Allocates DMA resources for the memory that was allocated by
* the ddi_dma_mem_alloc call. The DMA resources then get bound to the
* the memory address
*/
if (ret != DDI_DMA_MAPPED) {
"Could not bind tbd dma resource: %x", ret);
}
}
return (IGB_FAILURE);
}
return (IGB_SUCCESS);
}
/*
* igb_free_tbd_ring - Free the tx descriptors of one ring.
*/
static void
{
}
}
}
}
/*
* igb_alloc_rbd_ring - Memory allocation for the rx descriptors of one ring.
*/
static int
{
int ret;
/*
* Allocate a new DMA handle for the receive descriptor
* memory area.
*/
if (ret != DDI_SUCCESS) {
"Could not allocate rbd dma handle: %x", ret);
return (IGB_FAILURE);
}
/*
* Allocate memory to DMA data to and from the receive
* descriptors.
*/
if (ret != DDI_SUCCESS) {
"Could not allocate rbd dma memory: %x", ret);
}
return (IGB_FAILURE);
}
/*
* Initialize the entire transmit buffer descriptor area to zero
*/
/*
* Allocates DMA resources for the memory that was allocated by
* the ddi_dma_mem_alloc call.
*/
if (ret != DDI_DMA_MAPPED) {
"Could not bind rbd dma resource: %x", ret);
}
}
return (IGB_FAILURE);
}
return (IGB_SUCCESS);
}
/*
* igb_free_rbd_ring - Free the rx descriptors of one ring.
*/
static void
{
}
}
}
}
/*
* igb_alloc_dma_buffer - Allocate DMA resources for a DMA buffer
*/
static int
{
int ret;
if (ret != DDI_SUCCESS) {
"Could not allocate dma buffer handle: %x", ret);
return (IGB_FAILURE);
}
if (ret != DDI_SUCCESS) {
}
"Could not allocate dma buffer memory: %x", ret);
return (IGB_FAILURE);
}
if (ret != DDI_DMA_MAPPED) {
}
}
"Could not bind dma buffer handle: %x", ret);
return (IGB_FAILURE);
}
return (IGB_SUCCESS);
}
/*
* igb_free_dma_buffer - Free one allocated area of dma memory and handle
*/
static void
{
} else {
return;
}
}
}
}
/*
* igb_alloc_tcb_lists - Memory allocation for the transmit control bolcks
* of one ring.
*/
static int
{
int i;
int ret;
/*
* Allocate memory for the work list.
*/
"Cound not allocate memory for tx work list");
return (IGB_FAILURE);
}
/*
* Allocate memory for the free list.
*/
"Cound not allocate memory for tx free list");
return (IGB_FAILURE);
}
/*
* Allocate memory for the tx control blocks of free list.
*/
kmem_zalloc(sizeof (tx_control_block_t) *
"Cound not allocate memory for tx control blocks");
return (IGB_FAILURE);
}
/*
* Allocate dma memory for the tx control block of free list.
*/
/*
* Pre-allocate dma handles for transmit. These dma handles
* will be dynamically bound to the data buffers passed down
* from the upper layers at the time of transmitting.
*/
&tcb->tx_dma_handle);
if (ret != DDI_SUCCESS) {
"Could not allocate tx dma handle: %x", ret);
goto alloc_tcb_lists_fail;
}
/*
* Pre-allocate transmit buffers for packets that the
* size is less than bcopy_thresh.
*/
if (ret != IGB_SUCCESS) {
goto alloc_tcb_lists_fail;
}
}
return (IGB_SUCCESS);
return (IGB_FAILURE);
}
/*
* igb_free_tcb_lists - Release the memory allocated for
* the transmit control bolcks of one ring.
*/
static void
{
int i;
return;
/* Free the tx dma handle for dynamical binding */
} else {
/*
* If the dma handle is NULL, then we don't
* have to check the remaining.
*/
break;
}
}
}
}
}
}
/*
* igb_alloc_rcb_lists - Memory allocation for the receive control blocks
* of one ring.
*/
static int
{
int i;
int ret;
/*
* Allocate memory for the work list.
*/
"Could not allocate memory for rx work list");
return (IGB_FAILURE);
}
/*
* Allocate memory for the free list.
*/
"Cound not allocate memory for rx free list");
return (IGB_FAILURE);
}
/*
* Allocate memory for the rx control blocks for work list and
* free list.
*/
"Cound not allocate memory for rx control blocks");
return (IGB_FAILURE);
}
/*
* Allocate dma memory for the rx control blocks
*/
/* Attach the rx control block to the work list */
} else {
/* Attach the rx control block to the free list */
}
if (ret != IGB_SUCCESS) {
goto alloc_rcb_lists_fail;
}
}
return (IGB_SUCCESS);
return (IGB_FAILURE);
}
/*
* igb_free_rcb_lists - Free the receive control blocks of one ring.
*/
static void
{
int i;
return;
}
}
sizeof (rx_control_block_t) * rcb_count);
}
}
}
}
void
{
if (dma_flag) {
} else {
}
}