tavor_ci.c revision 17a2b317610f531d565bf4e940433aab2d9e6985
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
*/
/*
* Tavor Channel Interface (CI) Routines
*
* Implements all the routines necessary to interface with the IBTF.
* Pointers to all of these functions are passed to the IBTF at attach()
* time in the ibc_operations_t structure. These functions include all
* of the necessary routines to implement the required InfiniBand "verbs"
* and additional IBTF-specific interfaces.
*/
/* HCA and port related operations */
/* Protection Domains */
ibc_pd_hdl_t *);
/* Reliable Datagram Domains */
ibc_rdd_hdl_t *);
/* Address Handles */
ibc_pd_hdl_t *, ibt_adds_vect_t *);
ibt_adds_vect_t *);
/* Queue Pairs */
ibc_qp_hdl_t *);
ibt_chan_sizes_t *, ibc_qp_hdl_t *);
/* Completion Queues */
/* EE Contexts */
/* Memory Registration */
ibc_mr_hdl_t *, ibt_mr_desc_t *);
ibt_mr_desc_t *);
ibt_mr_desc_t *);
/* Memory Windows */
/* Multicast Groups */
/* Work Request and Completion Processing */
/* CI Object Private Data */
ibt_object_type_t, void *, void *, size_t);
/* CI Object Private Data */
ibt_object_type_t, void *, void *, size_t);
/* Shared Receive Queues */
ibt_srq_sizes_t *);
/* Address translation */
ibt_all_wr_t *, ibc_mi_hdl_t *);
/* Allocate L_Key */
/* Physical Register Memory Region */
ibt_pmr_desc_t *);
/* Mellanox FMR */
caddr_t *, tavor_mem_alloc_hdl_t *);
static ibt_status_t tavor_ci_not_supported();
/*
* This ibc_operations_t structure includes pointers to all the entry points
* provided by the Tavor driver. This structure is passed to the IBTF at
* driver attach time, using the ibc_attach() call.
*/
/* HCA and port related operations */
/* Protection Domains */
/* Reliable Datagram Domains */
/* Address Handles */
/* Queue Pairs */
/* Completion Queues */
tavor_ci_not_supported, /* query_cq_handler_id */
/* EE Contexts */
/* Memory Registration */
/* Memory Windows */
/* Multicast Groups */
/* Work Request and Completion Processing */
/* CI Object Mapping Data */
/* Shared Receive Queue */
/* Address translation */
/* Allocate L_key */
/* Physical Register Memory Region */
/* Mellanox FMR */
/* dmable memory */
/* XRC not yet supported */
tavor_ci_not_supported, /* ibc_alloc_xrc_domain */
tavor_ci_not_supported, /* ibc_free_xrc_domain */
tavor_ci_not_supported, /* ibc_alloc_xrc_srq */
tavor_ci_not_supported, /* ibc_free_xrc_srq */
tavor_ci_not_supported, /* ibc_query_xrc_srq */
tavor_ci_not_supported, /* ibc_modify_xrc_srq */
tavor_ci_not_supported, /* ibc_alloc_xrc_tgt_qp */
tavor_ci_not_supported, /* ibc_free_xrc_tgt_qp */
tavor_ci_not_supported, /* ibc_query_xrc_tgt_qp */
tavor_ci_not_supported, /* ibc_modify_xrc_tgt_qp */
/* Memory Region (physical) */
/* Next enhancements */
tavor_ci_not_supported, /* ibc_enhancement1 */
tavor_ci_not_supported, /* ibc_enhancement2 */
tavor_ci_not_supported, /* ibc_enhancement3 */
tavor_ci_not_supported, /* ibc_enhancement4 */
};
/*
* Not yet implemented OPS
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_query_hca_ports()
* Returns HCA port attributes for either one or all of the HCA's ports.
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/*
* If the specified port is zero, then we are supposed to query all
* ports. Otherwise, we query only the port number specified.
* Setup the start and end port numbers as appropriate for the loop
* below. Note: The first Tavor port is port number one (1).
*/
if (query_port == 0) {
start = 1;
} else {
}
/* Query the port(s) */
if (status != DDI_SUCCESS) {
return (status);
}
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_modify_ports()
* Modify HCA port attributes
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/* Modify the port(s) */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_modify_system_image()
* Modify the System Image GUID
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
/*
* This is an unsupported interface for the Tavor driver. This
* interface is necessary to support modification of the System
* Image GUID. Tavor is only capable of modifying this parameter
* once (during driver initialization).
*/
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_alloc_pd()
* Allocate a Protection Domain
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/* Allocate the PD */
if (status != DDI_SUCCESS) {
return (status);
}
/* Return the Tavor PD handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_free_pd()
* Free a Protection Domain
* Context: Can be called only from user or kernel context
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid PD handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_PD_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and PD handle */
/* Free the PD */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_alloc_rdd()
* Allocate a Reliable Datagram Domain
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
/*
* This is an unsupported interface for the Tavor driver. This
* interface is necessary to support Reliable Datagram (RD)
* operations. Tavor does not support RD.
*/
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_free_rdd()
* Free a Reliable Datagram Domain
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
/*
* This is an unsupported interface for the Tavor driver. This
* interface is necessary to support Reliable Datagram (RD)
* operations. Tavor does not support RD.
*/
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_alloc_ah()
* Allocate an Address Handle
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid PD handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_PD_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and PD handle */
/* Allocate the AH */
if (status != DDI_SUCCESS) {
return (status);
}
/* Return the Tavor AH handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_free_ah()
* Free an Address Handle
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid address handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_AH_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and AH handle */
/* Free the AH */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_query_ah()
* Return the Address Vector information for a specified Address Handle
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid address handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_AH_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and AH handle */
/* Query the AH */
if (status != DDI_SUCCESS) {
return (status);
}
/* Return the Tavor PD handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_modify_ah()
* Modify the Address Vector information of a specified Address Handle
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid address handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_AH_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and AH handle */
/* Modify the AH */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_alloc_qp()
* Allocate a Queue Pair
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/* Allocate the QP */
if (status != DDI_SUCCESS) {
return (status);
}
/* Return the Tavor QP handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_alloc_special_qp()
* Allocate a Special Queue Pair
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/* Allocate the Special QP */
if (status != DDI_SUCCESS) {
return (status);
}
/* Return the Tavor QP handle */
return (IBT_SUCCESS);
}
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_free_qp()
* Free a Queue Pair
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid QP handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_QP_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and QP handle */
/* Free the QP */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_release_qpn()
* Release a Queue Pair Number (QPN)
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid QP handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_QP_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and QP handle */
/* Release the QP number */
return (IBT_SUCCESS);
}
/*
* tavor_ci_query_qp()
* Query a Queue Pair
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid QP handle */
TAVOR_TNF_ERROR, "");
return (IBT_QP_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and QP handle */
/* Query the QP */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_modify_qp()
* Modify a Queue Pair
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid QP handle */
TAVOR_TNF_ERROR, "");
return (IBT_QP_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and QP handle */
/* Modify the QP */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_alloc_cq()
* Allocate a Completion Queue
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/* Allocate the CQ */
&cqhdl, TAVOR_NOSLEEP);
if (status != DDI_SUCCESS) {
return (status);
}
/* Return the Tavor CQ handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_free_cq()
* Free a Completion Queue
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid CQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_CQ_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and CQ handle */
/* Free the CQ */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_query_cq()
* Return the size of a Completion Queue
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid CQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_CQ_HDL_INVALID);
}
/* Grab the CQ handle */
/* Query the current CQ size */
/* interrupt moderation is not supported */
*count_p = 0;
*usec_p = 0;
*hid_p = 0;
return (IBT_SUCCESS);
}
/*
* tavor_ci_resize_cq()
* Change the size of a Completion Queue
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid CQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_CQ_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and CQ handle */
/* Resize the CQ */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* CQ interrupt moderation is not supported in tavor.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_alloc_cq_sched()
* Reserve a CQ scheduling class resource
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_HCA_HDL_INVALID);
}
*sched_hdl_p = NULL;
/*
* This is an unsupported interface for the Tavor driver. Tavor
* does not support CQ scheduling classes.
*/
return (IBT_SUCCESS);
}
/*
* tavor_ci_free_cq_sched()
* Free a CQ scheduling class resource
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_HCA_HDL_INVALID);
}
/*
* This is an unsupported interface for the Tavor driver. Tavor
* does not support CQ scheduling classes.
*/
return (IBT_SUCCESS);
}
/*
* tavor_ci_alloc_eec()
* Allocate an End-to-End context
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
/*
* This is an unsupported interface for the Tavor driver. This
* interface is necessary to support Reliable Datagram (RD)
* operations. Tavor does not support RD.
*/
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_free_eec()
* Free an End-to-End context
* Context: Can be called only from user or kernel context.
*/
/* ARGSUSED */
static ibt_status_t
{
/*
* This is an unsupported interface for the Tavor driver. This
* interface is necessary to support Reliable Datagram (RD)
* operations. Tavor does not support RD.
*/
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_query_eec()
* Query an End-to-End context
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
/*
* This is an unsupported interface for the Tavor driver. This
* interface is necessary to support Reliable Datagram (RD)
* operations. Tavor does not support RD.
*/
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_modify_eec()
* Modify an End-to-End context
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
/*
* This is an unsupported interface for the Tavor driver. This
* interface is necessary to support Reliable Datagram (RD)
* operations. Tavor does not support RD.
*/
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_register_mr()
* Prepare a virtually addressed Memory Region for use by an HCA
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid PD handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_PD_HDL_INVALID);
}
/*
* Validate the access flags. Both Remote Write and Remote Atomic
* require the Local Write flag to be set
*/
TAVOR_TNF_ERROR, "");
return (IBT_MR_ACCESS_REQ_INVALID);
}
/* Grab the Tavor softstate pointer and PD handle */
/* Register the memory region */
op.mro_bind_override_addr = 0;
if (status != DDI_SUCCESS) {
return (status);
}
/* Fill in the mr_desc structure */
/* Only set RKey if remote access was requested */
}
/*
* If region is mapped for streaming (i.e. noncoherent), then set
* sync is required
*/
/* Return the Tavor MR handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_register_buf()
* Prepare a Memory Region specified by buf structure for use by an HCA
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid PD handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_PD_HDL_INVALID);
}
/*
* Validate the access flags. Both Remote Write and Remote Atomic
* require the Local Write flag to be set
*/
if (((flags & IBT_MR_ENABLE_REMOTE_WRITE) ||
(flags & IBT_MR_ENABLE_REMOTE_ATOMIC)) &&
!(flags & IBT_MR_ENABLE_LOCAL_WRITE)) {
TAVOR_TNF_ERROR, "");
return (IBT_MR_ACCESS_REQ_INVALID);
}
/* Grab the Tavor softstate pointer and PD handle */
/* Register the memory region */
op.mro_bind_override_addr = 0;
if (status != DDI_SUCCESS) {
return (status);
}
/* Fill in the mr_desc structure */
/* Only set RKey if remote access was requested */
if ((flags & IBT_MR_ENABLE_REMOTE_ATOMIC) ||
(flags & IBT_MR_ENABLE_REMOTE_WRITE) ||
(flags & IBT_MR_ENABLE_REMOTE_READ)) {
}
/*
* If region is mapped for streaming (i.e. noncoherent), then set
* sync is required
*/
/* Return the Tavor MR handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_deregister_mr()
* Deregister a Memory Region from an HCA translation table
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid memory region handle */
TAVOR_TNF_ERROR, "");
return (IBT_MR_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/*
* Deregister the memory region.
*/
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_query_mr()
* Retrieve information about a specified Memory Region
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for MemRegion handle */
TAVOR_TNF_ERROR, "");
return (IBT_MR_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and MR handle */
/* Query the memory region */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_register_shared_mr()
* Create a shared memory region matching an existing Memory Region
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid PD handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_PD_HDL_INVALID);
}
/* Check for valid memory region handle */
TAVOR_TNF_ERROR, "");
return (IBT_MR_HDL_INVALID);
}
/*
* Validate the access flags. Both Remote Write and Remote Atomic
* require the Local Write flag to be set
*/
TAVOR_TNF_ERROR, "");
return (IBT_MR_ACCESS_REQ_INVALID);
}
/* Grab the Tavor softstate pointer and handles */
/* Register the shared memory region */
&mrhdl_new);
if (status != DDI_SUCCESS) {
return (status);
}
/* Fill in the mr_desc structure */
/* Only set RKey if remote access was requested */
}
/*
* If shared region is mapped for streaming (i.e. noncoherent), then
* set sync is required
*/
/* Return the Tavor MR handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_reregister_mr()
* Modify the attributes of an existing Memory Region
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
"");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid memory region handle */
TAVOR_TNF_ERROR, "");
return (IBT_MR_HDL_INVALID);
}
/* Grab the Tavor softstate pointer, mrhdl, and pdhdl */
/* Reregister the memory region */
if (status != DDI_SUCCESS) {
return (status);
}
/* Fill in the mr_desc structure */
/* Only set RKey if remote access was requested */
}
/*
* If region is mapped for streaming (i.e. noncoherent), then set
* sync is required
*/
/* Return the Tavor MR handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_reregister_buf()
* Modify the attributes of an existing Memory Region
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
"");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid memory region handle */
TAVOR_TNF_ERROR, "");
return (IBT_MR_HDL_INVALID);
}
/* Grab the Tavor softstate pointer, mrhdl, and pdhdl */
/* Reregister the memory region */
if (status != DDI_SUCCESS) {
return (status);
}
/* Fill in the mr_desc structure */
/* Only set RKey if remote access was requested */
if ((flags & IBT_MR_ENABLE_REMOTE_ATOMIC) ||
(flags & IBT_MR_ENABLE_REMOTE_WRITE) ||
(flags & IBT_MR_ENABLE_REMOTE_READ)) {
}
/*
* If region is mapped for streaming (i.e. noncoherent), then set
* sync is required
*/
/* Return the Tavor MR handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_sync_mr()
* Synchronize access to a Memory Region
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/* Sync the memory region */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_alloc_mw()
* Allocate a Memory Window
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid PD handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_PD_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and PD handle */
/* Allocate the memory window */
if (status != DDI_SUCCESS) {
return (status);
}
/* Return the MW handle and RKey */
return (IBT_SUCCESS);
}
/*
* tavor_ci_free_mw()
* Free a Memory Window
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid MW handle */
TAVOR_TNF_ERROR, "");
return (IBT_MW_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and MW handle */
/* Free the memory window */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_query_mw()
* Return the attributes of the specified Memory Window
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid MemWin handle */
TAVOR_TNF_ERROR, "");
return (IBT_MW_HDL_INVALID);
}
/* Query the memory window pointer and fill in the return values */
return (IBT_SUCCESS);
}
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid PD handle pointer */
return (IBT_PD_HDL_INVALID);
}
/*
* Validate the access flags. Both Remote Write and Remote Atomic
* require the Local Write flag to be set
*/
return (IBT_MR_ACCESS_REQ_INVALID);
}
/* Grab the Tavor softstate pointer and PD handle */
if (status != DDI_SUCCESS) {
return (status);
}
/* Fill in the mr_desc structure */
/* Only set RKey if remote access was requested */
}
/*
* If region is mapped for streaming (i.e. noncoherent), then set
* sync is required
*/
/* Return the Hermon MR handle */
return (IBT_SUCCESS);
}
/*
* tavor_ci_attach_mcg()
* Attach a Queue Pair to a Multicast Group
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid QP handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_QP_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and QP handles */
/* Attach the QP to the multicast group */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_detach_mcg()
* Detach a Queue Pair to a Multicast Group
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid QP handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_QP_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and QP handle */
/* Detach the QP from the multicast group */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_post_send()
* Post send work requests to the send queue on the specified QP
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid QP handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_QP_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and QP handle */
/* Post the send WQEs */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_post_recv()
* Post receive work requests to the receive queue on the specified QP
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid QP handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_QP_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and QP handle */
/* Post the receive WQEs */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_poll_cq()
* Poll for a work request completion
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid CQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_CQ_HDL_INVALID);
}
/* Check for valid num_wc field */
if (num_wc == 0) {
TAVOR_TNF_ERROR, "");
return (IBT_INVALID_PARAM);
}
/* Grab the Tavor softstate pointer and CQ handle */
/* Poll for work request completions */
/* First fill in "num_polled" argument (only when valid) */
if (num_polled) {
*num_polled = polled;
}
/*
* Check the status code;
* If empty, we return empty.
* If error, we print out an error and then return
* If success (something was polled), we return success
*/
if (status != DDI_SUCCESS) {
if (status != IBT_CQ_EMPTY) {
}
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_notify_cq()
* Enable notification events on the specified CQ
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid CQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_CQ_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and CQ handle */
/* Enable the CQ notification */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_ci_data_in()
* Exchange CI-specific data.
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/* Get the Tavor userland mapping information */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_ci_data_out()
* Exchange CI-specific data.
* Context: Can be called only from user or kernel context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Grab the Tavor softstate pointer */
/* Get the Tavor userland mapping information */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_alloc_srq()
* Allocate a Shared Receive Queue (SRQ)
* Context: Can be called only from user or kernel context
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check if SRQ is even supported */
TAVOR_TNF_ERROR, "");
return (IBT_NOT_SUPPORTED);
}
/* Check for valid PD handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_PD_HDL_INVALID);
}
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_free_srq()
* Free a Shared Receive Queue (SRQ)
* Context: Can be called only from user or kernel context
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check if SRQ is even supported */
TAVOR_TNF_ERROR, "");
return (IBT_NOT_SUPPORTED);
}
/* Check for valid SRQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_SRQ_HDL_INVALID);
}
/* Free the SRQ */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_query_srq()
* Query properties of a Shared Receive Queue (SRQ)
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check if SRQ is even supported */
TAVOR_TNF_ERROR, "");
return (IBT_NOT_SUPPORTED);
}
/* Check for valid SRQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_SRQ_HDL_INVALID);
}
TAVOR_TNF_ERROR, "");
return (IBT_SRQ_ERROR_STATE);
}
*limit_p = 0;
return (IBT_SUCCESS);
}
/*
* tavor_ci_modify_srq()
* Modify properties of a Shared Receive Queue (SRQ)
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check if SRQ is even supported */
TAVOR_TNF_ERROR, "");
return (IBT_NOT_SUPPORTED);
}
/* Check for valid SRQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_SRQ_HDL_INVALID);
}
/*
* Check Error State of SRQ.
* Also, while we are holding the lock we save away the current SRQ
* size for later use.
*/
TAVOR_TNF_ERROR, "");
return (IBT_SRQ_ERROR_STATE);
}
/*
* Setting the limit watermark is not currently supported. This is a
* tavor hardware (firmware) limitation. We return NOT_SUPPORTED here,
* and have the limit code commented out for now.
*
* XXX If we enable the limit watermark support, we need to do checks
* and set the 'srq->srq_wr_limit' here, instead of returning not
* supported. The 'tavor_srq_modify' operation below is for resizing
* the SRQ only, the limit work should be done here. If this is
* changed to use the 'limit' field, the 'ARGSUSED' comment for this
* function should also be removed at that time.
*/
if (flags & IBT_SRQ_SET_LIMIT) {
TAVOR_TNF_ERROR, "");
return (IBT_NOT_SUPPORTED);
}
/*
* Check the SET_SIZE flag. If not set, we simply return success here.
* However if it is set, we check if resize is supported and only then
* do we continue on with our resize processing.
*/
if (!(flags & IBT_SRQ_SET_SIZE)) {
return (IBT_SUCCESS);
}
TAVOR_TNF_ERROR, "");
return (IBT_NOT_SUPPORTED);
}
/*
* We do not support resizing an SRQ to be smaller than it's current
* size. If a smaller (or equal) size is requested, then we simply
* return success, and do nothing.
*/
if (size <= cur_srq_size) {
return (IBT_SUCCESS);
}
if (status != DDI_SUCCESS) {
/* Set return value to current SRQ size */
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_post_srq()
* Post a Work Request to the specified Shared Receive Queue (SRQ)
* Context: Can be called from interrupt or base context.
*/
static ibt_status_t
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check if SRQ is even supported */
TAVOR_TNF_ERROR, "");
return (IBT_NOT_SUPPORTED);
}
/* Check for valid SRQ handle pointer */
TAVOR_TNF_ERROR, "");
return (IBT_SRQ_HDL_INVALID);
}
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/* Address translation */
/*
* tavor_ci_map_mem_area()
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_unmap_mem_area()
* Unmap the memory area
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
struct ibc_mi_s {
int imh_len;
};
/*
* tavor_ci_map_mem_iov()
* Map the memory
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
int status;
int kmflag;
return (IBT_MI_HDL_INVALID);
/* Check for valid HCA handle */
return (IBT_HCA_HDL_INVALID);
/* Tavor does not allow the default "use reserved lkey" */
return (IBT_INVALID_PARAM);
#ifdef __sparc
#endif
nds = 0;
if (iov_attr->iov_lso_hdr_sz)
0xf) >> 4; /* 0xf is for rounding up to a multiple of 16 */
} else {
kmflag = KM_NOSLEEP;
}
return (IBT_INSUFF_RESOURCE);
if (status != DDI_SUCCESS) {
return (IBT_INSUFF_RESOURCE);
}
&dmacookie, &cookie_cnt);
if (status != DDI_DMA_MAPPED) {
return (ibc_get_ci_failure(0));
}
while (cookie_cnt-- > 0) {
return (IBT_SGL_TOO_SMALL);
}
nds++;
if (cookie_cnt != 0)
}
return (IBT_SUCCESS);
}
else
for (i = 0, j = 0; j < len; j++) {
continue;
i++;
}
return (IBT_INSUFF_RESOURCE);
for (i = 0, j = 0; j < len; j++) {
continue;
if (status != DDI_SUCCESS) {
goto fail2;
}
&dmacookie, &cookie_cnt);
if (status != DDI_DMA_MAPPED) {
ibt_status = ibc_get_ci_failure(0);
goto fail1;
}
goto fail2;
}
while (cookie_cnt-- > 0) {
nds++;
if (cookie_cnt != 0)
}
i++;
}
else
return (IBT_SUCCESS);
while (--i >= 0) {
}
return (ibt_status);
}
/*
* tavor_ci_unmap_mem_iov()
* Unmap the memory
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
int i;
/* Check for valid HCA handle */
return (IBT_HCA_HDL_INVALID);
return (IBT_MI_HDL_INVALID);
}
return (IBT_SUCCESS);
}
/* Allocate L_Key */
/*
* tavor_ci_alloc_lkey()
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/* Physical Register Memory Region */
/*
* tavor_ci_register_physical_mr()
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_reregister_physical_mr()
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/* Mellanox FMR Support */
/*
* tavor_ci_create_fmr_pool()
* Creates a pool of memory regions suitable for FMR registration
* Context: Can be called from base context only
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_destroy_fmr_pool()
* Free all resources associated with an FMR pool.
* Context: Can be called from base context only.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_flush_fmr_pool()
* Force a flush of the memory tables, cleaning up used FMR resources.
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_register_physical_fmr()
* From the 'pool' of FMR regions passed in, performs register physical
* operation.
* Context: Can be called from interrupt or base context.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_deregister_fmr()
* Moves an FMR (specified by 'mr') to the deregistered state.
* Context: Can be called from base context only.
*/
/* ARGSUSED */
static ibt_status_t
{
return (IBT_NOT_SUPPORTED);
}
/*
* tavor_ci_alloc_io_mem()
* Allocate dmable memory
*
*/
{
int status;
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid mem_alloc_hdl handle pointer */
if (mem_alloc_hdl == NULL) {
TAVOR_TNF_ERROR, "");
return (IBT_MEM_ALLOC_HDL_INVALID);
}
/* Grab the Tavor softstate pointer and mem handle */
/* Allocate the AH */
if (status != DDI_SUCCESS) {
return (status);
}
return (IBT_SUCCESS);
}
/*
* tavor_ci_free_io_mem()
* free the memory
*/
{
/* Check for valid HCA handle */
TAVOR_TNF_ERROR, "");
return (IBT_HCA_HDL_INVALID);
}
/* Check for valid mem_alloc_hdl handle pointer */
if (mem_alloc_hdl == NULL) {
TAVOR_TNF_ERROR, "");
return (IBT_MEM_ALLOC_HDL_INVALID);
}
/* free the memory */
return (IBT_SUCCESS);
}
int
{
int status;
/* Allocate a DMA handle */
if (status != DDI_SUCCESS) {
return (DDI_FAILURE);
}
/* Allocate DMA memory */
NULL,
if (status != DDI_SUCCESS) {
return (DDI_FAILURE);
}
/* Package the tavor_dma_info contents and return */
return (DDI_FAILURE);
}
return (DDI_SUCCESS);
}