9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This file and its contents are supplied under the terms of the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Common Development and Distribution License ("CDDL"), version 1.0.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * You may only use this file in accordance with the terms of version
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 1.0 of the CDDL.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * A full copy of the text of the CDDL should have accompanied this
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * source. A copy of the CDDL is also available via the Internet at
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Copyright 2016 Joyent, Inc.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e - Intel 10/40 Gb Ethernet driver
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * The i40e driver is the main software device driver for the Intel 40 Gb family
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * of devices. Note that these devices come in many flavors with both 40 GbE
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ports and 10 GbE ports. This device is the successor to the 82599 family of
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * devices (ixgbe).
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Unlike previous generations of Intel 1 GbE and 10 GbE devices, the 40 GbE
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * devices defined in the XL710 controller (previously known as Fortville) are a
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * rather different beast and have a small switch embedded inside of them. In
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * addition, the way that most of the programming is done has been overhauled.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * As opposed to just using PCIe memory mapped registers, it also has an
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * administrative queue which is used to communicate with firmware running on
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Each physical function in the hardware shows up as a device that this driver
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * will bind to. The hardware splits many resources evenly across all of the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * physical functions present on the device, while other resources are instead
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * shared across the entire card and its up to the device driver to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * intelligently partition them.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Organization
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This driver is made up of several files which have their own theory
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * statements spread across them. We'll touch on the high level purpose of each
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * file here, and then we'll get into more discussion on how the device is
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * generally modelled with respect to the interfaces in illumos.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_gld.c: This file contains all of the bindings to MAC and the networking
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_intr.c: This file contains all of the interrupt service routines and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * contains logic to enable and disable interrupts on the hardware.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * It also contains the logic to map hardware resources such as the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * rings to and from interrupts and controls their ability to fire.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * There is a big theory statement on interrupts present there.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_main.c: The file that you're currently in. It interfaces with the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * traditional OS DDI interfaces and is in charge of configuring
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the device.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_osdep.[ch]: These files contain interfaces and definitions needed to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * work with Intel's common code for the device.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_stats.c: This file contains the general work and logic around our
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * kstats. A theory statement on their organization and use of the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * hardware exists there.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_sw.h: This header file contains all of the primary structure definitions
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * and constants that are used across the entire driver.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_transceiver.c: This file contains all of the logic for sending and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * receiving data. It contains all of the ring and DMA
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * allocation logic, as well as, the actual interfaces to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * send and receive data.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * A big theory statement on ring management, descriptors,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * and how it ties into the OS is present there.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * --------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * General Design
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * --------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Before we go too far into the general way we've laid out data structures and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the like, it's worth taking some time to explain how the hardware is
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * organized. This organization informs a lot of how we do things at this time
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * in the driver.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Each physical device consists of a number of one or more ports, which are
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * considered physical functions in the PCI sense and thus each get enumerated
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * by the system, resulting in an instance being created and attached to. While
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * there are many resources that are unique to each physical function eg.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * instance of the device, there are many that are shared across all of them.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Several resources have an amount reserved for each Virtual Station Interface
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * (VSI) and then a static pool of resources, available for all functions on the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * The most important resource in hardware are its transmit and receive queue
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * pairs (i40e_trqpair_t). These should be thought of as rings in GLDv3
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * parlance. There are a set number of these on each device; however, they are
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * statically partitioned among all of the different physical functions.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 'Fortville' (the code name for this device family) is basically a switch. To
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * map MAC addresses and other things to queues, we end up having to create
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Virtual Station Interfaces (VSIs) and establish forwarding rules that direct
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * traffic to a queue. A VSI owns a collection of queues and has a series of
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * forwarding rules that point to it. One way to think of this is to treat it
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * like MAC does a VNIC. When MAC refers to a group, a collection of rings and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * classification resources, that is a VSI in i40e.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * The sets of VSIs is shared across the entire device, though there may be some
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * amount that are reserved to each PF. Because the GLDv3 does not let us change
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the number of groups dynamically, we instead statically divide this amount
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * evenly between all the functions that exist. In addition, we have the same
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * problem with the mac address forwarding rules. There are a static number that
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * exist shared across all the functions.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * To handle both of these resources, what we end up doing is going through and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * determining which functions belong to the same device. Nominally one might do
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * this by having a nexus driver; however, a prime requirement for a nexus
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * driver is identifying the various children and activating them. While it is
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * possible to get this information from NVRAM, we would end up duplicating a
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * lot of the PCI enumeration logic. Really, at the end of the day, the device
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * doesn't give us the traditional identification properties we want from a
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * nexus driver.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Instead, we rely on some properties that are guaranteed to be unique. While
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * it might be tempting to leverage the PBA or serial number of the device from
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * NVRAM, there is nothing that says that two devices can't be mis-programmed to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * have the same values in NVRAM. Instead, we uniquely identify a group of
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * functions based on their parent in the /devices tree, their PCI bus and PCI
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * function identifiers. Using either on their own may not be sufficient.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * For each unique PCI device that we encounter, we'll create a i40e_device_t.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * From there, because we don't have a good way to tell the GLDv3 about sharing
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * resources between everything, we'll end up just dividing the resources
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * evenly between all of the functions. Longer term, if we don't have to declare
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * to the GLDv3 that these resources are shared, then we'll maintain a pool and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * hae each PF allocate from the pool in the device, thus if only two of four
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ports are being used, for example, then all of the resources can still be
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * -------------------------------------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Transmit and Receive Queue Pair Allocations
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * -------------------------------------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * NVRAM ends up assigning each PF its own share of the transmit and receive LAN
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * queue pairs, we have no way of modifying it, only observing it. From there,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * it's up to us to map these queues to VSIs and VFs. Since we don't support any
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * VFs at this time, we only focus on assignments to VSIs.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * At the moment, we used a static mapping of transmit/receive queue pairs to a
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * given VSI (eg. rings to a group). Though in the fullness of time, we want to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * make this something which is fully dynamic and take advantage of documented,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * but not yet available functionality for adding filters based on VXLAN and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * other encapsulation technologies.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * -------------------------------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Broadcast, Multicast, and Promiscuous
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * -------------------------------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * As part of the GLDv3, we need to make sure that we can handle receiving
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * broadcast and multicast traffic. As well as enabling promiscuous mode when
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * requested. GLDv3 requires that all broadcast and multicast traffic be
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * retrieved by the default group, eg. the first one. This is the same thing as
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the default VSI.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * To receieve broadcast traffic, we enable it through the admin queue, rather
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * than use one of our filters for it. For multicast traffic, we reserve a
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * certain number of the hash filters and assign them to a given PF. When we
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * exceed those, we then switch to using promicuous mode for multicast traffic.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * More specifically, once we exceed the number of filters (indicated because
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the i40e_t`i40e_resources.ifr_nmcastfilt ==
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_t`i40e_resources.ifr_nmcastfilt_used), we then instead need to toggle
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * promiscuous mode. If promiscuous mode is toggled then we keep track of the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * number of MACs added to it by incrementing i40e_t`i40e_mcast_promisc_count.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * That will stay enabled until that count reaches zero indicating that we have
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * only added multicast addresses that we have a corresponding entry for.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Because MAC itself wants to toggle promiscuous mode, which includes both
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * unicast and multicast traffic, we go through and keep track of that
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ourselves. That is maintained through the use of the i40e_t`i40e_promisc_on
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * --------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * VSI Management
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * --------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * At this time, we currently only support a single MAC group, and thus a single
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * VSI. This VSI is considered the default VSI and should be the only one that
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * exists after a reset. Currently it is stored as the member
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_t`i40e_vsi_id. While this works for the moment and for an initial
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * driver, it's not sufficient for the longer-term path of the driver. Instead,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * we'll want to actually have a unique i40e_vsi_t structure which is used
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * everywhere. Note that this means that every place that uses the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_t`i40e_vsi_id will need to be refactored.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ----------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Structure Layout
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ----------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * The following images relates the core data structures together. The primary
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * structure in the system is the i40e_t. It itself contains multiple rings,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_trqpair_t's which contain the various transmit and receive data. The
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * receive data is stored outside of the i40e_trqpair_t and instead in the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_rx_data_t. The i40e_t has a corresponding i40e_device_t which keeps
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * track of per-physical device state. Finally, for every active descriptor,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * there is a corresponding control block, which is where the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_rx_control_block_t and the i40e_tx_control_block_t come from.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +-----------------------+ +-----------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | Global i40e_t list | | Global Device list |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_glist | | | i40e_dlist |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +-----------------------+ | +-----------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | +------------------------+ +-----------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | Device-wide Structure |----->| Device-wide Structure |--> ...
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | i40e_device_t | | i40e_device_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | | +-----------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | dev_info_t * ------+--> Parent in devices tree.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | uint_t ------+--> PCI bus number
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | uint_t ------+--> PCI device number
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | uint_t ------+--> Number of functions
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | i40e_switch_rsrcs_t ---+--> Captured total switch resources
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | list_t ------+-------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | +------------------------+ |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | +--------+ |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | +---------------------------+ | +-------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +->| GLDv3 Device, per PF |-----|-->| GLDv3 Device (PF) |--> ...
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_t | | | i40e_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | **Primary Structure** | | +-------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_device_t * --+-----+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_state_t --+---> Device State
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_hw_t --+---> Intel common code structure
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | mac_handle_t --+---> GLDv3 handle to MAC
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | ddi_periodic_t --+---> Link activity timer
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | int (vsi_id) --+---> VSI ID, main identifier
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_func_rsrc_t --+---> Available hardware resources
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_switch_rsrc_t * --+---> Switch resource snapshot
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_sdu --+---> Current MTU
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_frame_max --+---> Current HW frame size
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_uaddr_t * --+---> Array of assigned unicast MACs
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_maddr_t * --+---> Array of assigned multicast MACs
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_mcast_promisccount --+---> Active multicast state
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_promisc_on --+---> Current promiscuous mode state
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | int --+---> Number of transmit/receive pairs
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | kstat_t * --+---> PF kstats
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | kstat_t * --+---> VSI kstats
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_pf_stats_t --+---> PF kstat backing data
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_vsi_stats_t --+---> VSI kstat backing data
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_trqpair_t * --+---------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +---------------------------+ |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +-------------------------------+ +-----------------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | Transmit/Receive Queue Pair |-------| Transmit/Receive Queue Pair |->...
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_trqpair_t | | i40e_trqpair_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * + Ring Data Structure | +-----------------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | mac_ring_handle_t +--> MAC RX ring handle
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | mac_ring_handle_t +--> MAC TX ring handle
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_rxq_stat_t --+--> RX Queue stats
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_txq_stat_t --+--> TX Queue stats
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | uint32_t (tx ring size) +--> TX Ring Size
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | uint32_t (tx free list size) +--> TX Free List Size
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_dma_buffer_t --------+--> TX Descriptor ring DMA
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_tx_desc_t * --------+--> TX descriptor ring
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | volatile unt32_t * +--> TX Write back head
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | uint32_t -------+--> TX ring head
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | uint32_t -------+--> TX ring tail
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | uint32_t -------+--> Num TX desc free
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_tx_control_block_t * --+--> TX control block array ---+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_tx_control_block_t ** --+--> TCB work list ----+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_tx_control_block_t ** --+--> TCB free list ---+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | uint32_t -------+--> Free TCB count |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_rx_data_t * -------+--+ v
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +-------------------------------+ | +---------------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | Per-TX Frame Metadata |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | i40e_tx_control_block_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +--------------------+ | |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | mblk to transmit <--+--- mblk_t * |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | type of transmit <--+--- i40e_tx_type_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | TX DMA handle <--+--- ddi_dma_handle_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * v TX DMA buffer <--+--- i40e_dma_buffer_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +------------------------------+ +---------------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | Core Receive Data |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_rx_data_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_dma_buffer_t --+--> RX descriptor DMA Data
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_rx_desc_t --+--> RX descriptor ring
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | uint32_t --+--> Next free desc.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_rx_control_block_t * --+--> RX Control Block Array ---+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_rx_control_block_t ** --+--> RCB work list ---+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | i40e_rx_control_block_t ** --+--> RCB free list ---+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +------------------------------+ |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | +---------------------------+ |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | Per-RX Frame Metadata |<---------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | i40e_rx_control_block_t |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | mblk_t * ----+--> Received mblk_t data
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | uint32_t ----+--> Reference count
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | i40e_dma_buffer_t ----+--> Receive data DMA info
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * | | frtn_t ----+--> mblk free function info
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +-----+-- i40e_rx_data_t * |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * +---------------------------+
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * -------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Lock Ordering
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * -------------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * In order to ensure that we don't deadlock, the following represents the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * lock order being used. When grabbing locks, follow the following order. Lower
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * numbers are more important. Thus, the i40e_glock which is number 0, must be
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * taken before any other locks in the driver. On the other hand, the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_t`i40e_stat_lock, has the highest number because it's the least
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * important lock. Note, that just because one lock is higher than another does
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * not mean that all intermediary locks are required.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 0) i40e_glock
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 1) i40e_t`i40e_general_lock
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 2) i40e_trqpair_t`itrq_rx_lock
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 3) i40e_trqpair_t`itrq_tx_lock
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 4) i40e_t`i40e_rx_pending_lock
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 5) i40e_trqpair_t`itrq_tcb_lock
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 6) i40e_t`i40e_stat_lock
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Rules and expectations:
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 1) A thread holding locks belong to one PF should not hold locks belonging to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * a second. If for some reason this becomes necessary, locks should be grabbed
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * based on the list order in the i40e_device_t, which implies that the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_glock is held.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 2) When grabbing locks between multiple transmit and receive queues, the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * locks for the lowest number transmit/receive queue should be grabbed first.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 3) When grabbing both the transmit and receive lock for a given queue, always
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * grab i40e_trqpair_t`itrq_rx_lock before the i40e_trqpair_t`itrq_tx_lock.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 4) The following pairs of locks are not expected to be held at the same time:
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o i40e_t`i40e_rx_pending_lock and i40e_trqpair_t`itrq_tcb_lock
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * -----------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Future Work
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * -----------
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * At the moment the i40e_t driver is rather bare bones, allowing us to start
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * getting data flowing and folks using it while we develop additional features.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * While bugs have been filed to cover this future work, the following gives an
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * overview of expected work:
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o TSO support
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o RSS / multiple ring support
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o Multiple group support
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o DMA binding and breaking up the locking in ring recycling.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o Enhanced detection of device errors
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o Participation in IRM
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o FMA device reset
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o Stall detection, temperature error detection, etc.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o More dynamic resource pools
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistatic char i40e_ident[] = "Intel 10/40Gb Ethernet v1.0.0";
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * The i40e_glock primarily protects the lists below and the i40e_device_t
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * structures.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Access attributes for register mapping.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistatic ddi_device_acc_attr_t i40e_regs_acc_attr = {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Logging function for this driver.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_dev_err(i40e_t *i40e, int level, boolean_t console, const char *fmt,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) vsnprintf(buf, sizeof (buf), fmt, ap);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi cmn_err(level, (console) ? "%s: %s" : "!%s: %s",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi dev_err(i40e->i40e_dip, level, (console) ? "%s" : "!%s",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Because there's the stupid trailing-comma problem with the C preprocessor
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * and variable arguments, I need to instantiate these. Pardon the redundant
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/*PRINTFLIKE2*/
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_error(i40e_t *i40e, const char *fmt, ...)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_dev_err(i40e, CE_WARN, B_FALSE, fmt, ap);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/*PRINTFLIKE2*/
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_log(i40e_t *i40e, const char *fmt, ...)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_dev_err(i40e, CE_NOTE, B_FALSE, fmt, ap);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/*PRINTFLIKE2*/
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_notice(i40e_t *i40e, const char *fmt, ...)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_dev_err(i40e, CE_NOTE, B_TRUE, fmt, ap);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi kmem_free(idp->id_rsrcs, sizeof (i40e_switch_rsrc_t) *
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_device_find(i40e_t *i40e, dev_info_t *parent, uint_t bus, uint_t device)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (idp = list_head(&i40e_dlist); idp != NULL;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (idp->id_parent == parent && idp->id_pci_bus == bus &&
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * The Intel common code doesn't exactly keep the number of PCI
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * functions. But it calculates it during discovery of
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * partitions and ports. So what we do is undo the calculation
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * that it does originally, as functions are evenly spread
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * across ports in the rare case of partitions.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi idp = kmem_alloc(sizeof (i40e_device_t), KM_SLEEP);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi idp->id_nfuncs = hw->num_ports * hw->num_partitions;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi idp->id_rsrcs_alloc = i40e->i40e_switch_rsrc_alloc;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi idp->id_rsrcs_act = i40e->i40e_switch_rsrc_actual;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi idp->id_rsrcs = kmem_alloc(sizeof (i40e_switch_rsrc_t) *
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi bcopy(i40e->i40e_switch_rsrcs, idp->id_rsrcs,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi sizeof (i40e_switch_rsrc_t) * idp->id_rsrcs_alloc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi list_create(&idp->id_i40e_list, sizeof (i40e_t),
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi list_insert_tail(&idp->id_i40e_list, i40e);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_link_state_set(i40e_t *i40e, link_state_t state)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mac_link_update(i40e->i40e_mac_hdl, i40e->i40e_link_state);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This is a basic link check routine. Mostly we're using this just to see
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * if we can get any accurate information about the state of the link being
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * up or down, as well as updating the link state, speed, etc. information.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((ret = i40e_get_link_status(hw, &ls)) != I40E_SUCCESS) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Firmware abstracts all of the mac and phy information for us, so we
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * can use i40e_get_link_status to determine the current state.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Translate from an i40e value to a value in Mbits/s.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * At this time, hardware does not support half-duplex
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * operation, hence why we don't ask the hardware about our
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * current speed.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_link_state_set(i40e, LINK_STATE_DOWN);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_intr_count; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_free(i40e->i40e_intr_handles[i]);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "failed to free interrupt %d: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi kmem_free(i40e->i40e_intr_handles, i40e->i40e_intr_size);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_intr_count; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_remove_handler(i40e->i40e_intr_handles[i]);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "failed to remove interrupt %d: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * illumos Fault Management Architecture (FMA) support.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_check_acc_handle(ddi_acc_handle_t handle)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_acc_err_clear(handle, DDI_FME_VERSION);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_check_dma_handle(ddi_dma_handle_t handle)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Fault service error handling callback function.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* ARGSUSED */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_dip, DDI_PROP_DONTPASS, "fm_capable",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi } else if (i40e->i40e_fm_capabilities > 0xf) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_fm_capabilities = DDI_FM_EREPORT_CAPABLE |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Only register with IO Fault Services if we have some capability
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_fm_capabilities & DDI_FM_ACCCHK_CAPABLE) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_regs_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_regs_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_init(i40e->i40e_dip, &i40e->i40e_fm_capabilities, &iblk);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (DDI_FM_EREPORT_CAP(i40e->i40e_fm_capabilities) ||
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi DDI_FM_ERRCB_CAP(i40e->i40e_fm_capabilities)) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (DDI_FM_ERRCB_CAP(i40e->i40e_fm_capabilities)) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_fm_capabilities & DDI_FM_DMACHK_CAPABLE) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (DDI_FM_EREPORT_CAP(i40e->i40e_fm_capabilities) ||
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi DDI_FM_ERRCB_CAP(i40e->i40e_fm_capabilities))
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (DDI_FM_ERRCB_CAP(i40e->i40e_fm_capabilities))
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (DDI_FM_EREPORT_CAP(i40e->i40e_fm_capabilities)) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_ereport_post(i40e->i40e_dip, buf, ena, DDI_NOSLEEP,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERS0, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Here we're trying to get the ID of the default VSI. In general, when we come
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * through and look at this shortly after attach, we expect there to only be a
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * single element present, which is the default VSI. Importantly, each PF seems
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * to not see any other devices, in part because of the simple switch mode that
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * we're using. If for some reason, we see more artifact, we'll need to revisit
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * what we're doing here.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi struct i40e_aqc_get_switch_config_resp *sw_config;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* LINTED: E_BAD_PTR_CAST_ALIGN */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = i40e_aq_get_switch_config(hw, sw_config, sizeof (aq_buf), &next,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "i40e_aq_get_switch_config() failed %d: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (LE_16(sw_config->header.num_reported) != 1) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "encountered multiple (%d) switching units "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "during attach, not proceeding",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * We need to fill the i40e_hw_t structure with the capabilities of this PF. We
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * must also provide the memory for it; however, we don't need to keep it around
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * to the call to the common code. It takes it and parses it into an internal
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_get_hw_capabilities(i40e_t *i40e, i40e_hw_t *hw)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi struct i40e_aqc_list_capabilities_element_resp *buf;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = i40e_aq_discover_capabilities(hw, buf, len,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi &needed, i40e_aqc_opc_list_func_capabilities, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (hw->aq.asq_last_status == I40E_AQ_RC_ENOMEM &&
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Capability discovery failed "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "due to byzantine common code");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Capability discovery failed: %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Obtain the switch's capabilities as seen by this PF and keep it around for
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * our later use.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ret = i40e_aq_get_switch_resource_alloc(hw, &act, buf,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi hw->aq.asq_last_status == I40E_AQ_RC_EINVAL) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "failed to retrieve switch statistics: %d", ret);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi kmem_free(i40e->i40e_uaddrs, sizeof (i40e_uaddr_t) *
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi kmem_free(i40e->i40e_maddrs, sizeof (i40e_maddr_t) *
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, i40e->i40e_dip, 0, "reg",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_get_switch_resources(i40e) == B_FALSE) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * To calculate the total amount of a resource we have available, we
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * need to add how many our i40e_t thinks it has guaranteed, if any, and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * then we need to go through and divide the number of available on the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * device, which was snapshotted before anyone should have allocated
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * anything, and use that to derive how many are available from the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * pool. Longer term, we may want to turn this into something that's
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * more of a pool-like resource that everything can share (though that
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * may require some more assistance from MAC).
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Though for transmit and receive queue pairs, we just have to ask
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * firmware instead.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi idp = i40e_device_find(i40e, parent, bus, device);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_resources.ifr_nmacfilt_used = 0;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_resources.ifr_nmcastfilt_used = 0;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_switch_rsrc_actual; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_switch_rsrc_t *srp = &i40e->i40e_switch_rsrcs[i];
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_resources.ifr_nvsis_used = LE_16(srp->used);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_switch_rsrc_t *srp = &i40e->i40e_switch_rsrcs[i];
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi LE_16(srp->total_unalloced) / idp->id_nfuncs;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi LE_16(srp->total_unalloced) / idp->id_nfuncs;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi LE_16(srp->total_unalloced) / idp->id_nfuncs;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_resources.ifr_nrx_queue = hw->func_caps.num_rx_qp;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_resources.ifr_ntx_queue = hw->func_caps.num_tx_qp;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_uaddrs = kmem_zalloc(sizeof (i40e_uaddr_t) *
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_resources.ifr_nmacfilt, KM_SLEEP);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_maddrs = kmem_zalloc(sizeof (i40e_maddr_t) *
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_resources.ifr_nmcastfilt, KM_SLEEP);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Initialize these as multicast addresses to indicate it's invalid for
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * sanity purposes. Think of it like 0xdeadbeef.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_resources.ifr_nmacfilt; i++)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_intr_cap & DDI_INTR_FLAG_BLOCK) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_block_enable(i40e->i40e_intr_handles,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Interrupt block-enable failed: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_intr_count; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_enable(i40e->i40e_intr_handles[i]);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "Failed to enable interrupt %d: %d", i, rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi while (--i >= 0) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_intr_cap & DDI_INTR_FLAG_BLOCK) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_block_disable(i40e->i40e_intr_handles,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "Interrupt block-disabled failed: %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_intr_count; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_disable(i40e->i40e_intr_handles[i]);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "Failed to disable interrupt %d: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Free receive & transmit rings.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Should have already been cleaned up by start/stop,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi sizeof (i40e_trqpair_t) * i40e->i40e_num_trqpairs);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_destroy(&i40e->i40e_rx_pending_lock);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Allocate transmit and receive rings, as well as other data structures that we
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi void *mutexpri = DDI_INTR_PRI(i40e->i40e_intr_pri);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Now that we have the priority for the interrupts, initialize
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * all relevant locks.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_init(&i40e->i40e_general_lock, NULL, MUTEX_DRIVER, mutexpri);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_init(&i40e->i40e_rx_pending_lock, NULL, MUTEX_DRIVER, mutexpri);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi cv_init(&i40e->i40e_rx_pending_cv, NULL, CV_DRIVER, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_trqpairs = kmem_zalloc(sizeof (i40e_trqpair_t) *
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_trqpair_t *itrq = &i40e->i40e_trqpairs[i];
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_init(&itrq->itrq_rx_lock, NULL, MUTEX_DRIVER, mutexpri);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_init(&itrq->itrq_tx_lock, NULL, MUTEX_DRIVER, mutexpri);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_init(&itrq->itrq_tcb_lock, NULL, MUTEX_DRIVER, mutexpri);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Unless a .conf file already overrode i40e_t structure values, they will
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * be 0, and need to be set in conjunction with the now-available HW report.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * However, at the moment, we cap all of these resources as we only support a
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * single receive ring and a single group.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* ARGSUSED */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_hw_to_instance(i40e_t *i40e, i40e_hw_t *hw)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_num_trqpairs = I40E_TRQPAIR_MAX;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Free any resources required by, or setup by, the Intel common code.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to shutdown LAN hmc: %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to shutdown admin queue: %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Initialize and call Intel common-code routines, includes some setup
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the common code expects from the driver. Also prints on failure, so
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the caller doesn't have to.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_common_code_init(i40e_t *i40e, i40e_hw_t *hw)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to reset hardware: %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_fm_ereport(i40e, DDI_FM_DEVICE_NO_RESPONSE);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to initialize i40e core: %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi hw->aq.num_arq_entries = I40E_DEF_ADMINQ_SIZE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi hw->aq.num_asq_entries = I40E_DEF_ADMINQ_SIZE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to initialize firmware admin queue: "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "%d, potential firmware version mismatch", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_fm_ereport(i40e, DDI_FM_DEVICE_INVAL_STATE);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_notice(i40e, "The driver for the device detected a newer "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "version of the NVM image (%d.%d) than expected (%d.%d).\n"
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "Please install the most recent version of the network "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "driver.\n", hw->aq.api_maj_ver, hw->aq.api_min_ver,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi } else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_notice(i40e, "The driver for the device detected an older"
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi " version of the NVM image (%d.%d) than expected (%d.%d)."
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "\nPlease update the NVM image.\n",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR - 1);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * We need to call this so that the common code can discover
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * capabilities of the hardware, which it uses throughout the rest.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to obtain hardware capabilities");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_get_available_resources(i40e) == B_FALSE) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to obtain hardware resources");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to initialize hardware memory cache: "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to configure hardware memory cache: "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to retrieve hardware mac address: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to validate internal mac address: "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi bcopy(hw->mac.addr, hw->mac.perm_addr, ETHERADDRL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((rc = i40e_get_port_mac_addr(hw, hw->mac.port_addr)) !=
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to retrieve port mac address: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * We need to obtain the Virtual Station ID (VSI) before we can
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * perform other operations on the device.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to obtain VSI ID");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_unconfigure(dev_info_t *devinfo, i40e_t *i40e)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_ENABLE_INTR)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((i40e->i40e_attach_progress & I40E_ATTACH_LINK_TIMER) &&
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_periodic_delete(i40e->i40e_periodic_id);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_MAC) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to unregister from mac: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_STATS) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_ADD_INTR)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_ALLOC_RINGSLOCKS)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_ALLOC_INTR)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_COMMON_CODE)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_PROPS)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_REGS_MAP &&
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_osdep_space.ios_reg_handle != NULL) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_regs_map_free(&i40e->i40e_osdep_space.ios_reg_handle);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_osdep_space.ios_reg_handle = NULL;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((i40e->i40e_attach_progress & I40E_ATTACH_PCI_CONFIG) &&
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_osdep_space.ios_cfg_handle != NULL) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi pci_config_teardown(&i40e->i40e_osdep_space.ios_cfg_handle);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_osdep_space.ios_cfg_handle = NULL;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_FM_INIT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi kmem_free(i40e->i40e_aqbuf, I40E_ADMINQ_BUFSZ);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi irc = i40e_read_pba_string(hw, pbanum, sizeof (pbanum));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "failed to read PBA string: %d", irc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) ddi_prop_update_string(DDI_DEV_T_NONE, i40e->i40e_dip,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ASSERT(snprintf(NULL, 0, "%d.%d", hw->aq.fw_maj_ver,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ASSERT(snprintf(NULL, 0, "%x", hw->aq.fw_build) < sizeof (buf));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ASSERT(snprintf(NULL, 0, "%d.%d", hw->aq.api_maj_ver,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) snprintf(buf, sizeof (buf), "%d.%d", hw->aq.fw_maj_ver,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) ddi_prop_update_string(DDI_DEV_T_NONE, i40e->i40e_dip,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) snprintf(buf, sizeof (buf), "%x", hw->aq.fw_build);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) ddi_prop_update_string(DDI_DEV_T_NONE, i40e->i40e_dip,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) snprintf(buf, sizeof (buf), "%d.%d", hw->aq.api_maj_ver,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) ddi_prop_update_string(DDI_DEV_T_NONE, i40e->i40e_dip,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_check_acc_handle(osdep->ios_reg_handle) != DDI_FM_OK) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi struct i40e_osdep *osdep = &i40e->i40e_osdep_space;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi hw->vendor_id = pci_config_get16(osdep->ios_cfg_handle, PCI_CONF_VENID);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi hw->device_id = pci_config_get16(osdep->ios_cfg_handle, PCI_CONF_DEVID);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi hw->revision_id = pci_config_get8(osdep->ios_cfg_handle,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi pci_config_get16(osdep->ios_cfg_handle, PCI_CONF_SUBSYSID);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi pci_config_get16(osdep->ios_cfg_handle, PCI_CONF_SUBVENID);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Note that we set the hardware's bus information later on, in
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_get_available_resources(). The common code doesn't seem to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * require that it be set in any ways, it seems to be mostly for
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * book-keeping.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* Call common code to set the MAC type for this adapter. */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi struct i40e_osdep *osdep = &i40e->i40e_osdep_space;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (ddi_dev_regsize(devinfo, I40E_ADAPTER_REGSET, &memsize) !=
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Used invalid register set to map PCIe regs");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((ret = ddi_regs_map_setup(devinfo, I40E_ADAPTER_REGSET,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (caddr_t *)&hw->hw_addr, 0, memsize, &i40e_regs_acc_attr,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to map device registers: %d", ret);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Update parameters required when a new MTU has been configured. Calculate the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * maximum frame size, as well as, size our DMA buffers which we size in
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * increments of 1K.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi sizeof (struct ether_vlan_header) + ETHERFCSL;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rx = i40e->i40e_frame_max + I40E_BUF_IPHDR_ALIGNMENT;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ((rx & (((uint32_t)1 << 10) -1)) > 0 ? 1 : 0)) << 10;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ((tx & (((uint32_t)1 << 10) -1)) > 0 ? 1 : 0)) << 10;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_get_prop(i40e_t *i40e, char *prop, int min, int max, int def)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi val = ddi_prop_get_int(DDI_DEV_T_ANY, i40e->i40e_dip, DDI_PROP_DONTPASS,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_sdu = i40e_get_prop(i40e, "default_mtu",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_intr_force = i40e_get_prop(i40e, "intr_force",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_INTR_NONE, I40E_INTR_LEGACY, I40E_INTR_NONE);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_mr_enable = i40e_get_prop(i40e, "mr_enable",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_tx_ring_size = i40e_get_prop(i40e, "tx_ring_size",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_MIN_TX_RING_SIZE, I40E_MAX_TX_RING_SIZE,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((i40e->i40e_tx_ring_size % I40E_DESC_ALIGN) != 0) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_tx_ring_size = P2ROUNDUP(i40e->i40e_tx_ring_size,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_tx_block_thresh = i40e_get_prop(i40e, "tx_resched_threshold",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_tx_ring_size - I40E_TX_MAX_COOKIE,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_rx_ring_size = i40e_get_prop(i40e, "rx_ring_size",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_MIN_RX_RING_SIZE, I40E_MAX_RX_RING_SIZE,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((i40e->i40e_rx_ring_size % I40E_DESC_ALIGN) != 0) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_rx_ring_size = P2ROUNDUP(i40e->i40e_rx_ring_size,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_rx_limit_per_intr = i40e_get_prop(i40e, "rx_limit_per_intr",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_MIN_RX_LIMIT_PER_INTR, I40E_MAX_RX_LIMIT_PER_INTR,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_tx_hcksum_enable = i40e_get_prop(i40e, "tx_hcksum_enable",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_rx_hcksum_enable = i40e_get_prop(i40e, "rx_hcksum_enable",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_rx_dma_min = i40e_get_prop(i40e, "rx_dma_threshold",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_MIN_RX_DMA_THRESH, I40E_MAX_RX_DMA_THRESH,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_tx_dma_min = i40e_get_prop(i40e, "tx_dma_threshold",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_MIN_TX_DMA_THRESH, I40E_MAX_TX_DMA_THRESH,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_tx_itr = i40e_get_prop(i40e, "tx_intr_throttle",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_MIN_ITR, I40E_MAX_ITR, I40E_DEF_TX_ITR);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_rx_itr = i40e_get_prop(i40e, "rx_intr_throttle",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_MIN_ITR, I40E_MAX_ITR, I40E_DEF_RX_ITR);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_other_itr = i40e_get_prop(i40e, "other_intr_throttle",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_MIN_ITR, I40E_MAX_ITR, I40E_DEF_OTHER_ITR);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_num_trqpairs = I40E_TRQPAIR_NOMSIX;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_num_rx_groups = I40E_GROUP_NOMSIX;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * There are a few constraints on interrupts that we're currently imposing, some
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * of which are restrictions from hardware. For a fuller treatment, see
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Currently, to use MSI-X we require two interrupts be available though in
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * theory we should participate in IRM and happily use more interrupts.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Hardware only supports a single MSI being programmed and therefore if we
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * don't have MSI-X interrupts available at this time, then we ratchet down the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * number of rings and groups available. Obviously, we only bother with a single
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * fixed interrupt.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_alloc_intr_handles(i40e_t *i40e, dev_info_t *devinfo, int intr_type)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * At the moment, we always request two MSI-X while we still
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * only support a single interrupt. The upper bound on what's
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * supported by a given device is defined by MSI_X_PF_N in
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * GLPCI_CNF2. When we evolve, we should read it to determine
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * what the real max is.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi panic("bad interrupt type passed to i40e_alloc_intr_handles: "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_get_nintrs(devinfo, intr_type, &count);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "Get interrupt number failed, "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_get_navail(devinfo, intr_type, &count);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "Get AVAILABLE interrupt number failed, "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_intr_size = request * sizeof (ddi_intr_handle_t);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_intr_handles = kmem_alloc(i40e->i40e_intr_size, KM_SLEEP);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_alloc(devinfo, i40e->i40e_intr_handles, intr_type, 0,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi min(request, count), &actual, DDI_INTR_ALLOC_NORMAL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "Interrupt allocation failed with %d.", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "actual (%d) is less than minimum (%d).",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Record the priority and capabilities for our first vector. Once
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * we have it, that's our priority until detach time. Even if we
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * eventually participate in IRM, our priority shouldn't change.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_get_pri(i40e->i40e_intr_handles[0], &i40e->i40e_intr_pri);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "Getting interrupt priority failed with %d.", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_get_cap(i40e->i40e_intr_handles[0], &i40e->i40e_intr_cap);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "Getting interrupt capabilities failed with %d.", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_alloc_intrs(i40e_t *i40e, dev_info_t *devinfo)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_get_supported_types(devinfo, &intr_types);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to get supported interrupt types: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_alloc_intr_handles(i40e, devinfo, DDI_INTR_TYPE_MSIX))
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * We only use multiple transmit/receive pairs when MSI-X interrupts are
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * available due to the fact that the device basically only supports a
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * single MSI interrupt.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_num_trqpairs = I40E_TRQPAIR_NOMSIX;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_num_rx_groups = I40E_GROUP_NOMSIX;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (i40e->i40e_intr_force <= I40E_INTR_MSI)) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_alloc_intr_handles(i40e, devinfo, DDI_INTR_TYPE_MSI))
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_alloc_intr_handles(i40e, devinfo, DDI_INTR_TYPE_FIXED))
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Map different interrupts to MSI-X vectors.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_intr_type != DDI_INTR_TYPE_MSIX) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * At the moment, we only have one queue and one interrupt thus both are
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * on that one interrupt. However, longer term we need to go back to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * using the ixgbe style map of queues to vectors or walk the linked
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * list from the device to know what to go handle. Therefore for the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * moment, since we need to map our single set of rings to the one
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * I/O interrupt that exists for MSI-X.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_trqpairs[0].itrq_rx_intrvec = 1;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_trqpairs[0].itrq_tx_intrvec = 1;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (vector = 0; vector < i40e->i40e_intr_count; vector++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (ddi_intr_handler_t *)i40e_intr_msix, i40e,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "Add interrupt handler (MSI-X) "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "failed: return %d, vector %d", rc, vector);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_add_handler(i40e->i40e_intr_handles[0],
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (ddi_intr_handler_t *)i40e_intr_msi, i40e, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "Add interrupt handler (MSI) failed: "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = ddi_intr_add_handler(i40e->i40e_intr_handles[0],
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (ddi_intr_handler_t *)i40e_intr_legacy, i40e, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "Add interrupt handler (legacy) failed:"
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* Cast to pacify lint */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi panic("i40e_intr_type %p contains an unknown type: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Perform periodic checks. Longer term, we should be thinking about additional
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * things here:
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o Stall Detection
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o Temperature sensor detection
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o Device resetting
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * o Statistics updating to avoid wraparound
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Get the hardware state, and scribble away anything that needs scribbling.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_get_hw_state(i40e_t *i40e, i40e_hw_t *hw)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi (void) i40e_aq_get_link_info(hw, TRUE, NULL, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Try and determine our PHY. Note that we may have to retry to and
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * delay to detect fiber correctly.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = i40e_aq_get_phy_capabilities(hw, B_FALSE, B_TRUE, &i40e->i40e_phy,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = i40e_aq_get_phy_capabilities(hw, B_FALSE, B_TRUE,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "encountered unknown PHY type, "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "not attaching.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "error getting physical capabilities: "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to update link information: %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * In general, we don't want to mask off (as in stop from being a cause)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * any of the interrupts that the phy might be able to generate.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rc = i40e_aq_set_phy_int_mask(hw, 0, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to update phy link mask: %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Go through and re-initialize any existing filters that we may have set up for
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * this device. Note that we would only expect them to exist if hardware had
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * already been initialized and we had just reset it. While we're not
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * implementing this yet, we're keeping this around for when we add reset
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * capabilities, so this isn't forgotten.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* ARGSUSED */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_init_macaddrs(i40e_t *i40e, i40e_hw_t *hw)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Configure the hardware for the Virtual Station Interface (VSI). Currently
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * we only support one, but in the future we could instantiate more than one
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * per attach-point.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_config_vsi(i40e_t *i40e, i40e_hw_t *hw)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi bzero(&context, sizeof (struct i40e_vsi_context));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_aq_get_vsi_params(hw, &context, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "get VSI params failed with %d", err);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Set the queue and traffic class bits. Keep it simple for now.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi context.info.valid_sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi context.info.mapping_flags = I40E_AQ_VSI_QUE_MAP_CONTIG;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi context.info.queue_mapping[0] = I40E_ASSIGN_ALL_QUEUES;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi context.info.tc_mapping[0] = I40E_TRAFFIC_CLASS_NO_QUEUES;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi context.info.valid_sections |= I40E_AQ_VSI_PROP_VLAN_VALID;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi context.info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi context.flags = LE16_TO_CPU(I40E_AQ_VSI_TYPE_PF);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_vsi_stat_id = LE16_TO_CPU(context.info.stat_counter_idx);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_aq_update_vsi_params(hw, &context, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Update VSI params failed with %d", err);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Wrapper to kick the chipset on.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi struct i40e_filter_control_settings filter;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver < 33)) ||
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_aq_set_link_restart_an(hw, TRUE, NULL) !=
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to restart link: admin queue "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* Determine hardware state */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* Initialize mac addresses. */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Set up the filter control.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "i40e_set_filter_control() returned %d", rc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Take care of tearing down the rx ring. See 8.3.3.1.2 for more information.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 1. The interrupt linked list (see i40e_intr.c for more
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * information) should have already been cleared before calling this
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_intr_type == DDI_INTR_TYPE_MSIX) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 1; i < i40e->i40e_intr_count; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi reg = I40E_READ_REG(hw, I40E_PFINT_LNKLSTN(i - 1));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi reg = I40E_READ_REG(hw, I40E_PFINT_LNKLST0);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#endif /* DEBUG */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 1. Request the queue by clearing QENA_REQ. It may not be
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * set due to unwinding from failures and a partially enabled
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi VERIFY((reg & I40E_QRX_ENA_QENA_REQ_MASK) ==
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 2. Wait for the disable to take, by having QENA_STAT in the FPM
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * be cleared. Note that we could still receive data in the queue during
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * this time. We don't actually wait for this now and instead defer this
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * to i40e_shutdown_rings_wait(), after we've interleaved disabling the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * TX queues as well.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 1. The interrupt linked list should already have been cleared.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e->i40e_intr_type == DDI_INTR_TYPE_MSIX) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 1; i < i40e->i40e_intr_count; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi reg = I40E_READ_REG(hw, I40E_PFINT_LNKLSTN(i - 1));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi reg = I40E_READ_REG(hw, I40E_PFINT_LNKLST0);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#endif /* DEBUG */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 2. Set the SET_QDIS flag for every queue.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 3. Wait at least 400 usec (can be done once for all queues).
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 4. Clear the QENA_REQ flag which tells hardware to
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * quiesce. If QENA_REQ is not already set then that means that
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * we likely already tried to disable this queue.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 5. Wait for all drains to finish. This will be done by the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * hardware removing the QENA_STAT flag from the queue. Rather than
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * waiting here, we interleave it with all the others in
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e_shutdown_rings_wait().
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Wait for all the rings to be shut down. e.g. Steps 2 and 5 from the above
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (try = 0; try < I40E_RING_WAIT_NTRIES; try++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((reg & I40E_QRX_ENA_QENA_STAT_MASK) == 0)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((reg & I40E_QRX_ENA_QENA_STAT_MASK) != 0) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "timed out disabling rx queue %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (try = 0; try < I40E_RING_WAIT_NTRIES; try++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((reg & I40E_QTX_ENA_QENA_STAT_MASK) == 0)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((reg & I40E_QTX_ENA_QENA_STAT_MASK) != 0) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "timed out disabling tx queue %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi CPU_TO_LE64((uintptr_t)rcb->rcb_dma.dmab_dma_address);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi bzero(&rctx, sizeof (struct i40e_hmc_obj_rxq));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.base = rxd->rxd_desc_area.dmab_dma_address /
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi VERIFY(i40e->i40e_rx_buf_size >= I40E_HMC_RX_DBUFF_MIN);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi VERIFY(i40e->i40e_rx_buf_size <= I40E_HMC_RX_DBUFF_MAX);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.dbuff = i40e->i40e_rx_buf_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.hbuff = 0 >> I40E_RXQ_CTX_HBUFF_SHIFT;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.crcstrip = I40E_HMC_RX_CRCSTRIP_ENABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.hsplit_0 = I40E_HMC_RX_HDRSPLIT_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.hsplit_1 = I40E_HMC_RX_HDRSPLIT_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.showiv = I40E_HMC_RX_INVLAN_DONTSTRIP;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.tphrdesc_ena = I40E_HMC_RX_TPH_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.tphwdesc_ena = I40E_HMC_RX_TPH_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.tphdata_ena = I40E_HMC_RX_TPH_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.tphhead_ena = I40E_HMC_RX_TPH_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi rctx.lrxqthresh = I40E_HMC_RX_LOWRXQ_NOINTR;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This must be set to 0x1, see Table 8-12 in section 8.3.3.2.2.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_clear_lan_rx_queue_context(hw, itrq->itrq_index);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to clear rx queue %d context: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_set_lan_rx_queue_context(hw, itrq->itrq_index, &rctx);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to set rx queue %d context: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Take care of setting up the descriptor rings and actually programming the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * device. See 8.3.3.1.1 for the full list of steps we need to do to enable the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_trqpair_t *itrq = &i40e->i40e_trqpairs[i];
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 1. Program all receive ring descriptors.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 2. Program the queue's FPM/HMC context.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 3. Clear the queue's tail pointer and set it to the end
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * of the space.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_WRITE_REG(hw, I40E_QRX_TAIL(i), rxd->rxd_ring_size - 1);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 4. Enable the queue via the QENA_REQ.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi VERIFY0(reg & (I40E_QRX_ENA_QENA_REQ_MASK |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Note, we wait for every queue to be enabled before we start checking.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This will hopefully cause most queues to be enabled at this point.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 5. Verify that QENA_STAT has been set. It's promised
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * that this should occur within about 10 us, but like other
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * systems, we give the card a bit more time.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (j = 0; j < I40E_RING_WAIT_NTRIES; j++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((reg & I40E_QRX_ENA_QENA_STAT_MASK) == 0) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to enable rx queue %d, timed "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi bzero(&tctx, sizeof (struct i40e_hmc_obj_txq));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.new_context = I40E_HMC_TX_NEW_CONTEXT;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.base = itrq->itrq_desc_area.dmab_dma_address /
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.timesync_ena = I40E_HMC_TX_TS_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.alt_vlan_ena = I40E_HMC_TX_ALT_VLAN_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.tphrdesc_ena = I40E_HMC_TX_TPH_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.tphrpacket_ena = I40E_HMC_TX_TPH_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.tphwdesc_ena = I40E_HMC_TX_TPH_DISABLE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.head_wb_addr = itrq->itrq_desc_area.dmab_dma_address +
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi sizeof (i40e_tx_desc_t) * itrq->itrq_tx_ring_size;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This field isn't actually documented, like crc, but it suggests that
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * it should be zeroed. We leave both of these here because of that for
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * now. We should check with Intel on why these are here even.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * We're supposed to assign the rdylist field with the value of the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * traffic class index for the first device. We query the VSI parameters
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * again to get what the handle is. Note that every queue is always
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * assigned to traffic class zero, because we don't actually use them.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi bzero(&context, sizeof (struct i40e_vsi_context));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_aq_get_vsi_params(hw, &context, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "get VSI params failed with %d", err);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi tctx.rdylist = LE_16(context.info.qs_handle[0]);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_clear_lan_tx_queue_context(hw, itrq->itrq_index);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to clear tx queue %d context: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_set_lan_tx_queue_context(hw, itrq->itrq_index, &tctx);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to set tx queue %d context: %d",
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Take care of setting up the descriptor rings and actually programming the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * device. See 8.4.3.1.1 for what we need to do here.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_trqpair_t *itrq = &i40e->i40e_trqpairs[i];
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 1. Clear the queue disable flag and verify that the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * index is set correctly.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 2. Prepare the queue's FPM/HMC context.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 3. Verify that it's clear that this PF owns this queue.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi reg |= (hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_WRITE_REG(hw, I40E_QTX_CTL(itrq->itrq_index), reg);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 4. Set the QENA_REQ flag.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi VERIFY0(reg & (I40E_QTX_ENA_QENA_REQ_MASK |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Note, we wait for every queue to be enabled before we start checking.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This will hopefully cause most queues to be enabled at this point.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Step 5. Verify that QENA_STAT has been set. It's promised
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * that this should occur within about 10 us, but like BSD,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * we'll try for up to 100 ms for this queue.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (j = 0; j < I40E_RING_WAIT_NTRIES; j++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if ((reg & I40E_QTX_ENA_QENA_STAT_MASK) == 0) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to enable tx queue %d, timed "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_stop(i40e_t *i40e, boolean_t free_allocations)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Shutdown and drain the tx and rx pipeline. We do this using the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * following steps.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 1) Shutdown interrupts to all the queues (trying to keep the admin
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * queue alive).
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 2) Remove all of the interrupt tx and rx causes by setting the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * interrupt linked lists to zero.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 2) Shutdown the tx and rx rings. Because i40e_shutdown_rings() should
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * wait for all the queues to be disabled, once we reach that point
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * it should be safe to free associated data.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 4) Wait 50ms after all that is done. This ensures that the rings are
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ready for programming again and we don't have to think about this
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * in other parts of the driver.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 5) Disable remaining chip interrupts, (admin queue, etc.)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * 6) Verify that FM is happy with all the register accesses we
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_shutdown_rings(i40e) == B_FALSE) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_enter(&i40e->i40e_trqpairs[i].itrq_rx_lock);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_enter(&i40e->i40e_trqpairs[i].itrq_tx_lock);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * We should consider refactoring this to be part of the ring start /
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * stop routines at some point.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_stats_trqpair_fini(&i40e->i40e_trqpairs[i]);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_cfg_handle) !=
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_tx_cleanup_ring(&i40e->i40e_trqpairs[i]);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_exit(&i40e->i40e_trqpairs[i].itrq_rx_lock);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_exit(&i40e->i40e_trqpairs[i].itrq_tx_lock);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_link_state_set(i40e, LINK_STATE_UNKNOWN);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_alloc_ring_mem(i40e) == B_FALSE) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "Failed to allocate ring memory");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This should get refactored to be part of ring start and stop at
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * some point, along with most of the logic here.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (i = 0; i < i40e->i40e_num_trqpairs; i++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_stats_trqpair_init(&i40e->i40e_trqpairs[i]) ==
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi for (j = 0; j < i; j++) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_trqpair_t *itrq = &i40e->i40e_trqpairs[j];
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_fm_ereport(i40e, DDI_FM_DEVICE_INVAL_STATE);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_setup_rx_rings(i40e) == B_FALSE) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_setup_tx_rings(i40e) == B_FALSE) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Enable broadcast traffic; however, do not enable multicast traffic.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * That's handle exclusively through MAC's mc_multicst routines.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_aq_set_vsi_broadcast(hw, i40e->i40e_vsi_id, B_TRUE, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to set default VSI: %d", err);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi err = i40e_aq_set_mac_config(hw, i40e->i40e_frame_max, B_TRUE, 0, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "failed to set MAC config: %d", err);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Finally, make sure that we're happy from an FM perspective.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) !=
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* Clear state bits prior to final interrupt enabling. */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ~(I40E_ERROR | I40E_STALL | I40E_OVERTEMP));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * We may have loaned up descriptors to the stack. As such, if we still have
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * them outstanding, then we will not continue with detach.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (cv_reltimedwait(&i40e->i40e_rx_pending_cv,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi drv_usectohz(I40E_DRAIN_RX_WAIT), TR_CLOCK_TICK) == -1) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e = kmem_zalloc(sizeof (i40e_t), KM_SLEEP);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_aqbuf = kmem_zalloc(I40E_ADMINQ_BUFSZ, KM_SLEEP);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_FM_INIT;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (pci_config_setup(devinfo, &osdep->ios_cfg_handle) != DDI_SUCCESS) {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to map PCI configurations.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_PCI_CONFIG;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to identify hardware");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to map device registers.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_REGS_MAP;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_PROPS;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_COMMON_CODE;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * When we participate in IRM, we should make sure that we register
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * ourselves with it before callbacks.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to allocate interrupts.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_ALLOC_INTR;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi "Failed to allocate receive & transmit rings.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_ALLOC_RINGSLOCKS;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to map interrupts to vectors.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to add the interrupt handlers.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_ADD_INTR;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Final initialization failed.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_INIT;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_cfg_handle) !=
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Stats initialization failed.");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_STATS;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to register to MAC/GLDv3");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_MAC;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_periodic_id = ddi_periodic_add(i40e_timer, i40e,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to add the link-check timer");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_LINK_TIMER;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_error(i40e, "Failed to enable DDI interrupts");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_ENABLE_INTR;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi atomic_or_32(&i40e->i40e_state, I40E_INITIALIZED);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchii40e_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e = (i40e_t *)ddi_get_driver_private(devinfo);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(NULL, "i40e_detach() called with no i40e pointer!");
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_log(i40e, "timed out draining DMA resources, %d buffers "
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi 0, /* devo_refcnt */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ddi_quiesce_not_supported /* devo_quiesce */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistatic struct modlinkage i40e_modlinkage = {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Module Initialization Functions.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi list_create(&i40e_glist, sizeof (i40e_t), offsetof(i40e_t, i40e_glink));
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi list_create(&i40e_dlist, sizeof (i40e_device_t),
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mutex_init(&i40e_glock, NULL, MUTEX_DRIVER, NULL);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi mac_init_ops(&i40e_dev_ops, I40E_MODULE_NAME);