9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/******************************************************************************
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi Copyright (c) 2013-2015, Intel Corporation
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi All rights reserved.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi Redistribution and use in source and binary forms, with or without
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi modification, are permitted provided that the following conditions are met:
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi 1. Redistributions of source code must retain the above copyright notice,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi this list of conditions and the following disclaimer.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi 2. Redistributions in binary form must reproduce the above copyright
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi notice, this list of conditions and the following disclaimer in the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi documentation and/or other materials provided with the distribution.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi 3. Neither the name of the Intel Corporation nor the names of its
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi contributors may be used to endorse or promote products derived from
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi this software without specific prior written permission.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi POSSIBILITY OF SUCH DAMAGE.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi******************************************************************************/
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/*$FreeBSD: head/sys/dev/ixl/i40e_adminq_cmd.h 284049 2015-06-05 22:52:42Z jfv $*/
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* This header file defines the i40e Admin Queue commands and is shared between
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * i40e Firmware and Software.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * This file needs to comply with the Linux Kernel coding style.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Flags sub-structure
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * |DD |CMP|ERR|VFE| * * RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE |
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* command flags and offsets*/
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_DD (1 << I40E_AQ_FLAG_DD_SHIFT) /* 0x1 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_CMP (1 << I40E_AQ_FLAG_CMP_SHIFT) /* 0x2 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_ERR (1 << I40E_AQ_FLAG_ERR_SHIFT) /* 0x4 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_VFE (1 << I40E_AQ_FLAG_VFE_SHIFT) /* 0x8 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_LB (1 << I40E_AQ_FLAG_LB_SHIFT) /* 0x200 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_RD (1 << I40E_AQ_FLAG_RD_SHIFT) /* 0x400 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_VFC (1 << I40E_AQ_FLAG_VFC_SHIFT) /* 0x800 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_BUF (1 << I40E_AQ_FLAG_BUF_SHIFT) /* 0x1000 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_SI (1 << I40E_AQ_FLAG_SI_SHIFT) /* 0x2000 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_EI (1 << I40E_AQ_FLAG_EI_SHIFT) /* 0x4000 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_FLAG_FE (1 << I40E_AQ_FLAG_FE_SHIFT) /* 0x8000 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* error codes */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EPERM = 1, /* Operation not permitted */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_ENOENT = 2, /* No such element */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EINTR = 4, /* operation interrupted */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_ENXIO = 6, /* No such resource */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EACCES = 10, /* Permission denied */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EBUSY = 12, /* Device or resource busy */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EEXIST = 13, /* object already exists */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EINVAL = 14, /* Invalid argument */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_ENOTTY = 15, /* Not a typewriter */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_ENOSPC = 16, /* No space left or alloc failure */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_ENOSYS = 17, /* Function not implemented */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_ERANGE = 18, /* Parameter out of range */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EFLUSHED = 19, /* Cmd flushed due to prev cmd error */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_BAD_ADDR = 20, /* Descriptor contains a bad pointer */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EMODE = 21, /* Op not allowed in current dev mode */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQ_RC_EFBIG = 22, /* File too large */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Admin Queue command opcodes */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* aq commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* resource ownership */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_list_func_capabilities = 0x000A,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_list_dev_capabilities = 0x000B,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* internal switch commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_get_switch_resource_alloc = 0x0204,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_update_vsi_parameters = 0x0211,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_update_pv_parameters = 0x0221,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_update_veb_parameters = 0x0231,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_set_vsi_promiscuous_modes = 0x0254,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_remove_multicast_etag = 0x0258,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_add_control_packet_filter = 0x025A,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_remove_control_packet_filter = 0x025B,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_remove_cloud_filters = 0x025D,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* DCB commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* TX scheduler */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_configure_vsi_bw_limit = 0x0400,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_configure_vsi_ets_sla_bw_limit = 0x0406,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_query_vsi_ets_sla_config = 0x040A,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_configure_switching_comp_bw_limit = 0x0410,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_enable_switching_comp_ets = 0x0413,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_modify_switching_comp_ets = 0x0414,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_disable_switching_comp_ets = 0x0415,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_configure_switching_comp_ets_bw_limit = 0x0416,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_configure_switching_comp_bw_config = 0x0417,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_query_switching_comp_ets_config = 0x0418,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_query_port_ets_config = 0x0419,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_query_switching_comp_bw_config = 0x041A,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_configure_partition_bw = 0x041D,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_query_hmc_resource_profile = 0x0500,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_set_hmc_resource_profile = 0x0501,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* phy commands*/
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* NVM commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* virtualization commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* alternate structure */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_alternate_write_indirect = 0x0901,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_alternate_read_indirect = 0x0903,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_alternate_write_done = 0x0904,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_alternate_clear_port = 0x0906,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* LLDP commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_lldp_stop_start_spec_agent = 0x0A09,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* Tunnel commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* Async Events */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* OEM commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_oem_parameter_change = 0xFE00,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_oem_device_status_change = 0xFE01,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* debug commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi i40e_aqc_opc_debug_dump_internals = 0xFF08,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* command structures and indirect data structures */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Structure naming conventions:
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * - no suffix for direct command descriptor structures
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * - _data for indirect sent data
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * - _resp for indirect return data (data which is both will use _data)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * - _completion for direct return data
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * - _element_ for repeated elements (may also be _data or _resp)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Command structures are expected to overlay the params.raw member of the basic
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * descriptor, and as such cannot exceed 16 bytes in length.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* This macro is used to generate a compilation error if a structure
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * is not exactly the correct length. It gives a divide by zero error if the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * structure is not of the correct size, otherwise it creates an enum that is
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * never used.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_CHECK_STRUCT_LEN(n, X) enum i40e_static_assert_enum_##X \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi { i40e_static_assert_##X = (n)/((sizeof(struct X) == (n)) ? 1 : 0) }
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* This macro is used extensively to ensure that command structures are 16
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * bytes in length as they have to map to the raw array of that size.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_CHECK_CMD_LENGTH(X) I40E_CHECK_STRUCT_LEN(16, X)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* internal (0x00XX) commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get version (direct 0x0001) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_get_version);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Send driver version (indirect 0x0002) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_driver_version);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Queue Shutdown (direct 0x0003) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_queue_shutdown);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set PF context (0x0004, direct) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_set_pf_context);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Request resource ownership (direct 0x0008)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Release resource ownership (direct 0x0009)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_NVM_READ_TIMEOUT 3000
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_NVM_WRITE_TIMEOUT 180000
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_request_resource);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get function capabilities (indirect 0x000A)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Get device capabilities (indirect 0x000B)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_list_capabilites);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_list_capabilities_element_resp {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* list of caps */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_CAP_ID_FUNCTIONS_VALID 0x0005
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set CPPM Configuration (direct 0x0103) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_cppm_configuration);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set ARP Proxy command / response (indirect 0x0104) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x14, i40e_aqc_arp_proxy_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set NS Proxy Table Entry Command (indirect 0x0105) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_NS_PROXY_INIT_IPV6_TBL 0x0002
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_NS_PROXY_INIT_MAC_TBL 0x0004
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi u8 ipv6_addr_0[16]; /* Warning! spec specifies BE byte order */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x3c, i40e_aqc_ns_proxy_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Manage LAA Command (0x0106) - obsolete */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Manage MAC Address Read Command (indirect 0x0107) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_mac_address_read);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(24, i40e_aqc_mac_address_read_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Manage MAC Address Write Command (0x0108) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG 0xC000
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_mac_address_write);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* PXE commands (0x011x) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Clear PXE Command and response (direct 0x0110) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Switch configuration commands (0x02xx) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Used by many indirect commands that only pass an seid and a buffer in the
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_switch_seid);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get Switch Configuration command (indirect 0x0200)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses i40e_aqc_switch_seid for the descriptor
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_get_switch_config_header_resp {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_get_switch_config_header_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_switch_config_element_resp {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_config_element_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get Switch Configuration (indirect 0x0200)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * an array of elements are returned in the response buffer
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the first in the array is the header, remainder are elements
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi struct i40e_aqc_get_switch_config_header_resp header;
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi struct i40e_aqc_switch_config_element_resp element[1];
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_switch_config_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add Statistics (direct 0x0201)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Remove Statistics (direct 0x0202)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_statistics);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set Port Parameters command (direct 0x0203) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_P_PARAMS_SAVE_BAD_PACKETS 1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_P_PARAMS_PAD_SHORT_PACKETS 2 /* must set! */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_P_PARAMS_DOUBLE_VLAN_ENA 4
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 default_seid; /* reserved for command */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_set_port_parameters);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get Switch Resource Allocation (indirect 0x0204) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_get_switch_resource_alloc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* expect an array of these structs in the response buffer */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_switch_resource_alloc_element_resp {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_MULTICAST_HASH 0x5
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_UNICAST_HASH 0x6
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_VSI_LIST_ENTRY 0x8
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_ETAG_LIST_ENTRY 0x9
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_VLAN_STAT_POOL 0xA
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_MIRROR_RULE 0xB
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_QUEUE_SETS 0xC
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_VLAN_FILTERS 0xD
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_INNER_MAC_FILTERS 0xF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_IP_FILTERS 0x10
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_GRE_VN_KEYS 0x11
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_RESOURCE_TYPE_TUNNEL_PORTS 0x13
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_resource_alloc_element_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add VSI (indirect 0x0210)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * this indirect command uses struct i40e_aqc_vsi_properties_data
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * as the indirect buffer (128 bytes)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Update VSI (indirect 0x211)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses the same data structure as Add VSI
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Get VSI (indirect 0x0212)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses the same completion and data structure as Add VSI
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_TYPE_MASK (0x3 << I40E_AQ_VSI_TYPE_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_get_update_vsi);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_get_update_vsi_completion {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_get_update_vsi_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* first 96 byte are written by SW */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PROP_SWITCH_VALID 0x0001
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PROP_SECURITY_VALID 0x0002
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PROP_CAS_PV_VALID 0x0008
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PROP_INGRESS_UP_VALID 0x0010
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PROP_EGRESS_UP_VALID 0x0020
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PROP_QUEUE_MAP_VALID 0x0040
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PROP_QUEUE_OPT_VALID 0x0080
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PROP_OUTER_UP_VALID 0x0100
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* switch section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 switch_id; /* 12bit id combined with flags below */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_SW_ID_MASK (0xFFF << I40E_AQ_VSI_SW_ID_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_SW_ID_FLAG_NOT_STAG 0x1000
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB 0x2000
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB 0x4000
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* security section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD 0x01
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK 0x02
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK 0x04
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* VLAN section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 pvid; /* VLANS include priority bits */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PVLAN_MODE_MASK (0x03 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PVLAN_MODE_UNTAGGED 0x02
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_PVLAN_EMOD_MASK (0x3 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* ingress egress up sections */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le32 ingress_table; /* bitmap, 3 bits per up */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_UP_TABLE_UP0_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_UP_TABLE_UP1_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_UP_TABLE_UP2_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_UP_TABLE_UP3_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_UP_TABLE_UP4_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_UP_TABLE_UP5_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_UP_TABLE_UP6_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_UP_TABLE_UP7_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le32 egress_table; /* same defines as for ingress table */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* cascaded PV section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_CAS_PV_TAGX_MASK (0x03 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_CAS_PV_ACCEPT_HOST_TAG 0x40
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* queue mapping section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_QUEUE_MASK (0x7FF << I40E_AQ_VSI_QUEUE_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_TC_QUE_OFFSET_MASK (0x1FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_TC_QUE_NUMBER_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* queueing option section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA 0x04
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA 0x08
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI 0x40
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* scheduler section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* outer up section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le32 outer_up_table; /* same structure and defines as ingress table */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* last 32 bytes are written by FW */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_VSI_QS_HANDLE_INVALID 0xFFFF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(128, i40e_aqc_vsi_properties_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add Port Virtualizer (direct 0x0220)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * also used for update PV (direct 0x0221) but only flags are used
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * (IS_CTRL_PORT only works on add PV)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_PV_FLAG_FWD_UNKNOWN_STAG_EN 0x2
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_PV_FLAG_FWD_UNKNOWN_ETAG_EN 0x4
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_update_pv);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* reserved for update; for add also encodes error if rc == ENOSPC */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_update_pv_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get PV Params (direct 0x0222)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses i40e_aqc_switch_seid for the descriptor
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 pv_flags; /* same flags as add_pv */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_GET_PV_FRWD_UNKNOWN_STAG 0x2
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_GET_PV_FRWD_UNKNOWN_ETAG 0x4
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_get_pv_params_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add VEB (direct 0x0230) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_VEB_PORT_TYPE_MASK (0x3 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT 0x2
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_VEB_ENABLE_L2_FILTER 0x8
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* also encodes error if rc == ENOSPC; codes are the same as add_pv */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_VEB_ERR_FLAG_NO_COUNTER 0x4
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_veb_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get VEB Parameters (direct 0x0232)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses i40e_aqc_switch_seid for the descriptor
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_get_veb_parameters_completion {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 veb_flags; /* only the first/last flags from 0x0230 is valid */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_get_veb_parameters_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Delete Element (direct 0x0243)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses the generic i40e_aqc_switch_seid
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add MAC-VLAN (indirect 0x0250) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* used for the command for most vlan commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_CMD_SEID_NUM_SHIFT 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_CMD_SEID_NUM_MASK (0x3FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_CMD_SEID_VALID 0x8000
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* indirect data for command and response */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_ADD_PERFECT_MATCH 0x0001
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_ADD_HASH_MATCH 0x0002
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_ADD_IGNORE_VLAN 0x0004
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_ADD_TO_QUEUE 0x0008
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_CMD_QUEUE_MASK (0x7FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* response section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_remove_macvlan_completion {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_macvlan_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Remove MAC-VLAN (indirect 0x0251)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses i40e_aqc_macvlan for the descriptor
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * data points to an array of num_addresses of elements
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_remove_macvlan_element_data {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_DEL_PERFECT_MATCH 0x01
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_DEL_HASH_MATCH 0x02
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MACVLAN_DEL_IGNORE_VLAN 0x08
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* reply section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add VLAN (indirect 0x0252)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Remove VLAN (indirect 0x0253)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * use the generic i40e_aqc_macvlan for the command
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_remove_vlan_element_data {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* flags for add VLAN */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_PVLAN_TYPE_MASK (0x3 << I40E_AQC_ADD_PVLAN_TYPE_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_PVLAN_TYPE_SECONDARY 0x4
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_VLAN_PTYPE_MASK (0x3 << I40E_AQC_VLAN_PTYPE_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_VLAN_PTYPE_COMMUNITY_VSI 0x10
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_VLAN_PTYPE_ISOLATED_VSI 0x18
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* flags for remove VLAN */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* flags for add VLAN */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_VLAN_FAIL_RESOURCE 0xFF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* flags for remove VLAN */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_remove_vlan_completion {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set VSI Promiscuous Modes (direct 0x0254) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* flags used for both fields above */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_VSI_PROMISC_UNICAST 0x01
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_VSI_PROMISC_MULTICAST 0x02
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_VSI_PROMISC_BROADCAST 0x04
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_VSI_PROM_CMD_SEID_MASK 0x3FF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_set_vsi_promiscuous_modes);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add S/E-tag command (direct 0x0255)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Uses generic i40e_aqc_add_remove_tag_completion for completion
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_TAG_FLAG_TO_QUEUE 0x0001
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_TAG_CMD_SEID_NUM_SHIFT 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_TAG_CMD_SEID_NUM_MASK (0x3FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_tag_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Remove S/E-tag command (direct 0x0256)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Uses generic i40e_aqc_add_remove_tag_completion for completion
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_REMOVE_TAG_CMD_SEID_NUM_SHIFT 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_REMOVE_TAG_CMD_SEID_NUM_MASK (0x3FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add multicast E-Tag (direct 0x0257)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * del multicast E-Tag (direct 0x0258) only uses pv_seid and etag fields
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * and no external data
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le32 addr_high; /* address of array of 2-byte s-tags */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_mcast_etag);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_remove_mcast_etag_completion {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_mcast_etag_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Update S/E-Tag (direct 0x0259) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_UPDATE_TAG_CMD_SEID_NUM_SHIFT 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_UPDATE_TAG_CMD_SEID_NUM_MASK (0x3FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_update_tag_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add Control Packet filter (direct 0x025A)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Remove Control Packet filter (direct 0x025B)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses the i40e_aqc_add_oveb_cloud,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * and the generic direct completion structure
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_remove_control_packet_filter {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC 0x0001
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_DROP 0x0002
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TO_QUEUE 0x0004
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TX 0x0008
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_RX 0x0000
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CONTROL_PACKET_CMD_SEID_NUM_SHIFT 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CONTROL_PACKET_CMD_SEID_NUM_MASK (0x3FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_AQC_ADD_CONTROL_PACKET_CMD_SEID_NUM_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_control_packet_filter);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_remove_control_packet_filter_completion {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_control_packet_filter_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add Cloud filters (indirect 0x025C)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Remove Cloud filters (indirect 0x025D)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses the i40e_aqc_add_remove_cloud_filters,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * and the generic indirect completion structure
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_CMD_SEID_NUM_SHIFT 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_CMD_SEID_NUM_MASK (0x3FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_cloud_filters);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_remove_cloud_filters_element_data {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_MASK (0x3F << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* 0x0000 reserved */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_OIP 0x0001
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* 0x0002 reserved */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN 0x0003
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID 0x0004
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* 0x0005 reserved */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID 0x0006
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* 0x0007 reserved */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* 0x0008 reserved */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_OMAC 0x0009
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_IMAC 0x000A
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC 0x000B
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_IIP 0x000C
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FLAGS_TO_QUEUE 0x0080
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FLAGS_IPV6 0x0100
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK 0x1E00
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NVGRE_OMAC 1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_QUEUE_MASK (0x7FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* response section */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_ADD_CLOUD_FILTER_SUCCESS 0x0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_remove_cloud_filters_completion {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_remove_cloud_filters_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add Mirror Rule (indirect or direct 0x0260)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Delete Mirror Rule (indirect or direct 0x0261)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * note: some rule types (4,5) do not use an external buffer.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * take care to set the flags correctly.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MIRROR_RULE_TYPE_MASK (0x7 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MIRROR_RULE_TYPE_VPORT_INGRESS 1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MIRROR_RULE_TYPE_VPORT_EGRESS 2
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MIRROR_RULE_TYPE_ALL_INGRESS 4
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_MIRROR_RULE_TYPE_ALL_EGRESS 5
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 destination; /* VSI for add, rule id for delete */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le32 addr_high; /* address of array of 2-byte VSI or VLAN ids */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_delete_mirror_rule);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_add_delete_mirror_rule_completion {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_delete_mirror_rule_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* DCB 0x03xx*/
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* PFC Ignore (direct 0x0301)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * the command and response use the same descriptor structure
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* DCB Update (direct 0x0302) uses the i40e_aq_desc structure
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * with no parameters
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* TX scheduler 0x04xx */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Almost all the indirect commands use
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * this generic struct to pass the SEID in param0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_tx_sched_ind);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Several commands respond with a set of queue set handles */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Configure VSI BW limits (direct 0x0400) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_configure_vsi_bw_limit);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Configure VSI Bandwidth Limit per Traffic Type (indirect 0x0406)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * responds with i40e_aqc_qs_handles_resp
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_configure_vsi_ets_sla_bw_data {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 tc_bw_credits[8]; /* FW writesback QS handles here */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* 4 bits per tc 0-7, 4th bit is reserved, limit = 2^max */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_configure_vsi_ets_sla_bw_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Configure VSI Bandwidth Allocation per Traffic Type (indirect 0x0407)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * responds with i40e_aqc_qs_handles_resp
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_configure_vsi_tc_bw_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Query vsi bw configuration (indirect 0x0408) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_query_vsi_bw_config_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Query VSI Bandwidth Allocation per Traffic Type (indirect 0x040A) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_query_vsi_ets_sla_config_resp {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* 4 bits per tc 0-7, 4th bit is reserved, limit = 2^max */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_query_vsi_ets_sla_config_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Configure Switching Component Bandwidth Limit (direct 0x0410) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_configure_switching_comp_bw_limit {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_configure_switching_comp_bw_limit);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Enable Physical Port ETS (indirect 0x0413)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Modify Physical Port ETS (indirect 0x0414)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Disable Physical Port ETS (indirect 0x0415)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_configure_switching_comp_ets_data {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x80, i40e_aqc_configure_switching_comp_ets_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Configure Switching Component Bandwidth Limits per Tc (indirect 0x0416) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_configure_switching_comp_ets_bw_limit_data {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* 4 bits per tc 0-7, 4th bit is reserved, limit = 2^max */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_configure_switching_comp_ets_bw_limit_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Configure Switching Component Bandwidth Allocation per Tc
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * (indirect 0x0417)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_configure_switching_comp_bw_config_data {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_configure_switching_comp_bw_config_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Query Switching Component Configuration (indirect 0x0418) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_query_switching_comp_ets_config_resp {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_query_switching_comp_ets_config_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Query PhysicalPort ETS Configuration (indirect 0x0419) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_query_port_ets_config_resp {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* 4 bits per tc 0-7, 4th bit reserved, limit = 2^max */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x44, i40e_aqc_query_port_ets_config_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Query Switching Component Bandwidth Allocation per Traffic Type
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * (indirect 0x041A)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_query_switching_comp_bw_config_resp {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* 4 bits per tc 0-7, 4th bit is reserved, limit = 2^max */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_query_switching_comp_bw_config_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Suspend/resume port TX traffic
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * (direct 0x041B and 0x041C) uses the generic SEID struct
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Configure partition BW
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * (indirect 0x041D)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_configure_partition_bw_data {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x22, i40e_aqc_configure_partition_bw_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get and set the active HMC resource profile and status.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * (direct 0x0500) and (direct 0x0501)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aq_get_set_hmc_resource_profile {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aq_get_set_hmc_resource_profile);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi /* I40E_HMC_PROFILE_NO_CHANGE = 0, reserved */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_GET_HMC_RESOURCE_PROFILE_PM_MASK 0xF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_GET_HMC_RESOURCE_PROFILE_COUNT_MASK 0x3F
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get PHY Abilities (indirect 0x0600) uses the generic indirect struct */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* set in param0 for get phy abilities to report qualified modules */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_REPORT_QUALIFIED_MODULES 0x0001
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_REPORT_INITIAL_VALUES 0x0002
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_LINK_SPEED_100MB = (1 << I40E_LINK_SPEED_100MB_SHIFT),
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_LINK_SPEED_1GB = (1 << I40E_LINK_SPEED_1000MB_SHIFT),
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_LINK_SPEED_10GB = (1 << I40E_LINK_SPEED_10GB_SHIFT),
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_LINK_SPEED_40GB = (1 << I40E_LINK_SPEED_40GB_SHIFT),
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi I40E_LINK_SPEED_20GB = (1 << I40E_LINK_SPEED_20GB_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_module_desc);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le32 phy_type; /* bitmap using the above enum for offsets */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi u8 link_speed; /* bitmap using the above enum bit patterns */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi struct i40e_aqc_module_desc qualified_module[I40E_AQ_PHY_MAX_QMS];
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x218, i40e_aq_get_phy_abilities_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set PHY Config (direct 0x0601) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aq_set_phy_config { /* same bits as above in all */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* bits 0-2 use the values from get_phy_abilities_resp */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aq_set_phy_config);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set MAC Config command data structure (direct 0x0603) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_MASK 0x78
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_SHIFT 3
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_NONE 0x0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_1B_13TX 0xF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_1DW_9TX 0x9
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_1DW_4TX 0x8
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_3DW_7TX 0x7
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_2DW_3TX 0x6
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_1DW_1TX 0x5
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_3DW_2TX 0x4
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_7DW_3TX 0x3
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_4DW_1TX 0x2
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_SET_MAC_CONFIG_PACING_9DW_1TX 0x1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aq_set_mac_config);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Restart Auto-Negotiation (direct 0x605) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_set_link_restart_an);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get Link Status cmd & response data structure (direct 0x0607) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 command_flags; /* only field set on command */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* only response uses this flag */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_LINK_TX_MASK (0x03 << I40E_AQ_LINK_TX_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi u8 loopback; /* use defines from i40e_aqc_set_lb_mode */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_get_link_status);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set event mask command (direct 0x613) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_EVENT_EXCESSIVE_ERRORS 0x0020
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_EVENT_MODULE_QUAL_FAIL 0x0100
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_EVENT_PORT_TX_SUSPENDED 0x0200
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_set_phy_int_mask);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get Local AN advt register (direct 0x0614)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Set Local AN advt register (direct 0x0615)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Get Link Partner AN advt register (direct 0x0616)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_an_advt_reg);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set Loopback mode (0x0618) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_set_lb_mode);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set PHY Debug command (0x0622) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_DEBUG_RESET_INTERNAL 0x02
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_SHIFT 2
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_MASK (0x03 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_NONE 0x00
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_HARD 0x01
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_SOFT 0x02
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW 0x10
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_set_phy_debug);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* NVM Read command (indirect 0x0701)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * NVM Erase commands (direct 0x0702)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * NVM Update commands (indirect 0x0703)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* NVM Config Read (indirect 0x0704) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ANVM_SINGLE_OR_MULTIPLE_FEATURES_MASK 1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ANVM_READ_MULTIPLE_FEATURES 1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi __le16 element_id_msw; /* MSWord of field ID */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_config_read);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* NVM Config Write (indirect 0x0705) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_config_write);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Used for 0x0704 as well as for 0x0705 commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT 1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_MASK (1 << I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ANVM_IMMEDIATE_FIELD (1 << FEATURE_OR_IMMEDIATE_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ANVM_FEATURE_OPTION_OEM_ONLY 0x01
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ANVM_FEATURE_OPTION_DWORD_MAP 0x08
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ANVM_FEATURE_OPTION_POR_CSR 0x10
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x6, i40e_aqc_nvm_config_data_feature);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_nvm_config_data_immediate_field {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0xc, i40e_aqc_nvm_config_data_immediate_field);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* OEM Post Update (indirect 0x0720)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * no command data struct used
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_NVM_OEM_POST_UPDATE_EXTERNAL_DATA 0x01
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x8, i40e_aqc_nvm_oem_post_update);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_nvm_oem_post_update_buffer {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x28, i40e_aqc_nvm_oem_post_update_buffer);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Send to PF command (indirect 0x0801) id is only used by PF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Send to VF command (indirect 0x0802) id is only used by PF
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Send to Peer PF command (indirect 0x0803)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_pf_vf_message);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Alternate structure */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Direct write (direct 0x0900)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Direct read (direct 0x0902)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_alternate_write);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Indirect write (indirect 0x0901)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Indirect read (indirect 0x0903)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_alternate_ind_write);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Done alternate write (direct 0x0904)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses i40e_aq_desc
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_ALTERNATE_MODE_BIOS_LEGACY 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_alternate_write_done);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set OEM mode (direct 0x0905) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_alternate_set_mode);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Clear port Alternate RAM (direct 0x0906) uses i40e_aq_desc */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* async events 0x10xx */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Lan Queue Overflow Event (direct, 0x1001) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_lan_overflow);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get LLDP MIB (indirect 0x0A00) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_LLDP_MIB_LOCAL_AND_REMOTE 0x2
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE 0x0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_LLDP_BRIDGE_TYPE_NON_TPMR 0x1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQ_LLDP_TX_MASK (0x03 << I40E_AQ_LLDP_TX_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* TX pause flags use I40E_AQ_LINK_TX_* above */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_get_mib);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Configure LLDP MIB Change Event (direct 0x0A01)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * also used for the event (with type in the command field)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_update_mib);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add LLDP TLV (indirect 0x0A02)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Delete LLDP TLV (indirect 0x0A04)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_add_tlv);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Update LLDP TLV (indirect 0x0A03) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi u8 type; /* only nearest bridge and non-TPMR from 0x0A00 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_update_tlv);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Stop LLDP (direct 0x0A05) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Start LLDP (direct 0x0A06) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Get CEE DCBX Oper Config (0x0A07)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * uses the generic descriptor struct
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * returns below as indirect response
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_APP_FCOE_MASK (0x7 << I40E_AQC_CEE_APP_FCOE_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_APP_ISCSI_MASK (0x7 << I40E_AQC_CEE_APP_ISCSI_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_APP_FIP_MASK (0x7 << I40E_AQC_CEE_APP_FIP_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_PG_STATUS_MASK (0x7 << I40E_AQC_CEE_PG_STATUS_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_PFC_STATUS_MASK (0x7 << I40E_AQC_CEE_PFC_STATUS_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_APP_STATUS_MASK (0x7 << I40E_AQC_CEE_APP_STATUS_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_FCOE_STATUS_MASK (0x7 << I40E_AQC_CEE_FCOE_STATUS_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_ISCSI_STATUS_MASK (0x7 << I40E_AQC_CEE_ISCSI_STATUS_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_CEE_FIP_STATUS_MASK (0x7 << I40E_AQC_CEE_FIP_STATUS_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* struct i40e_aqc_get_cee_dcb_cfg_v1_resp was originally defined with
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * word boundary layout issues, which the Linux compilers silently deal
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * with by adding padding, making the actual struct larger than designed.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * However, the FW compiler for the NIC is less lenient and complains
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * about the struct. Hence, the struct defined here has an extra byte in
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * fields reserved3 and reserved4 to directly acknowledge that padding,
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * and the new length is used in the length check macro.
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x18, i40e_aqc_get_cee_dcb_cfg_v1_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_cee_dcb_cfg_resp);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Set Local LLDP MIB (indirect 0x0A08)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Used to replace the local MIB of a given LLDP agent. e.g. DCBx
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_set_local_mib);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Stop/Start LLDP Agent (direct 0x0A09)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Used for stopping/starting specific LLDP agent. e.g. DCBx
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchistruct i40e_aqc_lldp_stop_start_specific_agent {
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_START_SPECIFIC_AGENT_SHIFT 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_START_SPECIFIC_AGENT_MASK (1 << I40E_AQC_START_SPECIFIC_AGENT_SHIFT)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_stop_start_specific_agent);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Add Udp Tunnel command and completion (direct 0x0B00) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_udp_tunnel);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_add_udp_tunnel_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* remove UDP Tunnel command (0x0B01) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_remove_udp_tunnel);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_RSS_KEY_VSI_VALID (0x1 << 15)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_RSS_KEY_VSI_ID_MASK (0x3FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_key);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_STRUCT_LEN(0x34, i40e_aqc_get_set_rss_key_data);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_RSS_LUT_VSI_VALID (0x1 << 15)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_RSS_LUT_VSI_ID_MASK (0x3FF << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK (0x1 << \
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI 0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF 1
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_lut);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* tunnel key structure 0x0B10 */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_TUNNEL_KEY_STRUCT_OVERRIDE 0x01
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* response flags */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_TUNNEL_KEY_STRUCT_SUCCESS 0x01
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_TUNNEL_KEY_STRUCT_MODIFIED 0x02
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_TUNNEL_KEY_STRUCT_OVERRIDDEN 0x03
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_NETWORK_KEY_INDEX_VXLAN 0x0
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi#define I40E_AQC_NETWORK_KEY_INDEX_FLEX_MAC_IN_UDP 0x2
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_tunnel_key_structure);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* OEM mode commands (direct 0xFE0x) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_oem_param_change);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_oem_state_change);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Initialize OCSD (0xFE02, direct) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_opc_oem_ocsd_initialize);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Initialize OCBB (0xFE03, direct) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_opc_oem_ocbb_initialize);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* debug commands */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* get device id (0xFF00) uses the generic structure */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* set test more (0xFF01, internal) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_acq_set_test_mode);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Debug Read Register command (0xFF03)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Debug Write Register command (0xFF04)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_debug_reg_read_write);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Scatter/gather Reg Read (indirect 0xFF05)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi * Scatter/gather Reg Write (indirect 0xFF06)
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* i40e_aq_desc is used for the command */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* Debug Modify register (direct 0xFF07) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_debug_modify_reg);
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert Mustacchi/* dump internal data (0xFF08, indirect) */
9d26e4fc021e249c93c2861629cc665e4f5bd4d6Robert MustacchiI40E_CHECK_CMD_LENGTH(i40e_aqc_debug_dump_internals);