hxge_hw.c revision fe930412c257f961ae67039de3b164b83717976a
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#include <hxge_impl.h>
extern uint32_t hxge_jumbo_mtu;
extern boolean_t hxge_jumbo_enable;
void
{
(void) hxge_intr_hw_disable(hxgep);
(void) hxge_link_init(hxgep);
(void) hxge_vmac_init(hxgep);
(void) hxge_intr_hw_enable(hxgep);
}
void
{
/*
* Set up initial hardware parameters required such as mac mtu size.
*/
/* 1518 + 4 + 16 */
}
}
void
{
return;
}
return;
}
"hxge_hw_init_niu_common Started for device id %x",
hw_p->parent_devp));
(void) hxge_pfc_hw_reset(hxgep);
"hxge_hw_init_niu_common Done for device id %x",
hw_p->parent_devp));
}
{
/*
* DDI interface returns second arg as NULL
*/
}
"<== hxge_intr: not initialized 0x%x", serviced));
return (serviced);
}
}
if (ldvp) {
}
return (DDI_INTR_UNCLAIMED);
}
/*
* This interrupt handler will have to go through
* all the logical devices to find out which
* logical device interrupts us and then call
* its handler to process the events.
*/
/* Get this group's flag bits. */
if (rs) {
continue;
}
continue;
}
/*
* Call device's handler if flag bits are on.
*/
"==> hxge_intr: calling device %d"
(void) (t_ldvp->ldv_intr_handler)(
}
}
}
/* rearm group interrupts */
if (t_ldgp->interrupted) {
}
}
serviced));
return (serviced);
}
{
/*
* The PCIE errors are unrecoverrable and cannot be cleared.
* The only thing we can do here is to mask them off to prevent
* continued interrupts.
*/
statsp->spc_acc_err++;
"==> hxge_peu_handle_sys_errors: spc_acc_err"));
}
statsp->tdc_pioacc_err++;
"==> hxge_peu_handle_sys_errors: tdc_pioacc_err"));
}
statsp->rdc_pioacc_err++;
"==> hxge_peu_handle_sys_errors: rdc_pioacc_err"));
}
statsp->pfc_pioacc_err++;
"==> hxge_peu_handle_sys_errors: pfc_pioacc_err"));
}
"==> hxge_peu_handle_sys_errors: vmac_pioacc_err"));
}
"==> hxge_peu_handle_sys_errors: cpl_hdrq_parerr"));
}
"==> hxge_peu_handle_sys_errors: cpl_dataq_parerr"));
}
"==> hxge_peu_handle_sys_errors: retryram_xdlh_parerr"));
}
"==> hxge_peu_handle_sys_errors: retrysotram_xdlh_parerr"));
}
statsp->p_hdrq_parerr++;
"==> hxge_peu_handle_sys_errors: p_hdrq_parerr"));
}
statsp->p_dataq_parerr++;
"==> hxge_peu_handle_sys_errors: p_dataq_parerr"));
}
statsp->np_hdrq_parerr++;
"==> hxge_peu_handle_sys_errors: np_hdrq_parerr"));
}
"==> hxge_peu_handle_sys_errors: np_dataq_parerr"));
}
"==> hxge_peu_handle_sys_errors: eic_msix_parerr"));
}
statsp->hcr_parerr++;
"==> hxge_peu_handle_sys_errors: hcr_parerr"));
}
return (HXGE_OK);
}
/*ARGSUSED*/
{
return (serviced);
}
}
}
"<== hxge_syserrintr(no logical group): "
return (DDI_INTR_UNCLAIMED);
}
/*
* Get the logical device state if the function uses interrupt.
*/
}
/* This interrupt handler is for system error interrupts. */
/* TDMC */
(void) hxge_txdma_handle_sys_errors(hxgep);
/* RDMC */
"==> hxge_syserr_intr: device error - RDMC"));
(void) hxge_rxdma_handle_sys_errors(hxgep);
/* PCI-E */
"==> hxge_syserr_intr: device error - PCI-E"));
/* kstats are updated here */
(void) hxge_peu_handle_sys_errors(hxgep);
"==> hxge_syserr_intr: device error - unknown"));
}
}
return (serviced);
}
void
{
}
void
{
}
void
{
/*
* Replace current ticks and counts for later
* processing by the receive packet interrupt routines.
*/
}
void
{
(void) hxge_tx_vmac_disable(hxgep);
(void) hxge_rx_vmac_disable(hxgep);
}
void
{
int cmd;
return;
}
switch (cmd) {
default:
return;
case HXGE_GET64:
break;
case HXGE_PUT64:
break;
case HXGE_PUT_TCAM:
break;
case HXGE_GET_TCAM:
break;
case HXGE_RTRACE:
break;
}
}
/*
* 10G is the only loopback mode for Hydra.
*/
void
{
int i;
}
case LB_GET_MODE:
} else
break;
case LB_SET_MODE:
break;
}
} else {
}
break;
case LB_GET_INFO_SIZE:
"HXGE_GET_LB_INFO command: size %d", size));
} else
break;
case LB_GET_INFO:
"HXGE_GET_LB_INFO command: size %d", size));
i = 0;
} else
} else {
}
break;
}
}
/*ARGSUSED*/
{
"hxge%d: Loopback mode already set (lb_mode %d).\n",
goto hxge_set_lb_exit;
}
/* 10G is the only loopback mode for Hydra */
else {
"hxge%d: Loopback mode not supported(mode %d).\n",
goto hxge_set_lb_exit;
}
if (lb_mode == hxge_lb_normal) {
if (hxge_lb_dbg) {
"!hxge%d: Returning to normal operation",
}
goto hxge_set_lb_exit;
}
if (hxge_lb_dbg)
else {
"hxge%d: Loopback mode not supported(mode %d).\n",
goto hxge_set_lb_exit;
}
}
"<== hxge_set_lb status = 0x%08x", status));
return (status);
}
void
{
hxgep->hxge_timerid = 0;
goto hxge_check_hw_state_exit;
}
"NULL ldgvp (interrupt not ready)."));
goto hxge_check_hw_state_exit;
}
"ldgvp $%p t_ldvp $%p use_timer flag %d",
goto hxge_check_hw_state_exit;
}
"Bad register acc handle"));
}
}
/*ARGSUSED*/
static void
{
uint32_t i, j;
size = 1024;
"malformed M_IOCTL MBLKL = %d size = %d",
return;
}
for (i = 0, j = base_entry; i < num_entries; i++, j++) {
}
}