4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * CDDL HEADER START
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * The contents of this file are subject to the terms of the
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * Common Development and Distribution License (the "License").
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * You may not use this file except in compliance with the License.
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * or http://www.opensolaris.org/os/licensing.
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * See the License for the specific language governing permissions
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * and limitations under the License.
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * When distributing Covered Code, include this CDDL HEADER in each
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * If applicable, add the following below this CDDL HEADER, with the
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * fields enclosed by brackets "[]" replaced with your own identifying
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * information: Portions Copyright [yyyy] [name of copyright owner]
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * CDDL HEADER END
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore/* Copyright © 2003-2011 Emulex. All rights reserved. */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * Source file containing the implementation of the Hardware specific
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathanstatic ddi_device_acc_attr_t reg_accattr = {
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathanextern int oce_destroy_q(struct oce_dev *dev, struct oce_mbx *mbx,
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* get number of supported bars */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ret = ddi_dev_nregs(dev->dip, &dev->num_bars);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "%d: could not retrieve num_bars", MOD_CONFIG);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* verify each bar and map it accordingly */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ret = ddi_dev_regsize(dev->dip, OCE_DEV_CFG_BAR, &bar_size);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "Could not get sizeof BAR %d",
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ret = ddi_regs_map_setup(dev->dip, OCE_DEV_CFG_BAR, &dev->dev_cfg_addr,
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan 0, bar_size, ®_accattr, &dev->dev_cfg_handle);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "Could not map bar %d",
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ret = ddi_dev_regsize(dev->dip, OCE_PCI_CSR_BAR, &bar_size);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "Could not get sizeof BAR %d",
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ret = ddi_regs_map_setup(dev->dip, OCE_PCI_CSR_BAR, &dev->csr_addr,
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan 0, bar_size, ®_accattr, &dev->csr_handle);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "Could not map bar %d",
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ddi_regs_map_free(&dev->dev_cfg_handle);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* Doorbells */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ret = ddi_dev_regsize(dev->dip, OCE_PCI_DB_BAR, &bar_size);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "%d Could not get sizeof BAR %d",
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ddi_regs_map_free(&dev->dev_cfg_handle);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ret = ddi_regs_map_setup(dev->dip, OCE_PCI_DB_BAR, &dev->db_addr,
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "Could not map bar %d", OCE_PCI_DB_BAR);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ddi_regs_map_free(&dev->dev_cfg_handle);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan ddi_regs_map_free(&dev->dev_cfg_handle);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan * function to map the device memory
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan * dev - handle to device private data structure
12d61dab3304980e691068219eaaab6398744a2eSukumar Swaminathan if (oce_fm_check_acc_handle(dev, dev->dev_cfg_handle) != DDI_FM_OK) {
12d61dab3304980e691068219eaaab6398744a2eSukumar Swaminathan ddi_fm_service_impact(dev->dip, DDI_SERVICE_DEGRADED);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan} /* oce_pci_init */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan * function to free device memory mapping mapped using
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan * oce_pci_init
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan * dev - handle to device private data
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan} /* oce_pci_fini */
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore * function to read the PCI Bus, Device, and function numbers for the
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore * device instance.
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore * dev - handle to device private data
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore /* Get "reg" property */
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore rc = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dev->dip,
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore 0, "reg", (int **)&pci_rp, (uint_t *)&length);
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore (length < (sizeof (pci_regspec_t) / sizeof (int)))) {
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore "Failed to read \"reg\" property, Status = 0x%x", rc);
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore dev->pci_bus = PCI_REG_BUS_G(pci_rp->pci_phys_hi);
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore dev->pci_device = PCI_REG_DEV_G(pci_rp->pci_phys_hi);
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore dev->pci_function = PCI_REG_FUNC_G(pci_rp->pci_phys_hi);
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore "\"reg\" property num=%d, Bus=%d, Device=%d, Function=%d",
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore length, dev->pci_bus, dev->pci_device, dev->pci_function);
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore /* Free the memory allocated by ddi_prop_lookup_int_array() */
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore dev->vendor_id = pci_config_get16(dev->pci_cfg_handle,
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore dev->device_id = pci_config_get16(dev->pci_cfg_handle,
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore dev->subsys_id = pci_config_get16(dev->pci_cfg_handle,
3abb112f8485b33b6b9b52b340bede0a333c10bfGarrett D'Amore dev->subvendor_id = pci_config_get16(dev->pci_cfg_handle,
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * function to check if a reset is required
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * dev - software handle to the device
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan post_status.dw0 = OCE_CSR_READ32(dev, MPU_EP_SEMAPHORE);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan if (post_status.bits.stage == POST_STAGE_ARMFW_READY) {
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan} /* oce_is_reset_pci */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * function to do a soft reset on the device
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * dev - software handle to the device
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* struct mpu_ep_control ep_control; */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* struct pcicfg_online1 online1; */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* issue soft reset */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan soft_rst.dw0 = OCE_CFG_READ32(dev, PCICFG_SOFT_RESET);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan OCE_CFG_WRITE32(dev, PCICFG_SOFT_RESET, soft_rst.dw0);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* wait till soft reset bit deasserts */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan tmo = drv_usectohz(60000000); /* 1.0min */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan if ((ddi_get_lbolt() - earlier) > tmo) {
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan soft_rst.dw0 = OCE_CFG_READ32(dev, PCICFG_SOFT_RESET);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "0x%x soft_reset"
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan "bit asserted[1]. Reset failed",
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan} /* oce_pci_soft_reset */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * function to trigger a POST on the device
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * dev - software handle to the device
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* read semaphore CSR */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan post_status.dw0 = OCE_CSR_READ32(dev, MPU_EP_SEMAPHORE);
12d61dab3304980e691068219eaaab6398744a2eSukumar Swaminathan if (oce_fm_check_acc_handle(dev, dev->csr_handle) != DDI_FM_OK) {
12d61dab3304980e691068219eaaab6398744a2eSukumar Swaminathan ddi_fm_service_impact(dev->dip, DDI_SERVICE_DEGRADED);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* if host is ready then wait for fw ready else send POST */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan if (post_status.bits.stage <= POST_STAGE_AWAITING_HOST_RDY) {
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan post_status.bits.stage = POST_STAGE_CHIP_RESET;
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan OCE_CSR_WRITE32(dev, MPU_EP_SEMAPHORE, post_status.dw0);
12d61dab3304980e691068219eaaab6398744a2eSukumar Swaminathan if (oce_fm_check_acc_handle(dev, dev->csr_handle) !=
12d61dab3304980e691068219eaaab6398744a2eSukumar Swaminathan ddi_fm_service_impact(dev->dip, DDI_SERVICE_DEGRADED);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan /* wait for FW ready */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan tmo = drv_usectohz(60000000); /* 1.0min */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan if ((ddi_get_lbolt() - earlier) > tmo) {
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan post_status.dw0 = OCE_CSR_READ32(dev, MPU_EP_SEMAPHORE);
12d61dab3304980e691068219eaaab6398744a2eSukumar Swaminathan if (oce_fm_check_acc_handle(dev, dev->csr_handle) !=
12d61dab3304980e691068219eaaab6398744a2eSukumar Swaminathan ddi_fm_service_impact(dev->dip, DDI_SERVICE_DEGRADED);
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan if (post_status.bits.stage == POST_STAGE_ARMFW_READY)
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan} /* oce_POST */
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * function to modify register access attributes corresponding to the
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * FM capabilities configured by the user
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan * fm_caps - fm capability configured by the user and accepted by the driver
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC;
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC;
4d0e50075058332ce0cd62bc2669a8a4dea45da0Sukumar Swaminathan} /* oce_set_fma_flags */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathanoce_create_nw_interface(struct oce_dev *dev)
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan uint32_t capab_en_flags = OCE_CAPAB_ENABLE;
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan capab_en_flags |= MBX_RX_IFACE_FLAGS_RSS;
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* create an interface for the device with out mac */
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan ret = oce_if_create(dev, capab_flags, capab_en_flags,
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan 0, &dev->mac_addr[0], (uint32_t *)&dev->if_id);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan "Interface creation failed: 0x%x", ret);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* Enable VLAN Promisc on HW */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan ret = oce_config_vlan(dev, (uint8_t)dev->if_id, NULL, 0,
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* set default flow control */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan ret = oce_set_flow_control(dev, dev->flow_control);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan ret = oce_set_promiscuous(dev, dev->promisc);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathanoce_delete_nw_interface(struct oce_dev *dev) {
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* currently only single interface is implmeneted */
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathanoce_create_itbl(struct oce_dev *dev, char *itbl)
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan struct oce_rq **rss_queuep = &dev->rq[1];
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan /* fill the indirection table rq 0 is default queue */
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan for (i = 0; i < OCE_ITBL_SIZE; i++) {
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan itbl[i] = rss_queuep[i % nrss]->rss_cpuid;
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan /* disable the interrupts here and enable in start */
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan (void) oce_gen_hkey(hkey, OCE_HKEY_SIZE);
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan ret = oce_config_rss(dev, dev->if_id, hkey, itbl, OCE_ITBL_SIZE,
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan "Failed to Configure RSS");
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan "Failed to Setup handlers");
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan ret = oce_config_rss(dev, dev->if_id, hkey, itbl, OCE_ITBL_SIZE,
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan "Failed to Disable RSS");
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan "!!!HW POST1 FAILED");
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* ADD FM FAULT */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* create bootstrap mailbox */
5b9d3151a4426af9ad6ef2c2a178f13476b884b3Sukumar Swaminathan sizeof (struct oce_bmbx), NULL, DDI_DMA_CONSISTENT);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan "Failed to allocate bmbx: size = %u",
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan "!!!FUNCTION RESET FAILED");
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* reset the Endianess of BMBX */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan "Mailbox initialization2 Failed with %d", ret);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* read the firmware version */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan "Firmaware version read failed with %d", ret);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* read the fw config */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan "Firmware configuration read failed with %d", ret);
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan /* read the Factory MAC address */
8d738d7d1f42180d941afa8b9a7310a2a437d17cSukumar Swaminathan "MAC address read failed with %d", ret);