emlxs_mbox.c revision fcf3ce441efd61da9bb2884968af01cb7c1452cc
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Emulex. All rights reserved.
* Use is subject to License terms.
*/
#include "emlxs.h"
/* Required for EMLXS_CONTEXT in EMLXS_MSGF calls */
{
{MBX_SHUTDOWN, "SHUTDOWN"},
{MBX_LOAD_SM, "LOAD_SM"},
{MBX_READ_NV, "READ_NV"},
{MBX_WRITE_NV, "WRITE_NV"},
{MBX_RUN_BIU_DIAG, "RUN_BIU_DIAG"},
{MBX_INIT_LINK, "INIT_LINK"},
{MBX_DOWN_LINK, "DOWN_LINK"},
{MBX_CONFIG_LINK, "CONFIG_LINK"},
{MBX_PART_SLIM, "PART_SLIM"},
{MBX_CONFIG_RING, "CONFIG_RING"},
{MBX_RESET_RING, "RESET_RING"},
{MBX_READ_CONFIG, "READ_CONFIG"},
{MBX_READ_RCONFIG, "READ_RCONFIG"},
{MBX_READ_SPARM, "READ_SPARM"},
{MBX_READ_STATUS, "READ_STATUS"},
{MBX_READ_RPI, "READ_RPI"},
{MBX_READ_XRI, "READ_XRI"},
{MBX_READ_REV, "READ_REV"},
{MBX_READ_LNK_STAT, "READ_LNK_STAT"},
{MBX_REG_LOGIN, "REG_LOGIN"},
{MBX_UNREG_LOGIN, "UNREG_LOGIN"},
{MBX_READ_LA, "READ_LA"},
{MBX_CLEAR_LA, "CLEAR_LA"},
{MBX_DUMP_MEMORY, "DUMP_MEMORY"},
{MBX_DUMP_CONTEXT, "DUMP_CONTEXT"},
{MBX_RUN_DIAGS, "RUN_DIAGS"},
{MBX_RESTART, "RESTART"},
{MBX_UPDATE_CFG, "UPDATE_CFG"},
{MBX_DOWN_LOAD, "DOWN_LOAD"},
{MBX_DEL_LD_ENTRY, "DEL_LD_ENTRY"},
{MBX_RUN_PROGRAM, "RUN_PROGRAM"},
{MBX_SET_MASK, "SET_MASK"},
{MBX_SET_VARIABLE, "SET_VARIABLE"},
{MBX_UNREG_D_ID, "UNREG_D_ID"},
{MBX_KILL_BOARD, "KILL_BOARD"},
{MBX_CONFIG_FARP, "CONFIG_FARP"},
{MBX_LOAD_AREA, "LOAD_AREA"},
{MBX_RUN_BIU_DIAG64, "RUN_BIU_DIAG64"},
{MBX_CONFIG_PORT, "CONFIG_PORT"},
{MBX_READ_SPARM64, "READ_SPARM64"},
{MBX_READ_RPI64, "READ_RPI64"},
{MBX_CONFIG_MSI, "CONFIG_MSI"},
{MBX_CONFIG_MSIX, "CONFIG_MSIX"},
{MBX_REG_LOGIN64, "REG_LOGIN64"},
{MBX_READ_LA64, "READ_LA64"},
{MBX_FLASH_WR_ULA, "FLASH_WR_ULA"},
{MBX_SET_DEBUG, "SET_DEBUG"},
{MBX_GET_DEBUG, "GET_DEBUG"},
{MBX_LOAD_EXP_ROM, "LOAD_EXP_ROM"},
{MBX_BEACON, "BEACON"},
{MBX_ASYNC_EVENT, "ASYNC_EVENT"},
{MBX_HEARTBEAT, "HEARTBEAT"},
{MBX_READ_EVENT_LOG_STATUS, "READ_EVENT_LOG_STATUS"},
{MBX_READ_EVENT_LOG, "READ_EVENT_LOG"},
{MBX_WRITE_EVENT_LOG, "WRITE_EVENT_LOG"},
{MBX_NV_LOG, "NV_LOG"}
}; /* emlxs_mb_cmd_table */
/* ARGSUSED */
extern void
{
return;
} /* emlxs_mb_async_event() */
/* ARGSUSED */
extern void
{
return;
} /* emlxs_mb_heartbeat() */
#ifdef MSI_SUPPORT
/* ARGSUSED */
extern void
{
uint32_t i;
/* Set the default message id to zero */
for (i = 1; i < intr_count; i++) {
#ifdef EMLXS_BIG_ENDIAN
}
}
}
}
}
}
}
#endif /* EMLXS_BIG_ENDIAN */
#ifdef EMLXS_LITTLE_ENDIAN
/* Accounts for half word swap of LE architecture */
}
}
}
}
}
}
}
#endif /* EMLXS_LITTLE_ENDIAN */
}
return;
} /* emlxs_mb_config_msi() */
/* ARGSUSED */
extern void
{
uint32_t i;
/* Set the default message id to zero */
for (i = 1; i < intr_count; i++) {
#ifdef EMLXS_BIG_ENDIAN
}
}
}
}
}
}
}
#endif /* EMLXS_BIG_ENDIAN */
#ifdef EMLXS_LITTLE_ENDIAN
/* Accounts for word swap of LE architecture */
}
}
}
}
}
}
}
#endif /* EMLXS_LITTLE_ENDIAN */
}
return;
} /* emlxs_mb_config_msix() */
#endif /* MSI_SUPPORT */
/* ARGSUSED */
extern void
{
return;
} /* emlxs_mb_reset_ring() */
/*
* emlxs_mb_dump_vpd Issue a DUMP MEMORY
* mailbox command
*/
/* ARGSUSED */
extern void
{
/*
* Setup to dump VPD region
*/
/* mailbox size */
} /* emlxs_mb_dump_vpd() */
/*
* emlxs_mb_read_nv Issue a READ NVPARAM
* mailbox command
*/
/* ARGSUSED */
extern void
{
} /* End emlxs_mb_read_nv */
/*
* emlxs_mb_read_rev Issue a READ REV
* mailbox command
*/
/* ARGSUSED */
extern void
{
if (v3) {
}
} /* End emlxs_mb_read_rev */
/*
* emlxs_mb_run_biu_diag Issue a RUN_BIU_DIAG
* mailbox command
*/
/* ARGSUSED */
extern uint32_t
{
return (0);
} /* End emlxs_mb_run_biu_diag */
/*
* emlxs_mb_read_la Issue a READ LA
* mailbox command
*/
extern uint32_t
{
return (1);
}
/*
* save address for completion
*/
return (0);
} /* emlxs_mb_read_la() */
/*
* emlxs_mb_clear_la Issue a CLEAR LA
* mailbox command
*/
extern void
{
#ifdef FC_RPI_CHECK
#endif /* FC_RPI_CHECK */
return;
} /* End emlxs_mb_clear_la */
/*
* emlxs_mb_read_status Issue a READ STATUS
* mailbox command
*/
/* ARGSUSED */
extern void
{
} /* End fc_read_status */
/*
* emlxs_mb_read_lnk_stat Issue a LINK STATUS
* mailbox command
*/
/* ARGSUSED */
extern void
{
} /* End emlxs_mb_read_lnk_stat */
/*
* emlxs_mb_write_nv Issue a WRITE NVPARAM
* mailbox command
*/
static void
{
int32_t i;
sizeof (NAME_TYPE));
sizeof (NAME_TYPE));
for (i = 0; i < 21; i++) {
}
} /* End emlxs_mb_write_nv */
/*
* emlxs_mb_part_slim Issue a PARTITION SLIM
* mailbox command
*/
static void
{
} /* End emlxs_mb_part_slim */
/*
* emlxs_mb_config_ring Issue a CONFIG RING
* mailbox command
*/
extern void
{
int32_t i;
int32_t j;
j = 0;
for (i = 0; i < ring; i++) {
j += hba->ring_masks[i];
}
if ((j + i) >= 6) {
break;
}
}
return;
} /* End emlxs_mb_config_ring */
/*
* emlxs_mb_config_link Issue a CONFIG LINK
* mailbox command
*/
extern void
{
/*
* NEW_FEATURE SLI-2, Coalescing Response Feature.
*/
}
return;
} /* emlxs_mb_config_link() */
/*
* emlxs_mb_init_link Issue an INIT LINK
* mailbox command
*/
extern void
{
switch (topology) {
case FLAGS_LOCAL_LB:
break;
break;
break;
case FLAGS_TOPOLOGY_MODE_LOOP:
break;
break;
}
}
/*
* Setting up the link speed
*/
switch (linkspeed) {
case 0:
break;
case 1:
linkspeed = 0;
}
break;
case 2:
linkspeed = 0;
}
break;
case 4:
linkspeed = 0;
}
break;
case 8:
linkspeed = 0;
}
break;
case 10:
linkspeed = 0;
}
break;
default:
linkspeed = 0;
break;
}
}
return;
} /* emlxs_mb_init_link() */
/*
* emlxs_mb_down_link Issue a DOWN LINK
* mailbox command
*/
/* ARGSUSED */
extern void
{
return;
} /* emlxs_mb_down_link() */
/*
* emlxs_mb_read_sparam Issue a READ SPARAM
* mailbox command
*/
extern uint32_t
{
return (1);
}
/*
* save address for completion
*/
return (0);
} /* emlxs_mb_read_sparam() */
/*
* emlxs_mb_read_rpi Issue a READ RPI
* mailbox command
*/
/* ARGSUSED */
extern uint32_t
{
/*
* Set flag to issue action on cmpl
*/
return (0);
} /* End emlxs_mb_read_rpi */
/*
* emlxs_mb_read_xri Issue a READ XRI
* mailbox command
*/
/* ARGSUSED */
extern uint32_t
{
/*
* Set flag to issue action on cmpl
*/
return (0);
} /* End emlxs_mb_read_xri */
/* ARGSUSED */
extern int32_t
{
return (0);
}
/* Validate the service parameters */
return (1);
}
return (2);
}
/*
* If the receive data length is zero then set it to the CSP
* value
*/
if (!nsp_value) {
return (0);
}
}
/*
* If the receive data length is zero then set it to the CSP
* value
*/
/* This prevents a Emulex adapter bug from occurring */
if (!nsp_value) {
return (0);
}
}
return (0);
} /* emlxs_mb_check_sparm() */
/*
* emlxs_mb_reg_did Issue a REG_LOGIN
* mailbox command
*/
extern uint32_t
{
/* Check for invalid node ids to register */
return (1);
}
return (1);
}
/* Check if the node limit has been reached */
return (1);
}
return (1);
}
/* Build login request */
return (1);
}
#ifdef SLI3_SUPPORT
#endif /* SLI3_SUPPORT */
}
return (0);
} /* emlxs_mb_reg_did() */
/*
* emlxs_mb_unreg_rpi Issue a UNREG_LOGIN
* mailbox command
*/
extern uint32_t
{
if (rpi != 0xffff) {
/* Make sure the node does already exist */
if (ndlp) {
/*
* If we just unregistered the host node then clear
* the host DID
*/
}
/* remove it */
} else {
return (1);
}
} else { /* Unreg all */
}
return (1);
}
#ifdef SLI3_SUPPORT
#endif /* SLI3_SUPPORT */
}
return (0);
} /* emlxs_mb_unreg_rpi() */
/*
* emlxs_mb_unreg_did Issue a UNREG_DID
* mailbox command
*/
extern uint32_t
{
/*
* Unregister all default RPIs if did == 0xffffffff
*/
if (did != 0xffffffff) {
/* Check for base node */
/* just flush base node */
0, 0, 0);
0);
/* Return now */
return (1);
}
/*
* A zero DID means that we are trying to unreg the host node
* after a link bounce
*/
/*
* If the prev_did == 0 then the adapter has been reset and
* there is no need in unregistering
*/
/*
* If the prev_did != 0 then we can look for the hosts last
* known DID node
*/
if (did == 0) {
return (1);
}
}
/* Make sure the node does already exist */
if (ndlp) {
/* remove it */
/*
* If we just unregistered the host node then clear
* the host DID
*/
}
} else {
return (1);
}
}
return (1);
}
#ifdef SLI3_SUPPORT
#endif /* SLI3_SUPPORT */
}
return (0);
} /* End emlxs_mb_unreg_did */
/*
* emlxs_mb_set_mask Issue a SET MASK
* mailbox command
*/
/* ARGSUSED */
static void
{
} /* End emlxs_mb_set_mask */
/*
* emlxs_mb_set_debug Issue a special debug
* mailbox command
*/
/* ARGSUSED */
static void
{
} /* End emlxs_mb_set_debug */
/*
* emlxs_mb_set_var Issue a special debug mbox
* command to write slim
*/
/* ARGSUSED */
extern void
{
/* addr = 0x090597 is AUTO ABTS disable for ELS commands */
/* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
/* addr = 0x100506 is for setting PCI MAX READ value */
/*
* Always turn on DELAYED ABTS for ELS timeouts
*/
value = 1;
}
} /* End emlxs_mb_set_var */
/*
* Disable Traffic Cop
*/
/* ARGSUSED */
extern void
{
} /* End emlxs_disable_tc */
/*
* emlxs_mb_config_port Issue a CONFIG_PORT
* mailbox command
*/
extern uint32_t
{
uint32_t i;
#ifdef SLI3_SUPPORT
#else /* SLI3_SUPPORT */
#endif /* SLI3_SUPPORT */
/* Set Host pointers in SLIM flag */
/* Initialize hba structure for assumed default SLI2 mode */
/* If config port succeeds, then we will update it then */
#ifdef SLI3_SUPPORT
if (sli_mode >= 3) {
#ifdef NPIV_SUPPORT
MAX_VPORTS - 1;
} else {
MAX_VPORTS_LIMITED - 1;
}
} else {
"CFGPORT: Firmware does not support NPIV. "
}
}
#endif /* NPIV_SUPPORT */
}
#endif /* SLI3_SUPPORT */
/*
* Now setup pcb
*/
/*
* Set up HGP - Port Memory
*
* CR0Put - SLI2(no HBQs) = 0xc0, With HBQs = 0x80
* RR0Get 0xc4 0x84
* CR1Put 0xc8 0x88
* RR1Get 0xcc 0x8c
* CR2Put 0xd0 0x90
* RR2Get 0xd4 0x94
* CR3Put 0xd8 0x98
* RR3Get 0xdc 0x9c
*
* Reserved 0xa0-0xbf
*
* If HBQs configured:
* HBQ 0 Put ptr 0xc0
* HBQ 1 Put ptr 0xc4
* HBQ 2 Put ptr 0xc8
* ......
* HBQ(M-1)Put Pointer 0xc0+(M-1)*4
*/
#ifdef SLI3_SUPPORT
if (sli_mode >= 3) {
/* ERBM is enabled */
} else /* SLI2 */
#endif /* SLI3_SUPPORT */
{
/* ERBM is disabled */
hba->hgp_hbq_offset = 0;
}
/* The Sbus card uses Host Memory. The PCI card uses SLIM POINTER */
} else {
Laddr &= ~0x4;
}
offset = 0;
for (i = 0; i < 4; i++) {
/* Setup command ring */
/* Setup response ring */
}
offset =
return (0);
} /* emlxs_mb_config_port() */
#ifdef SLI3_SUPPORT
extern void
{
int i;
/* Copy info for profiles 2,3,5. Other profiles this area is reserved */
}
/* Return if no rctl / type masks for this HBQ */
if (!hbq->HBQ_num_mask) {
return;
}
/* Otherwise we setup specific rctl / type masks for this HBQ */
for (i = 0; i < hbq->HBQ_num_mask; i++) {
}
return;
} /* emlxs_mb_config_hbq() */
#endif /* SLI3_SUPPORT */
extern uint32_t
{
return (0);
}
/* Can't reg vpi until ClearLA is sent */
return (1);
}
/* Must have port id */
return (1);
}
return (1);
}
}
return (0);
} /* emlxs_mb_reg_vpi() */
extern uint32_t
{
return (0);
}
return (1);
}
}
return (0);
} /* emlxs_mb_unreg_vpi() */
/*
* emlxs_mb_config_farp Issue a CONFIG FARP
* mailbox command
*/
extern void
{
sizeof (NAME_TYPE));
sizeof (NAME_TYPE));
} /* emlxs_mb_config_farp() */
/*
* emlxs_mb_read_nv Issue a READ CONFIG
* mailbox command
*/
/* ARGSUSED */
extern void
{
} /* emlxs_mb_read_config() */
/*
* NAME: emlxs_mb_put
*
* FUNCTION: put mailbox cmd onto the mailbox queue.
*
* EXECUTION ENVIRONMENT: process and interrupt level.
*
* NOTES:
*
* CALLED FROM: emlxs_mb_issue_cmd
*
* INPUT: hba - pointer to the device info area mbp
* - pointer to mailbox queue entry of mailbox cmd
*
* RETURNS: NULL - command queued
*/
extern void
{
/*
* queue command to end of list
*/
} else {
/*
* add command to empty list
*/
}
} /* emlxs_mb_put() */
/*
* NAME: emlxs_mb_get
*
* FUNCTION: get a mailbox command from mailbox command queue
*
* EXECUTION ENVIRONMENT: interrupt level.
*
* NOTES:
*
* CALLED FROM: emlxs_handle_mb_event
*
* INPUT: hba - pointer to the device info area
*
* RETURNS: NULL - no match found mb pointer - pointer to a mailbox command
*/
extern MAILBOXQ *
{
} else {
}
}
return (p_first);
} /* emlxs_mb_get() */
/* EMLXS_PORT_LOCK must be held when calling this */
static void
{
/* Set the Mailbox timer */
/* Initialize mailbox */
if (flag == MBX_NOWAIT) {
} else {
}
}
}
}
}
#ifdef MBOX_EXT_SUPPORT
}
#endif /* MBOX_EXT_SUPPORT */
return;
} /* emlxs_mb_init() */
extern void
{
if (hba->mbox_queue_flag) {
if (mbxStatus != MBX_SUCCESS) {
} else {
}
}
#ifdef MBOX_EXT_SUPPORT
hba->mbox_ext_size = 0;
#endif /* MBOX_EXT_SUPPORT */
hba->mbox_iocbq = 0;
hba->mbox_mbqflag = 0;
hba->mbox_timer = 0;
hba->mbox_queue_flag = 0;
if (mbox_mbq) {
if (mb) {
/*
* Copy the local mailbox provided back into the
* original mailbox
*/
}
/* Mark mailbox complete */
/* Wake up the sleeping thread */
if (mbox_queue_flag == MBX_SLEEP) {
}
}
/* Check for deferred MBUF cleanup */
}
#ifdef SFCT_SUPPORT
"FCT mailbox: %s: status=%x",
}
#endif /* SFCT_SUPPORT */
/* Check for deferred pkt completion */
if (mbox_sbp) {
if (mbxStatus != MBX_SUCCESS) {
/* Set error status */
IOERR_NO_RESOURCES, 1);
}
}
/* Check for deferred ub completion */
if (mbox_ubp) {
}
/* Check for deferred iocb tx */
if (mbox_iocbq) {
}
return;
} /* emlxs_mb_fini() */
/* This should only be called with active MBX_NOWAIT mailboxes */
static void
{
} else {
}
hba->mbox_iocbq = 0;
hba->mbox_mbqflag = 0;
hba->mbox_queue_flag = 0;
return;
} /* emlxs_mb_retry() */
/*
* emlxs_handle_mb_event
*
* Description: Process a Mailbox Attention.
* Called from host_interrupt to process MBATT
*
* Returns:
*
*/
extern uint32_t
{
uint32_t i;
switch (hba->mbox_queue_flag) {
case 0:
"No mailbox active.");
return (0);
case MBX_POLL:
/*
* Mark mailbox complete, this should wake up any polling
* threads
*/
/*
* This can happen if interrupts are enabled while a polled
* mailbox command is outstanding
*/
/*
* If we don't set MBQ_COMPLETED here, the polling thread may
* wait until timeout error occurs
*/
if (mbq) {
"Mailbox event. Completing Polled command.");
}
return (0);
case MBX_SLEEP:
case MBX_NOWAIT:
break;
default:
"Invalid Mailbox flag (%x).");
return (0);
}
/* Get first word of mailbox */
sizeof (uint32_t), DDI_DMA_SYNC_FORKERNEL);
} else {
}
i = 0;
if (i++ > 10000) {
"OWN_CHIP: %s: status=%x",
return (1);
}
/* Get first word of mailbox */
sizeof (uint32_t), DDI_DMA_SYNC_FORKERNEL);
} else {
}
}
/* Now that we are the owner, DMA Sync entire mailbox if needed */
} else {
}
#ifdef MBOX_EXT_SUPPORT
hba->mbox_ext_size);
} else {
}
}
#endif /* MBOX_EXT_SUPPORT */
/* Now sync the memory buffer if one was used */
}
/* Mailbox has been completely received at this point */
hba->heartbeat_active = 0;
goto done;
}
"Received. %s: status=%x Sleep.",
} else {
"Completed. %s: status=%x",
}
/* Filter out passthru mailbox */
goto done;
}
/* If succesful, process the result */
goto done;
}
/* ERROR RETURNED */
/* Check for no resources */
/* Retry only MBX_NOWAIT requests */
"Retrying. %s: status=%x",
switch (mbox->mbxCommand) {
case MBX_READ_SPARM:
if (control == 0) {
}
break;
case MBX_READ_SPARM64:
if (control == 0) {
}
break;
case MBX_REG_LOGIN:
if (control == 0) {
goto done;
}
break;
case MBX_REG_LOGIN64:
if (control == 0) {
goto done;
}
break;
case MBX_READ_LA:
if (control == 0) {
}
break;
case MBX_READ_LA64:
if (control == 0) {
}
break;
}
/* Refresh the mailbox area */
MBX_BUSY) {
}
return (0);
}
}
/*
* ERROR: process mailbox command error
*/
switch (mb->mbxCommand) {
case MBX_REG_LOGIN:
case MBX_REG_LOGIN64:
#ifdef SLI3_SUPPORT
#endif /* SLI3_SUPPORT */
}
break;
case MBX_READ_LA:
case MBX_READ_LA64:
/* Enable Link Attention interrupts */
/*
* hba->hc_copy = READ_CSR_REG(hba, FC_HC_REG(hba,
* hba->csr_addr));
*/
}
break;
case MBX_CLEAR_LA:
la_enable = 1;
/*
* Get a buffer which will be used for mailbox
* commands
*/
MEM_PRI))) {
/* Get link attention message */
MBX_NOWAIT, 0) != MBX_BUSY) {
(void) emlxs_mem_put(hba,
}
la_enable = 0;
} else {
}
}
}
if (la_enable) {
/* Enable Link Attention interrupts */
/*
* hba->hc_copy = READ_CSR_REG(hba,
* FC_HC_REG(hba, hba->csr_addr));
*/
}
} else {
/* Disable Link Attention interrupts */
/*
* hba->hc_copy = READ_CSR_REG(hba,
* FC_HC_REG(hba, hba->csr_addr));
*/
}
}
break;
case MBX_INIT_LINK:
/* Retry only MBX_NOWAIT requests */
"Retrying. %s: status=%x. Auto-speed set.",
MEM_MBOX))) {
/* Refresh the mailbox area */
MBX_NOWAIT, 0) != MBX_BUSY) {
(void) emlxs_mem_put(hba,
}
return (0);
}
}
}
break;
}
done:
/* Clean up the mailbox area */
/* Attempt to send pending mailboxes */
}
}
return (0);
} /* emlxs_handle_mb_event() */
/*
* emlxs_mb_handle_cmd
*
* Description: Process a Mailbox Command.
* Called from host_interrupt to process MBATT
*
* Returns:
*
*/
static int
{
int32_t i;
return (1);
}
/*
* Mailbox command completed successfully, process completion
*/
switch (mb->mbxCommand) {
case MBX_SHUTDOWN:
case MBX_LOAD_SM:
case MBX_READ_NV:
case MBX_WRITE_NV:
case MBX_RUN_BIU_DIAG:
case MBX_RUN_BIU_DIAG64:
case MBX_INIT_LINK:
case MBX_DOWN_LINK:
case MBX_CONFIG_LINK:
case MBX_PART_SLIM:
case MBX_CONFIG_RING:
case MBX_RESET_RING:
case MBX_READ_CONFIG:
case MBX_READ_RCONFIG:
case MBX_READ_STATUS:
case MBX_READ_XRI:
case MBX_READ_REV:
case MBX_READ_LNK_STAT:
case MBX_UNREG_LOGIN:
case MBX_DUMP_MEMORY:
case MBX_DUMP_CONTEXT:
case MBX_RUN_DIAGS:
case MBX_RESTART:
case MBX_UPDATE_CFG:
case MBX_DOWN_LOAD:
case MBX_DEL_LD_ENTRY:
case MBX_RUN_PROGRAM:
case MBX_SET_MASK:
case MBX_SET_VARIABLE:
case MBX_UNREG_D_ID:
case MBX_KILL_BOARD:
case MBX_CONFIG_FARP:
case MBX_LOAD_AREA:
case MBX_CONFIG_PORT:
case MBX_CONFIG_MSI:
case MBX_FLASH_WR_ULA:
case MBX_SET_DEBUG:
case MBX_GET_DEBUG:
case MBX_LOAD_EXP_ROM:
case MBX_BEACON:
case MBX_READ_RPI:
case MBX_READ_RPI64:
case MBX_REG_VPI:
case MBX_UNREG_VPI:
case MBX_CONFIG_HBQ:
case MBX_ASYNC_EVENT:
case MBX_HEARTBEAT:
break;
case MBX_CONFIG_MSIX:
break;
case MBX_READ_SPARM: /* a READ SPARAM command completed */
case MBX_READ_SPARM64: /* a READ SPARAM command completed */
{
if (mp) {
sizeof (SERV_PARM));
sizeof (NAME_TYPE));
sizeof (NAME_TYPE));
/* Initialize the physical port */
sizeof (SERV_PARM));
/* Initialize the virtual ports */
for (i = 1; i < MAX_VPORTS; i++) {
continue;
}
sizeof (SERV_PARM));
sizeof (NAME_TYPE));
sizeof (NAME_TYPE));
}
}
break;
}
case MBX_REG_LOGIN:
case MBX_REG_LOGIN64:
if (!mp) {
break;
}
#ifdef SLI3_SUPPORT
#endif /* SLI3_SUPPORT */
/* First copy command data */
if (!ndlp) {
/* Attempt to create a node */
sizeof (SERV_PARM));
sizeof (NAME_TYPE));
sizeof (NAME_TYPE));
/* Add the node */
/* Open the node */
} else {
"Unable to allocate node. did=%06x rpi=%x "
"wwpn=%02x%02x%02x%02x%02x%02x%02x%02x",
break;
}
} else {
sizeof (SERV_PARM));
sizeof (NAME_TYPE));
sizeof (NAME_TYPE));
"node=%p did=%06x rpi=%x wwpn="
"%02x%02x%02x%02x%02x%02x%02x%02x",
/* Open the node */
}
/* If this was a fabric login */
/*
* If CLEAR_LA has been sent, then attempt to
* register the vpi now
*/
(void) emlxs_mb_reg_vpi(port);
}
#ifdef SLI3_SUPPORT
/*
* If NPIV Fabric support has just been established
* on the physical port, then notify the vports of
* the link up
*/
if ((lvpi == 0) &&
/* Skip the physical port */
for (i = 1; i < MAX_VPORTS; i++) {
continue;
}
}
}
#endif /* SLI3_SUPPORT */
}
#ifdef NPIV_SUPPORT
}
#endif /* NPIV_SUPPORT */
#ifdef DHCHAP_SUPPORT
/*
* Auth started - auth completion will handle
* sbp and ubp now
*/
}
}
#endif /* DHCHAP_SUPPORT */
#ifdef SFCT_SUPPORT
}
}
#endif /* SFCT_SUPPORT */
break;
case MBX_READ_LA:
case MBX_READ_LA64:
if (mp) {
} else {
}
"type=%s tag=%d -> %d ALPA=%x",
"LinkUp" : "LinkDown"),
} else {
}
/* Declare link down here */
}
}
/* If link not already up then declare it up now */
/* Save the linkspeed */
/*
* Check for old model adapters that only
* supported 1Gb
*/
}
} else {
}
if (i == 0) {
} else {
uint32_t j;
/*
* Check number of devices in
* map
*/
}
"alpa_map: %d device(s): %02x "
"%02x %02x %02x %02x %02x %02x",
"alpa_map: %02x %02x %02x "
"%02x %02x %02x %02x %02x",
alpa_map[j],
alpa_map[j + 1],
alpa_map[j + 2],
alpa_map[j + 3],
alpa_map[j + 4],
alpa_map[j + 5],
alpa_map[j + 6],
alpa_map[j + 7]);
}
}
}
#ifdef MENLO_SUPPORT
/* Check if Menlo maintenance mode is enabled */
"Maintenance Mode enabled.");
} else {
"Maintenance Mode disabled.");
}
/* Check FCoE attention bit */
(void) thread_create(NULL, 0,
(char *)hba, 0,
v.v_maxsyspri - 2);
}
}
#endif /* MENLO_SUPPORT */
/*
* This should turn on DELAYED ABTS
* for ELS timeouts
*/
0x00052198, 0x1);
}
/*
* If link not already down then
* declare it down now
*/
if (emlxs_mb_read_sparam(hba,
} else {
}
}
}
/* Declare the linkup here */
}
/* If link not already down then declare it down now */
/* Declare link down here */
}
/* Enable Link attention interrupt */
/*
* hba->hc_copy = READ_CSR_REG(hba,
* FC_HC_REG(hba, hba->csr_addr));
*/
}
/* Log the link event */
break;
case MBX_CLEAR_LA:
/* Enable on Link Attention interrupts */
/*
* hba->hc_copy = READ_CSR_REG(hba, FC_HC_REG(hba,
* hba->csr_addr));
*/
}
}
/* Adapter is now ready for FCP traffic */
/* Register vpi's for all ports that have did's */
for (i = 0; i < MAX_VPORTS; i++) {
continue;
}
(void) emlxs_mb_reg_vpi(vport);
}
/* Attempt to send any pending IO */
}
break;
default:
break;
}
return (0);
} /* emlxs_mb_handle_cmd() */
/* MBX_NOWAIT - returns MBX_BUSY or MBX_SUCCESS or MBX_HARDWARE_ERROR */
/* MBX_WAIT - returns MBX_TIMEOUT or mailbox_status */
/* MBX_SLEEP - returns MBX_TIMEOUT or mailbox_status */
/* MBX_POLL - returns MBX_TIMEOUT or mailbox_status */
extern uint32_t
{
/* Check for minimum timeouts */
switch (mb->mbxCommand) {
case MBX_DOWN_LOAD:
case MBX_UPDATE_CFG:
case MBX_LOAD_AREA:
case MBX_LOAD_EXP_ROM:
case MBX_WRITE_NV:
case MBX_FLASH_WR_ULA:
case MBX_DEL_LD_ENTRY:
case MBX_LOAD_SM:
if (tmo < 300) {
tmo = 300;
}
break;
default:
if (tmo < 30) {
tmo = 30;
}
break;
}
/* Adjust wait flag */
if (flag != MBX_NOWAIT) {
/* If interrupt is enabled, use sleep, otherwise poll */
} else {
}
}
/* Check for hardware error */
"Hardware error reported. %s failed. status=%x mb=%p",
return (MBX_HARDWARE_ERROR);
}
if (hba->mbox_queue_flag) {
/* If we are not polling, then queue it for later */
if (flag == MBX_NOWAIT) {
"Busy. %s: mb=%p NoWait.",
return (MBX_BUSY);
}
/* millisecond tics */
while (hba->mbox_queue_flag) {
if (tmo_local-- == 0) {
"Timeout. %s: mb=%p tmo=%d Waiting.",
tmo);
/* Non-lethalStatus mailbox timeout */
/* Does not indicate a hardware error */
return (MBX_TIMEOUT);
}
DELAYMS(50);
}
}
/* Initialize mailbox area */
switch (flag) {
case MBX_NOWAIT:
"Sending. %s: mb=%p NoWait.",
}
break;
case MBX_SLEEP:
"Sending. %s: mb=%p Sleep.",
break;
case MBX_POLL:
"Sending. %s: mb=%p Polled.",
break;
}
/* Clear the attention bit */
/* First copy command data */
#ifdef MBOX_EXT_SUPPORT
hba->mbox_ext_size);
}
#endif /* MBOX_EXT_SUPPORT */
}
/* Check for config port command */
/* copy command data into host mbox for cmpl */
/* First copy command data */
(MAILBOX_CMD_WSIZE - 1));
/* copy over last word, with mbxOwner set */
/* switch over to host mailbox */
/*
* hba->mbox_queueaddr = (uint32_t *)&((SLIM2 *)
* hba->slim2.virt)->mbx;
*/
} else { /* SLIM 1 */
#ifdef MBOX_EXT_SUPPORT
}
#endif /* MBOX_EXT_SUPPORT */
/* First copy command data */
(MAILBOX_CMD_WSIZE - 1));
/* copy over last word, with mbxOwner set */
}
/* Interrupt board to do it right away */
switch (flag) {
case MBX_NOWAIT:
return (MBX_SUCCESS);
case MBX_SLEEP:
/* Wait for completion */
/* The driver clock is timing the mailbox. */
/* emlxs_mb_fini() will be called externally. */
}
"Timeout. %s: mb=%p tmo=%d. Sleep.",
} else {
"Completed. %s: mb=%p status=%x Sleep.",
}
break;
case MBX_POLL:
/* tics */
/* Wait for command to complete */
/* self time */
"Mailbox Timeout: %s: mb=%p Polled",
mb);
break;
}
DELAYUS(500);
}
"Timeout. %s: mb=%p tmo=%d. Polled.",
tmo);
break;
}
}
/* Get first word of mailbox */
sizeof (uint32_t), DDI_DMA_SYNC_FORKERNEL);
} else {
}
/* Wait for command to complete */
/* self time */
"Mailbox Timeout: %s: mb=%p Polled.",
break;
}
DELAYUS(500);
/* Get first word of mailbox */
sizeof (uint32_t), DDI_DMA_SYNC_FORKERNEL);
} else {
}
} /* while */
"Timeout. %s: mb=%p tmo=%d. Polled.",
break;
}
/* copy results back to user */
} else {
}
#ifdef MBOX_EXT_SUPPORT
hba->mbox_ext_size);
} else {
}
}
#endif /* MBOX_EXT_SUPPORT */
/* Sync the memory buffer */
}
"Completed. %s: mb=%p status=%x Polled.",
/* Process the result */
}
/* Clear the attention bit */
/* Clean up the mailbox area */
break;
} /* switch (flag) */
} /* emlxs_mb_issue_cmd() */
extern char *
{
static char buffer[32];
uint32_t i;
for (i = 0; i < count; i++) {
return (emlxs_mb_cmd_table[i].string);
}
}
return (buffer);
} /* emlxs_mb_cmd_xlate() */