e1000_nvm.c revision bd9f6899328e19cbb74e3ad02f5c32002285887e
/*
* This file is provided under a CDDLv1 license. When using or
* redistributing this file, you may do so under this license.
* In redistributing this file this license must be included
* and no other modification of this header file is permitted.
*
* CDDL LICENSE SUMMARY
*
* Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
*
* The contents of this file are subject to the terms of Version
* 1.0 of the Common Development and Distribution License (the "License").
*
* You should have received a copy of the License with this software.
* You can obtain a copy of the License at
* See the License for the specific language governing permissions
* and limitations under the License.
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms of the CDDLv1.
*/
/*
* IntelVersion: 1.49 v3-1-10-1_2009-9-18_Release14-6
*/
#include "e1000_api.h"
/*
* e1000_init_nvm_ops_generic - Initialize NVM function pointers
* @hw: pointer to the HW structure
*
* Setups up the function pointers to no-op functions
*/
void
{
DEBUGFUNC("e1000_init_nvm_ops_generic");
/* Initialize function pointers */
}
/*
* e1000_null_nvm_read - No-op function, return 0
* @hw: pointer to the HW structure
*/
{
DEBUGFUNC("e1000_null_read_nvm");
UNREFERENCED_4PARAMETER(hw, a, b, c);
return (E1000_SUCCESS);
}
/*
* e1000_null_nvm_generic - No-op function, return void
* @hw: pointer to the HW structure
*/
void
{
DEBUGFUNC("e1000_null_nvm_generic");
}
/*
* e1000_null_led_default - No-op function, return 0
* @hw: pointer to the HW structure
*/
{
DEBUGFUNC("e1000_null_led_default");
return (E1000_SUCCESS);
}
/*
* e1000_null_write_nvm - No-op function, return 0
* @hw: pointer to the HW structure
*/
{
DEBUGFUNC("e1000_null_write_nvm");
UNREFERENCED_4PARAMETER(hw, a, b, c);
return (E1000_SUCCESS);
}
/*
* e1000_raise_eec_clk - Raise EEPROM clock
* @hw: pointer to the HW structure
* @eecd: pointer to the EEPROM
*
*/
static void
{
}
/*
* e1000_lower_eec_clk - Lower EEPROM clock
* @hw: pointer to the HW structure
* @eecd: pointer to the EEPROM
*
*/
static void
{
}
/*
* e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
* @hw: pointer to the HW structure
* @data: data to send to the EEPROM
* @count: number of bits to shift out
*
* We need to shift 'count' bits out to the EEPROM. So, the value in the
* "data" parameter will be shifted out to the EEPROM one bit at a time.
* In order to do this, "data" must be broken down into bits.
*/
static void
{
DEBUGFUNC("e1000_shift_out_eec_bits");
eecd &= ~E1000_EECD_DO;
eecd |= E1000_EECD_DO;
do {
eecd &= ~E1000_EECD_DI;
eecd |= E1000_EECD_DI;
mask >>= 1;
} while (mask);
eecd &= ~E1000_EECD_DI;
}
/*
* e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
* @hw: pointer to the HW structure
* @count: number of bits to shift in
*
* In order to read a register from the EEPROM, we need to shift 'count' bits
* in from the EEPROM. Bits are "shifted in" by raising the clock input to
* the EEPROM (setting the SK bit), and then reading the value of the data out
* "DO" bit. During this "shifting in" process the data in "DI" bit should
* always be clear.
*/
static u16
{
u32 i;
DEBUGFUNC("e1000_shift_in_eec_bits");
data = 0;
for (i = 0; i < count; i++) {
data <<= 1;
eecd &= ~E1000_EECD_DI;
if (eecd & E1000_EECD_DO)
data |= 1;
}
return (data);
}
/*
* @hw: pointer to the HW structure
* @ee_reg: EEPROM flag for polling
*
* Polls the EEPROM status bit for either read or write completion based
* upon the value of 'ee_reg'.
*/
{
DEBUGFUNC("e1000_poll_eerd_eewr_done");
for (i = 0; i < attempts; i++) {
if (ee_reg == E1000_NVM_POLL_READ)
else
if (reg & E1000_NVM_RW_REG_DONE) {
break;
}
usec_delay(5);
}
return (ret_val);
}
/*
* e1000_acquire_nvm_generic - Generic request for access to EEPROM
* @hw: pointer to the HW structure
*
* Set the EEPROM access request bit and wait for EEPROM access grant bit.
* Return successful if access grant bit set, else clear the request for
* EEPROM access and return -E1000_ERR_NVM (-1).
*/
{
DEBUGFUNC("e1000_acquire_nvm_generic");
while (timeout) {
if (eecd & E1000_EECD_GNT)
break;
usec_delay(5);
timeout--;
}
if (!timeout) {
eecd &= ~E1000_EECD_REQ;
DEBUGOUT("Could not acquire NVM grant\n");
ret_val = -E1000_ERR_NVM;
}
return (ret_val);
}
/*
* e1000_standby_nvm - Return EEPROM to standby state
* @hw: pointer to the HW structure
*
* Return the EEPROM to a standby state.
*/
static void
{
DEBUGFUNC("e1000_standby_nvm");
/* Select EEPROM */
eecd |= E1000_EECD_CS;
/* Toggle CS to flush commands */
eecd |= E1000_EECD_CS;
eecd &= ~E1000_EECD_CS;
}
}
/*
* e1000_stop_nvm - Terminate EEPROM command
* @hw: pointer to the HW structure
*
* Terminates the current command by inverting the EEPROM's chip select pin.
*/
void
{
DEBUGFUNC("e1000_stop_nvm");
/* Pull CS high */
eecd |= E1000_EECD_CS;
/* CS on Microwire is active-high */
}
}
/*
* e1000_release_nvm_generic - Release exclusive access to EEPROM
* @hw: pointer to the HW structure
*
* Stop any current commands to the EEPROM and clear the EEPROM request bit.
*/
void
{
DEBUGFUNC("e1000_release_nvm_generic");
eecd &= ~E1000_EECD_REQ;
}
/*
* @hw: pointer to the HW structure
*
* Setups the EEPROM for reading and writing.
*/
static s32
{
DEBUGFUNC("e1000_ready_nvm_eeprom");
/* Clear SK and DI */
/* Set CS */
eecd |= E1000_EECD_CS;
/* Clear SK and CS */
usec_delay(1);
/*
* Read "Status Register" repeatedly until the LSB is cleared.
* The EEPROM will signal that the command has been completed
* by clearing bit 0 of the internal status register. If it's
* not cleared within 'timeout', then error out.
*/
while (timeout) {
if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
break;
usec_delay(5);
timeout--;
}
if (!timeout) {
DEBUGOUT("SPI NVM Status error\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
}
out:
return (ret_val);
}
/*
* e1000_read_nvm_spi - Read EEPROM's using SPI
* @hw: pointer to the HW structure
* @offset: offset of word in the EEPROM to read
* @words: number of words to read
* @data: word read from the EEPROM
*
* Reads a 16 bit word from the EEPROM.
*/
{
u32 i = 0;
DEBUGFUNC("e1000_read_nvm_spi");
/*
* A check for invalid values: offset too large, too many words, and
* not enough words.
*/
(words == 0)) {
DEBUGOUT("nvm parameter(s) out of bounds\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
if (ret_val)
goto out;
if (ret_val)
goto release;
/* Send the READ command (opcode + addr) */
/*
* Read the data. SPI NVMs increment the address with each byte read
* and will roll over if reading beyond the end. This allows us to
* read the whole NVM from any offset
*/
for (i = 0; i < words; i++) {
}
out:
return (ret_val);
}
/*
* e1000_read_nvm_microwire - Reads EEPROM's using microwire
* @hw: pointer to the HW structure
* @offset: offset of word in the EEPROM to read
* @words: number of words to read
* @data: word read from the EEPROM
*
* Reads a 16 bit word from the EEPROM.
*/
{
u32 i = 0;
DEBUGFUNC("e1000_read_nvm_microwire");
/*
* A check for invalid values: offset too large, too many words, and
* not enough words.
*/
(words == 0)) {
DEBUGOUT("nvm parameter(s) out of bounds\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
if (ret_val)
goto out;
if (ret_val)
goto release;
for (i = 0; i < words; i++) {
/* Send the READ command (opcode + addr) */
nvm->address_bits);
/*
* Read the data. For microwire, each word requires the
* overhead of setup and tear-down.
*/
}
out:
return (ret_val);
}
/*
* e1000_read_nvm_eerd - Reads EEPROM using EERD register
* @hw: pointer to the HW structure
* @offset: offset of word in the EEPROM to read
* @words: number of words to read
* @data: word read from the EEPROM
*
* Reads a 16 bit word from the EEPROM using the EERD register.
*/
{
DEBUGFUNC("e1000_read_nvm_eerd");
/*
* A check for invalid values: offset too large, too many words,
* too many words for the offset, and not enough words.
*/
(words == 0)) {
DEBUGOUT("nvm parameter(s) out of bounds\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
for (i = 0; i < words; i++) {
if (ret_val)
break;
}
out:
return (ret_val);
}
/*
* e1000_write_nvm_spi - Write to EEPROM using SPI
* @hw: pointer to the HW structure
* @offset: offset within the EEPROM to be written to
* @words: number of words to write
* @data: 16 bit word(s) to be written to the EEPROM
*
* Writes data to EEPROM at offset using SPI interface.
*
* If e1000_update_nvm_checksum is not called after this function , the
* EEPROM will most likely contain an invalid checksum.
*/
{
DEBUGFUNC("e1000_write_nvm_spi");
/*
* A check for invalid values: offset too large, too many words, and
* not enough words.
*/
(words == 0)) {
DEBUGOUT("nvm parameter(s) out of bounds\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
if (ret_val)
goto out;
if (ret_val)
goto release;
/* Send the WRITE ENABLE command (8 bit opcode) */
nvm->opcode_bits);
/*
* Some SPI eeproms use the 8th address bit embedded in the
* opcode
*/
/* Send the Write command (8-bit opcode + addr) */
nvm->address_bits);
/* Loop to allow for up to whole page write of eeprom */
widx++;
break;
}
}
}
msec_delay(10);
out:
return (ret_val);
}
/*
* e1000_write_nvm_microwire - Writes EEPROM using microwire
* @hw: pointer to the HW structure
* @offset: offset within the EEPROM to be written to
* @words: number of words to write
* @data: 16 bit word(s) to be written to the EEPROM
*
* Writes data to EEPROM at offset using microwire interface.
*
* If e1000_update_nvm_checksum is not called after this function , the
* EEPROM will most likely contain an invalid checksum.
*/
{
u16 words_written = 0;
DEBUGFUNC("e1000_write_nvm_microwire");
/*
* A check for invalid values: offset too large, too many words, and
* not enough words.
*/
(words == 0)) {
DEBUGOUT("nvm parameter(s) out of bounds\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
if (ret_val)
goto out;
if (ret_val)
goto release;
while (words_written < words) {
nvm->opcode_bits);
nvm->address_bits);
if (eecd & E1000_EECD_DO)
break;
usec_delay(50);
}
if (widx == 200) {
DEBUGOUT("NVM Write did not complete\n");
ret_val = -E1000_ERR_NVM;
goto release;
}
}
out:
return (ret_val);
}
/*
* e1000_read_pba_num_generic - Read device part number
* @hw: pointer to the HW structure
* @pba_num: pointer to device part number
*
* Reads the product board assembly (PBA) number from the EEPROM and stores
* the value in pba_num.
*/
{
DEBUGFUNC("e1000_read_pba_num_generic");
if (ret_val) {
DEBUGOUT("NVM Read Error\n");
goto out;
}
if (ret_val) {
DEBUGOUT("NVM Read Error\n");
goto out;
}
out:
return (ret_val);
}
/*
* e1000_read_mac_addr_generic - Read device MAC address
* @hw: pointer to the HW structure
*
* Reads the device MAC address from the EEPROM and stores the value.
* Since devices with two ports use the same EEPROM, we increment the
* last bit in the MAC address for the second port.
*/
{
u16 i;
for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
for (i = 0; i < ETH_ADDR_LEN; i++)
return (E1000_SUCCESS);
}
/*
* e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
* @hw: pointer to the HW structure
*
* and then verifies that the sum of the EEPROM is equal to 0xBABA.
*/
{
DEBUGFUNC("e1000_validate_nvm_checksum_generic");
for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
if (ret_val) {
DEBUGOUT("NVM Read Error\n");
goto out;
}
}
DEBUGOUT("NVM Checksum Invalid\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
out:
return (ret_val);
}
/*
* e1000_update_nvm_checksum_generic - Update EEPROM checksum
* @hw: pointer to the HW structure
*
* up to the checksum. Then calculates the EEPROM checksum and writes the
* value to the EEPROM.
*/
{
DEBUGFUNC("e1000_update_nvm_checksum");
for (i = 0; i < NVM_CHECKSUM_REG; i++) {
if (ret_val) {
DEBUGOUT("NVM Read Error while updating checksum.\n");
goto out;
}
}
if (ret_val)
DEBUGOUT("NVM Write Error while updating checksum.\n");
out:
return (ret_val);
}
/*
* e1000_reload_nvm_generic - Reloads EEPROM
* @hw: pointer to the HW structure
*
* Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
* extended control register.
*/
void
{
DEBUGFUNC("e1000_reload_nvm_generic");
usec_delay(10);
}