adapter.h revision 56b2bdd1f04d465cfe4a95b88ae5cba5884154e4
/*
* This file and its contents are supplied under the terms of the
* Common Development and Distribution License ("CDDL"), version 1.0.
* You may only use this file in accordance with the terms of version
* 1.0 of the CDDL.
*
* A full copy of the text of the CDDL should have accompanied this
* source. A copy of the CDDL is also available via the Internet at
*/
/*
* This file is part of the Chelsio T4 support code.
*
* Copyright (C) 2011-2013 Chelsio Communications. All rights reserved.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this
* release for licensing terms and conditions.
*/
#ifndef __CXGBE_ADAPTER_H
#define __CXGBE_ADAPTER_H
#include <sys/mac_provider.h>
#include <sys/ethernet.h>
#include "offload.h"
#include "firmware/t4fw_interface.h"
struct adapter;
enum {
FW_IQ_QSIZE = 256,
RX_IQ_QSIZE = 1024,
FL_BUF_SIZES = 4,
CTRL_EQ_QSIZE = 128,
TX_EQ_QSIZE = 1024,
TX_SGL_SEGS = 36,
};
enum {
/* adapter flags */
FULL_INIT_DONE = (1 << 0),
/* port flags */
DOOMED = (1 << 0),
};
enum {
/* Features */
CXGBE_HW_LSO = (1 << 0),
};
struct port_info {
#ifndef TCP_OFFLOAD_DISABLE
void *tdev;
#endif
unsigned int flags;
#ifndef TCP_OFFLOAD_DISABLE
#endif
struct link_config link_cfg;
struct port_stats stats;
};
struct fl_sdesc {
};
struct tx_desc {
};
/* DMA maps used for tx */
struct tx_maps {
};
struct tx_sdesc {
mblk_t *m;
};
enum {
/* iq flags */
/* iq state */
IQS_DISABLED = 0,
IQS_BUSY = 1,
IQS_IDLE = 2,
};
/*
* Ingress Queue: T4 is producer, driver is consumer.
*/
struct sge_iq {
unsigned int flags;
};
enum {
EQ_CTRL = 1,
EQ_ETH = 2,
#ifndef TCP_OFFLOAD_DISABLE
EQ_OFLD = 3,
#endif
/* eq flags */
};
/*
* Egress Queue: driver is producer, T4 is consumer.
*
* Note: A free list is an egress queue (driver produces the buffers and T4
* consumes them) but it's special enough to have its own struct (see sge_fl).
*/
struct sge_eq {
unsigned int flags;
};
enum {
/* fl flags */
};
struct sge_fl {
unsigned int flags;
};
/* txq: SGE egress queue + miscellaneous items */
struct sge_txq {
/* DMA handles used for tx */
/* Copy buffers for tx */
/* stats for common events first */
/* stats for not-that-common events */
};
/* rxq: SGE ingress queue + SGE free list + miscellaneous items */
struct sge_rxq {
/* stats for common events first */
/* stats for not-that-common events */
};
#ifndef TCP_OFFLOAD_DISABLE
/* ofld_rxq: SGE ingress queue + SGE free list + miscellaneous items */
struct sge_ofld_rxq {
};
/*
* wrq: SGE egress queue that is given prebuilt work requests. Both the control
* and offload tx queues are of this type.
*/
struct sge_wrq {
/* List of WRs held up due to lack of tx descriptors */
/* stats for common events first */
/* stats for not-that-common events */
};
#endif
struct sge {
int fl_starve_threshold;
int nrxq; /* total rx queues (all ports and the rest) */
int ntxq; /* total tx queues (all ports and the rest) */
#ifndef TCP_OFFLOAD_DISABLE
int nofldrxq; /* total # of TOE rx queues */
int nofldtxq; /* total # of TOE tx queues */
#endif
int niq; /* total ingress queues */
int neq; /* total egress queues */
#ifndef TCP_OFFLOAD_DISABLE
#endif
int eq_start;
/* Device access and DMA attributes for all the descriptor rings */
/* Device access and DMA attributes for tx buffers */
/* Device access and DMA attributes for rx buffers are in rxb_params */
struct rxbuf_cache_params rxb_params;
};
struct driver_properties {
/* There is a driver.conf variable for each of these */
int max_ntxq_10g;
int max_nrxq_10g;
int max_ntxq_1g;
int max_nrxq_1g;
#ifndef TCP_OFFLOAD_DISABLE
int max_nofldtxq_10g;
int max_nofldrxq_10g;
int max_nofldtxq_1g;
int max_nofldrxq_1g;
#endif
int intr_types;
int tmr_idx_10g;
int pktc_idx_10g;
int tmr_idx_1g;
int pktc_idx_1g;
int qsize_txq;
int qsize_rxq;
int timer_val[SGE_NTIMERS];
int counter_val[SGE_NCOUNTERS];
};
struct rss_header;
mblk_t *);
struct adapter {
unsigned int pf;
unsigned int mbox;
/* PCI config space access handle */
/* MMIO register access handle */
/* Interrupt information */
int intr_type;
int intr_count;
int intr_cap;
struct driver_properties props;
int open_device_map;
int flags;
unsigned int cfcsum;
struct adapter_params params;
struct t4_virt_res vres;
#ifndef TCP_OFFLOAD_DISABLE
struct tom_tunables tt;
#endif
#ifndef TCP_OFFLOAD_DISABLE
int offload_map;
#endif
/* Starving free lists */
};
enum {
NIC_H = 0,
IW_H,
};
/* One for errors, one for firmware events */
#define T4_EXTRA_INTR 2
/* adapter.c */
/* t4_nexus.c */
/* t4_sge.c */
int flags);
/* t4_mac.c */
/* t4_ioctl.c */
#endif /* __CXGBE_ADAPTER_H */