cpudrv.c revision fcddbe1ff917b2a8770cd3575f46e72601a06df6
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* CPU Device driver. The driver is not DDI-compliant.
*
* The driver supports following features:
* - Power management.
*/
#include <sys/machsystm.h>
#include <sys/cpudrv_mach.h>
/*
* CPU power management
*
* The supported power saving model is to slow down the CPU (on SPARC by
* dividing the CPU clock and on x86 by dropping down a P-state).
* Periodically we determine the amount of time the CPU is running
* idle thread and threads in user mode during the last quantum. If the idle
* thread was running less than its low water mark for current speed for
* number of consecutive sampling periods, or number of running threads in
* user mode are above its high water mark, we arrange to go to the higher
* speed. If the idle thread was running more than its high water mark without
* dropping a number of consecutive times below the mark, and number of threads
* running in user mode are below its low water mark, we arrange to go to the
* next lower speed. While going down, we go through all the speeds. While
* going up we go to the maximum speed to minimize impact on the user, but have
* provisions in the driver to go to other speeds.
*
* The driver does not have knowledge of a particular implementation of this
* scheme and will work with all CPUs supporting this model. On SPARC, the
* driver determines supported speeds by looking at 'clock-divisors' property
* created by OBP. On x86, the driver retrieves the supported speeds from
* ACPI.
*/
/*
* Configuration function prototypes and data structures
*/
struct dev_ops cpudrv_ops = {
DEVO_REV, /* rev */
0, /* refcnt */
nodev, /* getinfo */
nulldev, /* identify */
nulldev, /* probe */
cpudrv_attach, /* attach */
cpudrv_detach, /* detach */
nodev, /* reset */
cpudrv_power, /* power */
ddi_quiesce_not_needed, /* quiesce */
};
&mod_driverops, /* modops */
"CPU Driver", /* linkinfo */
&cpudrv_ops, /* dev_ops */
};
static struct modlinkage modlinkage = {
MODREV_1, /* rev */
&modldrv, /* linkage */
};
/*
* Function prototypes
*/
static void cpudrv_pm_monitor_disp(void *arg);
static void cpudrv_pm_monitor(void *arg);
/*
* Driver global variables
*/
uint_t cpudrv_debug = 0;
void *cpudrv_state;
/*
* cpudrv_direct_pm allows user applications to directly control the
* power state transitions (direct pm) without following the normal
* direct pm protocol. This is needed because the normal protocol
* requires that a device only be lowered when it is idle, and be
* brought up when it request to do so by calling pm_raise_power().
* Ignoring this protocol is harmless for CPU (other than speed).
* Moreover it might be the case that CPU is never idle or wants
* to be at higher speed because of the addition CPU cycles required
* to run the user application.
*
* framework will ignore this information for direct pm devices and not
* try to bring them down when idle, user applications can still use this
* information if they wants.
*
* In the future, provide an ioctl to control setting of this mode. In
* that case, this variable should move to the state structure and
* be protected by the lock in the state structure.
*/
int cpudrv_direct_pm = 0;
/*
* Arranges for the handler function to be called at the interval suitable
* for current speed.
*/
#define CPUDRV_PM_MONITOR_INIT(cpudsp) { \
if (CPUDRV_PM_POWER_ENABLED(cpudsp)) { \
} \
}
/*
* Arranges for the handler function not to be called back.
*/
#define CPUDRV_PM_MONITOR_FINI(cpudsp) { \
if (tmp_tid != 0) { \
} \
}
int
_init(void)
{
int error;
sizeof (cpudrv_devstate_t), 0)) != 0) {
return (error);
}
}
/*
* Callbacks used by the PPM driver.
*/
return (error);
}
int
_fini(void)
{
int error;
}
return (error);
}
int
{
}
/*
* Driver attach(9e) entry point.
*/
static int
{
int instance;
extern pri_t maxclsyspri;
switch (cmd) {
case DDI_ATTACH:
"DDI_ATTACH called\n", instance));
if (CPUDRV_PM_DISABLED())
return (DDI_FAILURE);
DDI_SUCCESS) {
"can't allocate state", instance);
return (DDI_FAILURE);
}
NULL) {
"can't get state", instance);
return (DDI_FAILURE);
}
/*
* Find CPU number for this dev_info node.
*/
"can't convert dip to cpu_id", instance);
return (DDI_FAILURE);
}
if (!cpudrv_mach_pm_init(cpudsp)) {
return (DDI_FAILURE);
}
if (CPUDRV_PM_POWER_ENABLED(cpudsp)) {
return (DDI_FAILURE);
}
return (DDI_FAILURE);
}
return (DDI_FAILURE);
}
/*
* Taskq is used to dispatch routine to monitor CPU
* activities.
*/
"cpudrv_pm_monitor",
MUTEX_DRIVER, NULL);
CV_DEFAULT, NULL);
/*
* Driver needs to assume that CPU is running at
* unknown speed at DDI_ATTACH and switch it to the
* needed speed. We assume that initial needed speed
* is full speed for us.
*/
/*
* We need to take the lock because cpudrv_pm_monitor()
* will start running in parallel with attach().
*/
/*
* We don't call pm_raise_power() directly from attach
* because driver attach for a slave CPU node can
* happen before the CPU is even initialized. We just
* start the monitoring system which understands
* unknown speed and moves CPU to top speed when it
* has been initialized.
*/
}
return (DDI_SUCCESS);
case DDI_RESUME:
"DDI_RESUME called\n", instance));
/*
* Nothing to do for resume, if not doing active PM.
*/
if (!CPUDRV_PM_POWER_ENABLED(cpudsp))
return (DDI_SUCCESS);
/*
* Driver needs to assume that CPU is running at unknown speed
* at DDI_RESUME and switch it to the needed speed. We assume
* that the needed speed is full speed for us.
*/
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
/*
* Driver detach(9e) entry point.
*/
static int
{
int instance;
switch (cmd) {
case DDI_DETACH:
"DDI_DETACH called\n", instance));
/*
* If the only thing supported by the driver is power
* management, we can in future enhance the driver and
* framework that loads it to unload the driver when
* user has disabled CPU power management.
*/
return (DDI_FAILURE);
case DDI_SUSPEND:
"DDI_SUSPEND called\n", instance));
/*
* Nothing to do for suspend, if not doing active PM.
*/
if (!CPUDRV_PM_POWER_ENABLED(cpudsp))
return (DDI_SUCCESS);
/*
* During a checkpoint-resume sequence, framework will
* stop interrupts to quiesce kernel activity. This will
* leave our monitoring system ineffective. Handle this
* by stopping our monitoring system and bringing CPU
* to full speed. In case we are in special direct pm
* mode, we leave the CPU at whatever speed it is. This
* is harmless other than speed.
*/
"cur_spd %d, topspeed %d\n", instance,
CPUDRV_PM_TOPSPEED(cpupm))) {
== DDI_SUCCESS)) {
cpupm->pm_busycnt++;
} else {
"instance %d: can't busy CPU "
"component", instance);
return (DDI_FAILURE);
}
}
DDI_SUCCESS) {
"can't raise CPU power level to %d",
return (DDI_FAILURE);
} else {
return (DDI_SUCCESS);
}
} else {
return (DDI_SUCCESS);
}
default:
return (DDI_FAILURE);
}
}
/*
* Driver power(9e) entry point.
*
* Driver's notion of current power is set *only* in power(9e) entry point
* after actual power change operation has been successfully completed.
*/
/* ARGSUSED */
static int
{
int instance;
int ret;
instance);
return (DDI_FAILURE);
}
/*
* In normal operation, we fail if we are busy and request is
* to lower the power level. We let this go through if the driver
* is in special direct pm mode. On x86, we also let this through
* if the change is due to a request to govern the max speed.
*/
return (DDI_FAILURE);
}
}
break;
}
if (!new_spd) {
"can't locate new CPU speed", instance);
return (DDI_FAILURE);
}
/*
* We currently refuse to power manage if the CPU is not ready to
* take cross calls (cross calls fail silently if CPU is not ready
* for it).
*
* Additionally, for x86 platforms we cannot power manage
* any one instance, until all instances have been initialized.
* That's because we don't know what the CPU domains look like
* until all instances have been initialized.
*/
if (!is_ready) {
"CPU not ready for x-calls\n", instance));
} else if (!(is_ready = cpudrv_pm_power_ready())) {
"waiting for all CPUs to be power manageable\n", instance));
}
if (!is_ready) {
return (DDI_FAILURE);
}
/*
* Execute CPU specific routine on the requested CPU to change its
* speed to normal-speed/divisor.
*/
"return = %d", ret);
return (DDI_FAILURE);
}
/*
* DTrace probe point for CPU speed change transition
*/
/*
* Reset idle threshold time for the new power level.
*/
DDI_SUCCESS) {
cpupm->pm_busycnt--;
} else
}
/*
* Reset various parameters because we are now running at new speed.
*/
cpupm->lastquan_ticks = 0;
return (DDI_SUCCESS);
}
/*
* Initialize the field that will be used for reporting
* the supported_frequencies_Hz cpu_info kstat.
*/
static void
{
char *supp_freqs;
char *sfptr;
int i;
#define UINT64_MAX_STRING (sizeof ("18446744073709551615"))
speeds[i] =
}
KM_SLEEP);
sfptr = supp_freqs;
} else {
}
}
}
/*
* Initialize power management data.
*/
static int
{
int *speeds;
int idle_cnt_percent;
int user_cnt_percent;
int i;
if (nspeeds < 2) {
/* Need at least two speeds to power manage */
return (DDI_FAILURE);
}
/*
* Calculate the watermarks and other parameters based on the
* supplied speeds.
*
* One of the basic assumption is that for X amount of CPU work,
* if CPU is slowed down by a factor of N, the time it takes to
* do the same work will be N * X.
*
* The driver declares that a CPU is idle and ready for slowed down,
* if amount of idle thread is more than the current speed idle_hwm
* without dropping below idle_hwm a number of consecutive sampling
* intervals and number of running threads in user mode are below
* user_lwm. We want to set the current user_lwm such that if we
* just switched to the next slower speed with no change in real work
* load, the amount of user threads at the slower speed will be such
* that it falls below the slower speed's user_hwm. If we didn't do
* that then we will just come back to the higher speed as soon as we
* go down even with no change in work load.
* The user_hwm is a fixed precentage and not calculated dynamically.
*
* We bring the CPU up if idle thread at current speed is less than
* the current speed idle_lwm for a number of consecutive sampling
* intervals or user threads are above the user_hwm for the current
* speed.
*/
for (i = 0; i < nspeeds; i++) {
if (i == 0) { /* normal speed */
/* can't speed anymore */
} else {
/*
* Let's assume CPU is considered idle at full speed
* when it is spending I% of time in running the idle
* thread. At full speed, CPU will be busy (100 - I) %
* of times. This % of busyness increases by factor of
* N as CPU slows down. CPU that is idle I% of times
* in full speed, it is idle (100 - ((100 - I) * N)) %
* of times in N speed. The idle_lwm is a fixed
* percentage. A large value of N may result in
* idle_hwm to go below idle_lwm. We need to make sure
* that there is at least a buffer zone seperation
* between the idle_lwm and idle_hwm values.
*/
cpudrv_pm_idle_hwm, speeds, i);
/*
* The lwm for user threads are determined such that
* if CPU slows down, the load of work in the
* new speed would still keep the CPU at or below the
* user_hwm in the new speed. This is to prevent
* the quick jump back up to higher speed.
*/
cpudrv_pm_user_hwm, speeds, i);
}
}
/* Slowest speed. Can't slow down anymore */
#ifdef DEBUG
"down_spd spd %d, idle_hwm %d, user_lwm %d, "
"up_spd spd %d, idle_lwm %d, user_hwm %d, "
}
#endif /* DEBUG */
return (DDI_SUCCESS);
}
/*
* Free CPU power management data.
*/
static void
{
while (cur_spd) {
}
}
/*
* Create pm-components property.
*/
static int
{
char **pmc;
int size;
char name[] = "NAME=CPU Speed";
int i, j;
int result = DDI_FAILURE;
size = CPUDRV_PM_COMP_SIZE();
"number of speeds exceeded limits",
return (result);
}
if (comp_spd > CPUDRV_PM_COMP_MAX_VAL) {
"instance %d: speed exceeded limits",
}
sizeof (char *));
return (result);
}
"instance %d: pm-components power level %d string '%s'\n",
}
"pm-components component name '%s'\n",
} else {
"can't create pm-components property",
}
}
return (result);
}
/*
* Mark a component idle.
*/
DDI_SUCCESS) { \
"instance %d: pm_idle_component called\n", \
ddi_get_instance((dip)))); \
(cpupm)->pm_busycnt--; \
} else { \
"can't idle CPU component", \
ddi_get_instance((dip))); \
} \
} \
}
/*
* Marks a component busy in both PM framework and driver state structure.
*/
DDI_SUCCESS) { \
"instance %d: pm_busy_component called\n", \
ddi_get_instance((dip)))); \
(cpupm)->pm_busycnt++; \
} else { \
"can't busy CPU component", \
ddi_get_instance((dip))); \
} \
} \
}
/*
* Marks a component busy and calls pm_raise_power().
*/
/* \
* Mark driver and PM framework busy first so framework doesn't try \
* to bring CPU to lower speed when we need to be at higher speed. \
*/ \
(new_level))); \
DDI_SUCCESS) { \
} \
}
/*
* In order to monitor a CPU, we need to hold cpu_lock to access CPU
* statistics. Holding cpu_lock is not allowed from a callout routine.
* We dispatch a taskq to do that job.
*/
static void
cpudrv_pm_monitor_disp(void *arg)
{
/*
* We are here because the last task has scheduled a timeout.
* The queue should be empty at this time.
*/
TQ_NOSLEEP)) {
"dispatch the cpudrv_pm_monitor taskq\n"));
return;
}
}
/*
* Monitors each CPU for the amount of time idle thread was running in the
* last quantum and arranges for the CPU to go to the lower or higher speed.
* Called at the time interval appropriate for the current speed. The
* time interval for normal speed is CPUDRV_PM_QUANT_CNT_NORMAL. The time
* interval for other speeds (including unknown speed) is
* CPUDRV_PM_QUANT_CNT_OTHR.
*/
static void
cpudrv_pm_monitor(void *arg)
{
if (cpupm->timeout_id == 0) {
goto do_return;
}
/*
* We assume that a CPU is initialized and has a valid cpu_t
* structure, if it is ready for cross calls. If this changes,
* additional checks might be needed.
*
* Additionally, for x86 platforms we cannot power manage
* any one instance, until all instances have been initialized.
* That's because we don't know what the CPU domains look like
* until all instances have been initialized.
*/
if (!is_ready) {
} else if (!(is_ready = cpudrv_pm_power_ready())) {
"waiting for all CPUs to be power manageable\n",
ddi_get_instance(dip)));
}
if (!is_ready) {
/*
* Make sure that we are busy so that framework doesn't
* try to bring us down in this situation.
*/
goto do_return;
}
/*
* Make sure that we are still not at unknown power level.
*/
/*
* We just changed the speed. Wait till at least next
* call to this routine before proceeding ahead.
*/
goto do_return;
}
goto do_return;
}
if (!cpupm->pm_started) {
}
/*
* We can't do anything when we have just switched to a state
* because there is no valid timestamp.
*/
if (cpupm->lastquan_ticks == 0) {
goto do_return;
}
/*
* Various watermarks are based on this routine being called back
* exactly at the requested period. This is not guaranteed
* because this routine is called from a taskq that is dispatched
* from a timeout routine. Handle this by finding out how many
* ticks have elapsed since the last call and adjusting
* the idle_cnt based on the delay added to the requested period
* by timeout and taskq.
*/
/*
* Time taken between recording the current counts and
* arranging the next call of this routine is an error in our
* calculation. We minimize the error by calling
* CPUDRV_PM_MONITOR_INIT() here instead of end of this routine.
*/
"idle count %d, user count %d, system count %d, pm_level %d, "
#ifdef DEBUG
/*
* Notify that timeout and taskq has caused delays and we need to
* scale our parameters accordingly.
*
* To get accurate result, don't turn on other DPRINTFs with
* the following DPRINTF. PROM calls generated by other
* DPRINTFs changes the timing.
*/
"tick count %d > quantum_count %u\n",
}
#endif /* DEBUG */
/*
* Adjust counts based on the delay added by timeout and taskq.
*/
cur_spd->idle_blwm_cnt = 0;
cur_spd->idle_bhwm_cnt = 0;
/*
* In normal situation, arrange to go to next higher speed.
* If we are running in special direct pm mode, we just stay
* at the current speed.
*/
} else {
}
cur_spd->idle_blwm_cnt = 0;
cur_spd->idle_bhwm_cnt = 0;
/*
* Arrange to go to next lower speed by informing our idle
* status to the power management framework.
*/
} else {
/*
* If we are between the idle water marks and have not
* been here enough consecutive times to be considered
* busy, just increment the count and return.
*/
cur_spd->idle_blwm_cnt = 0;
cur_spd->idle_bhwm_cnt++;
goto do_return;
}
cur_spd->idle_blwm_cnt++;
cur_spd->idle_bhwm_cnt = 0;
}
/*
* Arranges to stay at the current speed.
*/
}
cpupm->timeout_count--;
}