cpqary3_ciss.h revision 80c94ecd7a524eb933a4bb221a9618b9dc490e76
/*
* This file and its contents are supplied under the terms of the
* Common Development and Distribution License ("CDDL"), version 1.0.
* You may only use this file in accordance with the terms of version
* 1.0 of the CDDL.
*
* A full copy of the text of the CDDL should have accompanied this
* source. A copy of the CDDL is also available via the Internet at
*/
/*
* Copyright (C) 2013 Hewlett-Packard Development Company, L.P.
*/
#ifndef _CPQARY3_CISS_H
#define _CPQARY3_CISS_H
#ifdef __cplusplus
extern "C" {
#endif
#define CISS_VERSION "1.00"
/* General Boundary Defintions */
/* Duration to Wait for the */
/* controller initialization */
/* between host implementations */
#define CISS_MAXSGENTRIES 64
#define CISS_MAXREPLYQS 256
/* Command Status Value */
#define CISS_CMD_SUCCESS 0x00
#define CISS_CMD_TARGET_STATUS 0x01
#define CISS_CMD_DATA_UNDERRUN 0x02
#define CISS_CMD_DATA_OVERRUN 0x03
#define CISS_CMD_INVALID 0x04
#define CISS_CMD_PROTOCOL_ERR 0x05
#define CISS_CMD_HARDWARE_ERR 0x06
#define CISS_CMD_CONNECTION_LOST 0x07
#define CISS_CMD_ABORTED 0x08
#define CISS_CMD_ABORT_FAILED 0x09
#define CISS_CMD_UNSOLICITED_ABORT 0x0A
#define CISS_CMD_TIMEOUT 0x0B
#define CISS_CMD_UNABORTABLE 0x0C
/* Transfer Direction */
#define CISS_XFER_NONE 0x00
#define CISS_XFER_WRITE 0x01
#define CISS_XFER_READ 0x02
#define CISS_XFER_RSVD 0x03
#define CISS_ATTR_UNTAGGED 0x00
#define CISS_ATTR_SIMPLE 0x04
#define CISS_ATTR_HEADOFQUEUE 0x05
#define CISS_ATTR_ORDERED 0x06
/* CDB Type */
#define CISS_TYPE_CMD 0x00
#define CISS_TYPE_MSG 0x01
/* Config Space Register Offsetsp */
#define CFG_VENDORID 0x00
#define CFG_DEVICEID 0x02
#define CFG_I2OBAR 0x10
#define CFG_MEM1BAR 0x14
/* I2O Space Register Offsets */
#define I2O_IBDB_SET 0x20
#define I2O_IBDB_CLEAR 0x70
#define I2O_INT_STATUS 0x30
#define I2O_INT_MASK 0x34
#define I2O_IBPOST_Q 0x40
#define I2O_OBPOST_Q 0x44
#define I2O_OBDB_STATUS 0x9C
#define I2O_OBDB_CLEAR 0xA0
/* Configuration Table */
#define CFGTBL_CHANGE_REQ 0x00000001l
#define CFGTBL_ACC_CMDS 0x00000001l
/* Transport Method */
#define CFGTBL_XPORT_SIMPLE 0x00000002l
#define CFGTBL_XPORT_PERFORMANT 0x00000004l
#define CFGTBL_XPORT_MEMQ 0x00000008l
#define CPQARY3_SIMPLE CFGTBL_XPORT_SIMPLE
/* not being used currently */
#define CFGTBL_BusType_Ultra2 0x00000001l
#define CFGTBL_BusType_Ultra3 0x00000002l
#define CFGTBL_BusType_Fibre1G 0x00000100l
#define CFGTBL_BusType_Fibre2G 0x00000200l
/* for hard reset of the controller */
#define CT_CFG_OFFSET 0xB4
#define CT_MEM_OFFSET 0xB8
/*
* STRUCTURES
* Command List Structure
*/
#pragma pack(1)
/*
* Structure for Tag field in the controller command structure
* Bit 0 : Unused
* Bit 1 : If set, signifies an error in processing of the command
* Bits 2 & 3 : Used by this driver to signify a host of situations
* Bits 4-31 : Used by driver to fill in tag and then used by controller
* Bits 32-63 : Reserved
*/
#define CISS_CMD_ERROR 0x2
typedef struct cpqary3_tag {
typedef union _SCSI3Addr_t {
struct {
} PeripDev;
struct {
} LogDev;
struct {
} LogUnit;
} SCSI3Addr_t;
typedef struct _PhysDevAddr_t {
typedef struct _LogDevAddr_t {
} LogDevAddr_t;
typedef union _LUNAddr_t {
} LUNAddr_t;
typedef struct _CommandListHeader_t {
typedef struct _RequestBlock_t {
struct {
} Type;
typedef struct _ErrDescriptor_t {
typedef struct _SGDescriptor_t {
typedef struct _CommandList_t {
typedef union _MoreErrInfo_t {
struct {
} Common_Info;
struct {
} Invalid_Cmd;
typedef struct _ErrorInfo_t {
} ErrorInfo_t;
/* Configuration Table Structure */
typedef struct _HostWrite_t {
} HostWrite_t;
typedef struct _CfgTable_t {
/* PERF */
/* PERF */
} CfgTable_t;
typedef struct _CfgTrans_Perf_t {
typedef struct _CfgTrans_MemQ_t {
typedef union _CfgTrans_t {
} CfgTrans_t;
#define CPQARY3_REPLYQ_INIT_CYCLIC_IND 0x1
typedef struct cpqary3_drvr_replyq {
#pragma pack()
#ifdef __cplusplus
}
#endif
#endif /* _CPQARY3_CISS_H */